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Message-ID: <e9c3a7c20910281208w54ddc859wb650f6527dae2d08@mail.gmail.com>
Date:	Wed, 28 Oct 2009 12:08:40 -0700
From:	Dan Williams <dan.j.williams@...el.com>
To:	Linus Walleij <linus.walleij@...ricsson.com>
Cc:	Maciej Sosnowski <maciej.sosnowski@...el.com>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/2] Add COH 901 318 DMA driver platform config for U300 
	v3

On Wed, Oct 28, 2009 at 8:19 AM, Linus Walleij
<linus.walleij@...ricsson.com> wrote:
[..]
> +#define flags_memcpy_config (COH901318_CX_CFG_CH_DISABLE | \
> +                       COH901318_CX_CFG_RM_MEMORY_TO_MEMORY | \
> +                       COH901318_CX_CFG_LCR_DISABLE | \
> +                       COH901318_CX_CFG_TC_IRQ_ENABLE | \
> +                       COH901318_CX_CFG_BE_IRQ_ENABLE)
> +#define flags_memcpy_lli_chained (COH901318_CX_CTRL_TC_ENABLE | \
> +                       COH901318_CX_CTRL_BURST_COUNT_32_BYTES | \
> +                       COH901318_CX_CTRL_SRC_BUS_SIZE_32_BITS | \
> +                       COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE | \
> +                       COH901318_CX_CTRL_DST_BUS_SIZE_32_BITS | \
> +                       COH901318_CX_CTRL_DST_ADDR_INC_ENABLE | \
> +                       COH901318_CX_CTRL_MASTER_MODE_M1RW | \
> +                       COH901318_CX_CTRL_TCP_DISABLE | \
> +                       COH901318_CX_CTRL_TC_IRQ_DISABLE | \
> +                       COH901318_CX_CTRL_HSP_DISABLE | \
> +                       COH901318_CX_CTRL_HSS_DISABLE | \
> +                       COH901318_CX_CTRL_DDMA_LEGACY | \
> +                       COH901318_CX_CTRL_PRDD_SOURCE)
> +#define flags_memcpy_lli (COH901318_CX_CTRL_TC_ENABLE | \
> +                       COH901318_CX_CTRL_BURST_COUNT_32_BYTES | \
> +                       COH901318_CX_CTRL_SRC_BUS_SIZE_32_BITS | \
> +                       COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE | \
> +                       COH901318_CX_CTRL_DST_BUS_SIZE_32_BITS | \
> +                       COH901318_CX_CTRL_DST_ADDR_INC_ENABLE | \
> +                       COH901318_CX_CTRL_MASTER_MODE_M1RW | \
> +                       COH901318_CX_CTRL_TCP_DISABLE | \
> +                       COH901318_CX_CTRL_TC_IRQ_DISABLE | \
> +                       COH901318_CX_CTRL_HSP_DISABLE | \
> +                       COH901318_CX_CTRL_HSS_DISABLE | \
> +                       COH901318_CX_CTRL_DDMA_LEGACY | \
> +                       COH901318_CX_CTRL_PRDD_SOURCE)
> +#define flags_memcpy_lli_last (COH901318_CX_CTRL_TC_ENABLE | \
> +                       COH901318_CX_CTRL_BURST_COUNT_32_BYTES | \
> +                       COH901318_CX_CTRL_SRC_BUS_SIZE_32_BITS | \
> +                       COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE | \
> +                       COH901318_CX_CTRL_DST_BUS_SIZE_32_BITS | \
> +                       COH901318_CX_CTRL_DST_ADDR_INC_ENABLE | \
> +                       COH901318_CX_CTRL_MASTER_MODE_M1RW | \
> +                       COH901318_CX_CTRL_TCP_DISABLE | \
> +                       COH901318_CX_CTRL_TC_IRQ_ENABLE | \
> +                       COH901318_CX_CTRL_HSP_DISABLE | \
> +                       COH901318_CX_CTRL_HSS_DISABLE | \
> +                       COH901318_CX_CTRL_DDMA_LEGACY | \
> +                       COH901318_CX_CTRL_PRDD_SOURCE)

You go through the hassle of defining these flag combination sets...

> +               .param.config = COH901318_CX_CFG_CH_DISABLE |
> +                               COH901318_CX_CFG_RM_MEMORY_TO_PRIMARY |
> +                               COH901318_CX_CFG_LCR_DISABLE |
> +                               COH901318_CX_CFG_TC_IRQ_ENABLE |
> +                               COH901318_CX_CFG_BE_IRQ_ENABLE,

...but then don't use them to cut down on the line count in the
definition of these parameters?

--
Dan
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