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Message-ID: <alpine.LFD.2.00.0911040038460.9725@eddie.linux-mips.org>
Date:	Wed, 4 Nov 2009 00:53:02 +0000 (GMT)
From:	"Maciej W. Rozycki" <macro@...ux-mips.org>
To:	Ingo Molnar <mingo@...hat.com>, hpa@...or.com,
	linux-kernel@...r.kernel.org, ebiederm@...ssion.com,
	garyhade@...ibm.com, suresh.b.siddha@...el.com, tglx@...utronix.de,
	mingo@...e.hu
Subject: Re: [tip:x86/apic] x86: Use EOI register in io-apic on intel
 platforms

On Mon, 2 Nov 2009, tip-bot for Suresh Siddha wrote:

> Commit-ID:  b3ec0a37a7907813bb4fb85a2d94102c152470b7
> Gitweb:     http://git.kernel.org/tip/b3ec0a37a7907813bb4fb85a2d94102c152470b7
> Author:     Suresh Siddha <suresh.b.siddha@...el.com>
> AuthorDate: Mon, 26 Oct 2009 14:24:35 -0800
> Committer:  Ingo Molnar <mingo@...e.hu>
> CommitDate: Mon, 2 Nov 2009 15:56:36 +0100
> 
> x86: Use EOI register in io-apic on intel platforms
> 
> IO-APIC's in intel chipsets support EOI register starting from
> IO-APIC version 2. Use that when ever we need to clear the
> IO-APIC RTE's RemoteIRR bit explicitly.
> 
> Signed-off-by: Suresh Siddha <suresh.b.siddha@...el.com>
> Acked-by: Gary Hade <garyhade@...ibm.com>
> Cc: Eric W. Biederman <ebiederm@...ssion.com>
> LKML-Reference: <20091026230001.947855317@...-t61.sc.intel.com>
> [ Marked use_eio_reg as __read_mostly, fixed small details ]
> Signed-off-by: Ingo Molnar <mingo@...e.hu>
> ---
[...]
> +static int ioapic_supports_eoi(void)
> +{
> +	struct pci_dev *root;
> +
> +	root = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
> +	if (root && root->vendor == PCI_VENDOR_ID_INTEL &&
> +	    mp_ioapics[0].apicver >= 0x2) {
> +		use_eoi_reg = 1;
> +		printk(KERN_INFO "IO-APIC supports EOI register\n");
> +	} else
> +		printk(KERN_INFO "IO-APIC doesn't support EOI\n");
> +
> +	return 0;
> +}

 This is wrong -- the 82093AA I/O APIC has its version set to 0x11 and it 
does not support the EOI register.  Similarly I/O APICs integrated into 
the 82379AB south bridge and the 82374EB/SB EISA component.

 Overall values below 0x10 are reserved for the 82489DX -- are you sure 
you didn't mean 0x12 or 0x20?

  Maciej
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