lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 4 Nov 2009 18:42:53 +0100
From:	Ingo Molnar <>
Cc:	Aristeu Rozanski <>,
	Thomas Gleixner <>,
	"H. Peter Anvin" <>,
	Peter Zijlstra <>,
	Frédéric Weisbecker <>,
Subject: Re: [PATCH 2/2] x86: introduce NMI_AUTO as nmi_watchdog option

* <> wrote:

> On Wed, 04 Nov 2009 12:46:30 +0100, Ingo Molnar said:
> > What i'd like to see for the NMI watchdog is much more ambitious 
> > than this: the use of perf events to run a periodic NMI callback.
> > 
> > The NMI watchdog would cause the creation of a per-cpu perf_event 
> > structure (in-kernel). All x86 CPUs that have perf event support 
> > (the majority of them) will thus be able to have an NMI watchdog 
> > using a nice, generic piece of code and we'd be able to phase out 
> > the open-coded NMI watchdog code.
> What happens on older/smaller x86 CPUs that don't have any native 
> support for perf events?

I think we want to keep their NMI watchdog implementation - but new work 
should go towards a perf-events based NMI watchdog.

Note that in practice a working NMI watchdog implementation on an 
old/small x86 CPU can be taken and turned into a minimal PMU driver: one 
that can provide cycle based NMI events. There's no 'full' PMU support 
needed to get a fair amount of perf events functionality - and some of 
those CPUs dont even have a PMU.

So there's no hardware barrier of entry.

To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
More majordomo info at
Please read the FAQ at

Powered by blists - more mailing lists