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Date:	Wed, 11 Nov 2009 12:27:33 +0100
From:	Andreas Herrmann <herrmann.der.user@...glemail.com>
To:	Clemens Ladisch <clemens@...isch.de>
Cc:	Dmitry Adamushko <dmitry.adamushko@...il.com>,
	Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] x86, ucode-amd: Load ucode-patches once and not
 separately fo each CPU

On Wed, Nov 11, 2009 at 08:51:07AM +0100, Clemens Ladisch wrote:
> Dmitry Adamushko wrote:
> > btw., if we could safely assume that all the cpus after the ucode
> > upgrade share the same version/patch-level of ucode, we would be able
> > to cache a single ucode instance once and use it for all.

Hmm, I think all ucode-versions needed in a mixed silicon system need
to be cached. See below.

> > I don't recall anyone clearly stating that such multi-cpu-type
> > systems can't really exist.

> > e.g. is it possible to have AMD systems with cpus which differ from
> > each other not only by their revisions (patch_level)?

Mixed silicon is possible.

So at least in theory this could result in different patch_levels
because the required microcode is identified via processor revision
consisting of family/model/stepping.

> The Revision Guide for AMD Family 10h Processors (#41322) says, in
> section "Mixed Silicon Support", that the Opteron B steppings can be
> used with each other (DR-BA, DR-B2, DR-B3; CPUID 00100F2xh).  Are
> different steppings considered equivalent?

The microcode to be loaded is identified by an Equivalent Processor
ID.  The Equivalent Processor ID is determined with an equivalence
table which maps the processor revision IDs to Equivalent Processor
IDs.

Above revision B steppeings have different processor revision IDs:
(because the stepping differs)

  00100F2Ah (DR-BA)
  00100F22h (DR-B2)
  00100F23h (DR-B3)

An example of an equivalence table is

  0x00100F2A; 0x1020
  0x00100F22; 0x1022
  0x00100F23; 0x1022

This means when combining DR-BA and DR-B2 (or DR-B3) different ucode
gets installed for the two processors.


Regards,
Andreas
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