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Date:	Fri, 13 Nov 2009 17:50:12 +0100
From:	Ralf Baechle <ralf@...ux-mips.org>
To:	"Maciej W. Rozycki" <macro@...ux-mips.org>
Cc:	Wu Zhangjin <wuzhangjin@...il.com>,
	David Daney <ddaney@...iumnetworks.com>,
	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
	zhangfx@...ote.com, zhouqg@...il.com, rostedt@...dmis.org,
	Frederic Weisbecker <fweisbec@...il.com>,
	Ingo Molnar <mingo@...e.hu>,
	Nicholas Mc Guire <der.herr@...r.at>,
	Richard Sandiford <rdsandiford@...glemail.com>,
	Patrik Kluba <kpajko79@...il.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Michal Simek <monstr@...str.eu>
Subject: Re: [PATCH v7 04/17] tracing: add static function tracer support
	for MIPS

On Wed, Nov 11, 2009 at 02:13:13PM +0000, Maciej W. Rozycki wrote:

> > 32-bit with -mlong-call:
> > 
> > 	lui	$25, %hi(foo)
> > 	addiu	$25, %lo(foo)
> > 	jalr	$25
> [...]
> > It's time that we get a -G optimization that works for the kernel; it would
> > allow to cut down the -mlong-calls calling sequence to just:
> > 
> > 	lw/ld	$25, offset($gp)
> > 	jalr	$25
> 
>  Actually this may be no faster than the above.  The load produces its 
> result late and the jump needs its data early, so unless a bypass has been 
> implemented in the pipeline, it may well stall for the extra cycle (that's 
> the reason for the load-delay slot in the original MIPS I ISA after all).
> 
>  Of course there is still the benefit of a reduced cache footprint, but 
> the extra load may have to evict a cache line and flush the benefit down 
> the drain.  I don't mean it's not to be considered, but it's not at all 
> immediately obvious it would be a win.

Yes; I was placing my bets on the cost of cache misses and for modules also
TLB misses.  In the end this needs to be benchmarked.

David Daney has an alternative approach in the works; he uses a wired TLB
entry in CKSEG2 with -msym32.  That'll work for everybody but R8000 and
maybe a few other esotheric cases.

  Ralf
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