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Message-ID: <tip-8a50e5135af0c243e117e94e27feb8d149c879b4@git.kernel.org>
Date: Mon, 16 Nov 2009 22:06:41 GMT
From: "tip-bot for H. Peter Anvin" <hpa@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
kees.cook@...onical.com, tglx@...utronix.de
Subject: [tip:x86/mm] x86-32: Use symbolic constants, safer CPUID when enabling EFER.NX
Commit-ID: 8a50e5135af0c243e117e94e27feb8d149c879b4
Gitweb: http://git.kernel.org/tip/8a50e5135af0c243e117e94e27feb8d149c879b4
Author: H. Peter Anvin <hpa@...or.com>
AuthorDate: Fri, 13 Nov 2009 15:28:13 -0800
Committer: H. Peter Anvin <hpa@...or.com>
CommitDate: Mon, 16 Nov 2009 13:44:56 -0800
x86-32: Use symbolic constants, safer CPUID when enabling EFER.NX
Use symbolic constants rather than hard-coded values when setting
EFER.NX in head_32.S, and do a more rigorous test for the validity of
the response when probing for the extended CPUID range.
Signed-off-by: H. Peter Anvin <hpa@...or.com>
LKML-Reference: <1258154897-6770-2-git-send-email-hpa@...or.com>
Acked-by: Kees Cook <kees.cook@...onical.com>
---
arch/x86/kernel/head_32.S | 18 +++++++++++-------
1 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 050c278..7fd318b 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -18,6 +18,8 @@
#include <asm/asm-offsets.h>
#include <asm/setup.h>
#include <asm/processor-flags.h>
+#include <asm/msr-index.h>
+#include <asm/cpufeature.h>
#include <asm/percpu.h>
/* Physical address */
@@ -297,25 +299,27 @@ ENTRY(startup_32_smp)
orl %edx,%eax
movl %eax,%cr4
- btl $5, %eax # check if PAE is enabled
- jnc 6f
+ testb $X86_CR4_PAE, %al # check if PAE is enabled
+ jz 6f
/* Check if extended functions are implemented */
movl $0x80000000, %eax
cpuid
- cmpl $0x80000000, %eax
- jbe 6f
+ /* Value must be in the range 0x80000001 to 0x8000ffff */
+ subl $0x80000001, %eax
+ cmpl $(0x8000ffff-0x80000001), %eax
+ ja 6f
mov $0x80000001, %eax
cpuid
/* Execute Disable bit supported? */
- btl $20, %edx
+ btl $(X86_FEATURE_NX & 31), %edx
jnc 6f
/* Setup EFER (Extended Feature Enable Register) */
- movl $0xc0000080, %ecx
+ movl $MSR_EFER, %ecx
rdmsr
- btsl $11, %eax
+ btsl $_EFER_NX, %eax
/* Make changes effective */
wrmsr
--
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