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Date:	Wed, 18 Nov 2009 15:18:28 -0800
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Roland McGrath <roland@...hat.com>
CC:	Jason Baron <jbaron@...hat.com>, linux-kernel@...r.kernel.org,
	mingo@...e.hu, mathieu.desnoyers@...ymtl.ca, tglx@...utronix.de,
	rostedt@...dmis.org, andi@...stfloor.org, rth@...hat.com,
	mhiramat@...hat.com
Subject: Re: [RFC PATCH 0/6] jump label v3

On 11/18/2009 03:07 PM, Roland McGrath wrote:
>> 67 66 8D 74 00 (lea si,[si+0]) should work as a 32-bit atomic NOP.  It's
>> not necessarily the fastest, though (I have no data on that.)
>> Similarly, 66 66 66 66 90 should also work.
> 
> We should get all the knowledge like that stored in places like the
> Kconfig.cpu comments near X86_P6_NOP and/or asm/nops.h macros and comments.
> 
> Let's have an ASM_ATOMIC_NOP5 macro in asm/nops.h?  I've lost track of the
> variants, and I'll leave that to you all who are close to the chip people.
> 
> I can't tell if it's the case that there will be kernel configurations
> where there is one known-safe choice but a different choice that's optimal
> if CPU model checks pass.  If so, we could compile in the safe choice and
> then mass-change to the optimal choice at boot time.  (i.e. like the
> alternatives support, but we don't really need to use that too since we
> already have another dedicated table of all the PC addresses to touch.)

Yes, I believe we do something like that already.
	
	-hpa
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