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Message-Id: <4B0512060200007800020C42@vpn.id2.novell.com>
Date: Thu, 19 Nov 2009 08:38:14 +0000
From: "Jan Beulich" <JBeulich@...ell.com>
To: "Nick Piggin" <npiggin@...e.de>
Cc: "Ingo Molnar" <mingo@...e.hu>,
"Arjan van de Ven" <arjan@...radead.org>, <tglx@...utronix.de>,
"Shai Fultheim" <shai@...lemp.com>,
"Ravikiran Thirumalai" <kiran@...lex86.org>,
<linux-kernel@...r.kernel.org>, <hpa@...or.com>
Subject: Re: [PATCH] x86: eliminate redundant/contradicting cache line
size config options
>>> Nick Piggin <npiggin@...e.de> 19.11.09 09:13 >>>
>On Wed, Nov 18, 2009 at 08:52:40PM -0800, Arjan van de Ven wrote:
>Basically what I think we should do is consider L1_CACHE_BYTES to be
>*the* correct default value to use for 1) avoiding false sharing (which
>seems to be the most common use), and 2) optimal and repeatable per-object
>packing into cachelines (which is more of a micro-optimization to be
>applied carefully to really critical structures).
But then this really shouldn't be called L1_CACHE_... Though I realize
that the naming seems to already be broken - looking over the cache
line specifiers for CPUID leaf 2, there's really no L1 with 128 byte lines,
just two L2s.
One question however is whether e.g. cache line ping-pong between
L3s is really costing that much on non-NUMA, as opposed to it
happening between L1s.
Jan
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