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Message-ID: <4B067868.9070902@monstr.eu>
Date:	Fri, 20 Nov 2009 12:07:20 +0100
From:	Michal Simek <monstr@...str.eu>
To:	steve@...idescorp.com
CC:	microblaze-uclinux@...e.uq.edu.au, monstr@...str.eu,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH, RESEND] microblaze: Fix level interrupt ACKing

Hi Steve,

steve@...idescorp.com wrote:
> Level interrupts need to be ack'd in the unmask handler, as in powerpc. 
> Among other issues, this bug causes the system clock to appear to run at 
> double-speed.

Can you send me any step-by-step manual how to demonstrate me this 
fault? If system clock runs at double-speed, then I should be able able 
to see that time is two times faster. Or do you mean different behavior?

Thanks,
Michal



> 
> Signed-off-by: Steven J. Magnani <steve@...idescorp.com>
> ---
> diff -uprN a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
> --- a/arch/microblaze/kernel/intc.c	2009-06-02 15:26:28.000000000 -0500
> +++ b/arch/microblaze/kernel/intc.c	2009-06-02 15:27:39.000000000 -0500
> @@ -41,8 +41,16 @@ unsigned int nr_irq;
>  
>  static void intc_enable_or_unmask(unsigned int irq)
>  {
> +	unsigned long mask = 1 << irq;
>  	pr_debug("enable_or_unmask: %d\n", irq);
> -	out_be32(INTC_BASE + SIE, 1 << irq);
> +	out_be32(INTC_BASE + SIE, mask);
> +
> +	/* ack level irqs because they can't be acked during
> +	 * ack function since the handle_level_irq function
> +	 * acks the irq before calling the interrupt handler
> +	 */
> +	if (irq_desc[irq].status & IRQ_LEVEL)
> +		out_be32(INTC_BASE + IAR, mask);
>  }
>  
>  static void intc_disable_or_mask(unsigned int irq)
> 
> --
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-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
--
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