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Message-ID: <4B102CE5.1050901@ru.mvista.com>
Date: Fri, 27 Nov 2009 22:47:49 +0300
From: Sergei Shtylyov <sshtylyov@...mvista.com>
To: Sergei Shtylyov <sshtylyov@...mvista.com>
Cc: Bartlomiej Zolnierkiewicz <bzolnier@...il.com>,
linux-ide@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] pata_hpt3x2n: fix overclocked MWDMA0 timing
Hello, I wrote:
>> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@...il.com>
>> ---
>> Sergei, XFER_UDMA_5 timing also looks suspicious,
>> please take a look when you have a minute, thanks.
> Yeah, but it's the same as XFER_UDMA_4, so actually underclocked...
> However, it matches what the HPT371N datasheet and the vendor drivers
> have. The 'hpt366' driver uses more speedy mode, with 22.5 ns cycle. ;-)
I have just verified: this driver has always used this timing
historically, at least for HPT372+ chips.
MBR, Sergei
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