linux-kernel - Re: [PATCH] PCI: Always set prefetchable base/limit upper32 registers

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Message-ID: <20091130214243.GA24539@lackof.org>
Date:	Mon, 30 Nov 2009 14:42:43 -0700
From:	Grant Grundler <grundler@...isc-linux.org>
To:	Alex Williamson <alex.williamson@...com>
Cc:	jbarnes@...tuousgeek.org, yinghai@...nel.org,
	linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: Always set prefetchable base/limit upper32
	registers

On Mon, Nov 30, 2009 at 02:22:53PM -0700, Alex Williamson wrote:
> Prior to 1f82de10 we always initialized the upper 32bits of the
> prefetchable memory window, regardless of the address range used.
> Now we only touch it for a >32bit address, which means the upper32
> registers remain whatever the BIOS initialized them too.
> 
> It's valid for the BIOS to set the upper32 base/limit to
> 0xffffffff/0x00000000, which makes us program prefetchable ranges
> like 0xffffffffabc00000 - 0x00000000abc00000
> 
> Revert the chunk of 1f82de10 that made this conditional so we always
> write the upper32 registers.
> 
> Signed-off-by: Alex Williamson <alex.williamson@...com>
> ---
> 
>  drivers/pci/setup-bus.c |    8 +++-----
>  1 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
> index cb1a027..127d759 100644
> --- a/drivers/pci/setup-bus.c
> +++ b/drivers/pci/setup-bus.c
> @@ -221,11 +221,9 @@ static void pci_setup_bridge(struct pci_bus *bus)
>  	}
>  	pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
>  
> -	if (pref_mem64) {
> -		/* Set the upper 32 bits of PREF base & limit. */
> -		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
> -		pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
> -	}

Why not remove all references to pref_mem64?
This was the only use AFAICT.

thanks,
grant

> +	/* Set the upper 32 bits of PREF base & limit. */
> +	pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
> +	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
>  
>  	pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
>  }
> 
> --
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