linux-kernel - Re: [PATCH] PCI: Always set prefetchable base/limit upper32 registers

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Message-ID: <4B1455FD.90002@kernel.org>
Date:	Mon, 30 Nov 2009 15:32:13 -0800
From:	Yinghai Lu <yinghai@...nel.org>
To:	Alex Williamson <alex.williamson@...com>
CC:	jbarnes@...tuousgeek.org, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: Always set prefetchable base/limit upper32 registers

Alex Williamson wrote:
> On Mon, 2009-11-30 at 14:12 -0800, Yinghai Lu wrote:
>> Alex Williamson wrote: 
>>> I don't believe the PCI spec dictates whether the upper 32bit base
>>> should be 0 or -1, so it's purely a BIOS initialization choice and Linux
>>> should properly handle both.  If the hardware only supports 32bit
>>> prefetchable windows, the hardware will drop the write, just as it did
>>> for every 2.6 kernel before 1f82de10.  Thanks,
>> current code:
>>
>> #define  PCI_PREF_RANGE_TYPE_MASK 0x0fUL
>> #define  PCI_PREF_RANGE_TYPE_32 0x00     
>> #define  PCI_PREF_RANGE_TYPE_64 0x01
>> #define  PCI_PREF_RANGE_MASK    (~0x0fUL)
>>
>> if the HW state the pref mmio is 64bit, we will touch upper 32bit. otherwise we will not touch it.
> 
> Really, where?  Please paste the code that writes to
> PCI_PREF_BASE_UPPER32 in the case of hardware supporting a 64bit
> prefetchable window.  I only see this happening if we are assigning it
> to an IORESOURCE_MEM_64 resources.

IORESOURCE_MEM_64 get set when PCI_PREF_RANGE_TYPE_64 is set.

in probe.c::pci_read_bridge_bases()
and
setup-bus.c::pci_bridge_check_ranges()

YH
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