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Message-ID: <20091212181142.GC3092@sirena.org.uk>
Date:	Sat, 12 Dec 2009 18:11:43 +0000
From:	Mark Brown <broonie@...nsource.wolfsonmicro.com>
To:	Alberto Panizzo <maramaopercheseimorto@...il.com>
Cc:	Samuel Ortiz <sameo@...ux.intel.com>,
	Sascha linux-arm <s.hauer@...gutronix.de>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	linux-arm-kernel-infradead <linux-arm-kernel@...ts.infradead.org>,
	Uwe Kleine-König 
	<u.kleine-koenig@...gutronix.de>
Subject: Re: [PATCH 1/4] mfd: mc13783: Take care of semantic inversion
 between read and write value of two bits in POWER_MISCELLANEUS register.

On Sat, Dec 12, 2009 at 05:48:43PM +0100, Alberto Panizzo wrote:
> MC13783_REGCTRL_PWGTnSPIEN controls the states of the corresponding
> PWGTn_DRV output.
> Reading 1 on the corresponding bit mean that the output is enabled
> Writing 1 on the corresponding bit disable that output!

> So, if not asked directly to modify those bits, write the inverted
> value.

Some comments in the code explaining what's going on wouild help a lot -
it's not going to be obvious to a reader why the code is doing this and
may well confuse them.
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