linux-kernel - Re: DMA cache consistency bug introduced in 2.6.28

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Message-ID: <m3aaxhjwaz.fsf@intrepid.localdomain>
Date:	Thu, 17 Dec 2009 19:21:40 +0100
From:	Krzysztof Halasa <khc@...waw.pl>
To:	Linus Torvalds <torvalds@...ux-foundation.org>
Cc:	Alain Knaff <alain@...ff.lu>, markh@...pro.net,
	fdutils@...tils.linux.lu, linux-kernel@...r.kernel.org
Subject: Re: DMA cache consistency bug introduced in 2.6.28

Linus Torvalds <torvalds@...ux-foundation.org> writes:

> On x86, where all caches are supposed to be totally coherent (except for 
> I$ under very special circumstances),

BTW SWIOTLB is a non-coherent "cache" in some sense, though I'd be
surprised if it's related. Anyway mentioning $CPU and $RAM at the very
least would be a good idea in such cases.
-- 
Krzysztof Halasa
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