linux-kernel - [PATCH 5/6] amd64_edac: restrict PCI config space access

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Message-ID: <1261482077-23733-6-git-send-email-borislav.petkov@amd.com>
Date:	Tue, 22 Dec 2009 12:41:16 +0100
From:	Borislav Petkov <borislav.petkov@....com>
To:	<norsk5@...oo.com>
CC:	<linux-kernel@...r.kernel.org>, <x86@...nel.org>,
	Borislav Petkov <borislav.petkov@....com>
Subject: [PATCH 5/6] amd64_edac: restrict PCI config space access

Do not access F2x19[0,4] on K8 since they're undefined there.

Signed-off-by: Borislav Petkov <borislav.petkov@....com>
---
 drivers/edac/amd64_edac.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 63c04d3..c5facd9 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2349,7 +2349,7 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt)
 	amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0);
 	amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0);
 
-	if (!dct_ganging_enabled(pvt)) {
+	if (!dct_ganging_enabled(pvt) && boot_cpu_data.x86 >= 0x10) {
 		amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1);
 		amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1);
 	}
-- 
1.6.5.4


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