linux-kernel - Re: [Fdutils] DMA cache consistency bug introduced in 2.6.28

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Message-ID: <4B327EE5.6060306@lll.lu>
Date:	Wed, 23 Dec 2009 21:34:45 +0100
From:	alain <alain@...ff.lu>
To:	"Pallipadi, Venkatesh" <venkatesh.pallipadi@...el.com>
CC:	"markh@...pro.net" <markh@...pro.net>,
	Andi Kleen <andi@...stfloor.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	"dmarkh@....rr.com" <dmarkh@....rr.com>,
	Alain Knaff <alain@...ff.lu>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	"fdutils@...tils.linux.lu" <fdutils@...tils.linux.lu>,
	"Li, Shaohua" <shaohua.li@...el.com>, Ingo Molnar <mingo@...e.hu>
Subject: Re: [Fdutils] DMA cache consistency bug introduced in 2.6.28

Pallipadi, Venkatesh wrote:
> MSI interrupt being delivered to CPU 0. I cannot think of any reason why
> this can break dma. We can probably try adding some dummy HPET read
> after dma write, to see if that flushes things properly.

Shouldn't that be "... some dummy HPET read _before_ dma write...". In
order to ensure that DMA cache is consistent _before_ dma controller
reads it?

Regards,

Alain
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