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Message-ID: <1262948011.2050.3.camel@climbing-alby>
Date: Fri, 08 Jan 2010 11:53:31 +0100
From: Alberto Panizzo <maramaopercheseimorto@...il.com>
To: Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>
Cc: Samuel Ortiz <sameo@...ux.intel.com>,
Sergei Shtylyov <sshtylyov@...mvista.com>,
Sascha linux-arm <s.hauer@...gutronix.de>,
Mark Brown <broonie@...nsource.wolfsonmicro.com>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-arm-kernel-infradead <linux-arm-kernel@...ts.infradead.org>,
Liam Girdwood <lrg@...mlogic.co.uk>
Subject: Re: [PATCH 1/4] mfd: mc13783: Take care of semantic inversion
between read and write value of two bits in POWER_MISCELLANEUS register.
Sorry for late response.. as Uwe said, we have discuss about this
and I will prepare another patch that involve the regulator driver.
Alberto!
Il giorno mar, 05/01/2010 alle 20.55 +0100, Uwe Kleine-König ha scritto:
> On Tue, Jan 05, 2010 at 07:15:42PM +0100, Samuel Ortiz wrote:
> > > @@ -187,6 +190,13 @@ int mc13783_reg_write(struct mc13783 *mc13783, unsigned int offset, u32 val)
> > >
> > > buf = 1 << 31 | offset << MC13783_REGOFFSET_SHIFT | val;
> > >
> > > + /* Take care of table 4-24 in Freescale MC13783IGPLDRM.pdf making
> > > + * the assumption that PWGTnDRV signals controls core power supplies
> > > + * that software must not disable. */
> > > + if (offset == MC13783_REG_POWER_MISCELLANEOUS)
> > > + buf &= ~(MC13783_REGCTRL_PWGT1SPIEN |
> > > + MC13783_REGCTRL_PWGT2SPIEN);
> > > +
> > Although I see where you want to go, I dont really enjoy that solution.
> > I would prefere to have specific register write/rmw routines for
> > MC13783_REG_POWER_MISCELLANEOUS, and at the same time forbid to access the
> > latter from the current mc13783_reg_* API.
> Ack. This is what I already suggested in
>
> http://thread.gmane.org/gmane.linux.kernel/927112/focus=930317
>
> (This happend to be a reply to patch 2/4 as I replied to Alberto's ping
> for patches 1 and 2.)
>
> Best regards
> Uwe
>
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