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Message-ID: <20100108222820.GA9537@Krystal>
Date: Fri, 8 Jan 2010 17:28:20 -0500
From: Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
To: Steven Rostedt <rostedt@...dmis.org>
Cc: paulmck@...ux.vnet.ibm.com, Oleg Nesterov <oleg@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
linux-kernel@...r.kernel.org, Ingo Molnar <mingo@...e.hu>,
akpm@...ux-foundation.org, josh@...htriplett.org,
tglx@...utronix.de, Valdis.Kletnieks@...edu, dhowells@...hat.com,
laijs@...fujitsu.com, dipankar@...ibm.com
Subject: Re: [RFC PATCH] introduce sys_membarrier(): process-wide memory
barrier
* Steven Rostedt (rostedt@...dmis.org) wrote:
> On Thu, 2010-01-07 at 12:58 -0800, Paul E. McKenney wrote:
>
> > I believe that I am worried about a different scenario. I do not believe
> > that the scenario you lay out above can actually happen. The pair of
> > schedules on CPU 2 have to act as a full memory barrier, otherwise,
> > it would not be safe to resume a task on some other CPU.
>
> I'm not so sure about that. The update of ->curr happens inside a
> spinlock, which is a rmb() ... wmb() pair. Must be, because a spin_lock
> must be an rmb otherwise the loads could move outside the lock, and the
> spin_unlock must be a wmb() otherwise what was written could move
> outside the lock.
Hrm, a rmb + wmb pair is different than a full mb(), because rmb and wmb
can be reordered ont wrt the other. The equivalence is more:
mb() = rmb() + sync_core() + wmb()
>
>
> > If the pair
> > of schedules act as a full memory barrier, then the code in
> > synchronize_rcu() that looks at the RCU read-side state would see that
> > CPU 2 is in an RCU read-side critical section.
> >
> > The scenario that I am (perhaps wrongly) concerned about is enabled by
> > the fact that URCU's rcu_read_lock() has a load, some checks, and a store.
> > It has compiler constraints, but no hardware memory barriers. This
> > means that CPUs (even x86) can execute an rcu_dereference() before the
> > rcu_read_lock()'s store has executed.
> >
> > Hacking your example above, keeping mind that x86 can reorder subsequent
> > loads to precede prior stores:
> >
> >
> > CPU 1 CPU 2
> > ----------- -------------
> >
> > <user space> <kernel space, switching to task>
> >
> > ->curr updated
> >
> > <long code path, maybe mb?>
> >
> > <user space>
> >
> > rcu_read_lock(); [load only]
> >
> > obj = list->next
> >
> > list_del(obj)
> >
> > sys_membarrier();
> > < kernel space >
>
> Well, if we just grab the task_rq(task)->lock here, then we should be
> OK? We would guarantee that curr is either the task we want or not.
>
[...]
Yes, I'll do some testing to figure out how much overhead this has.
Probably not much, but it's an iteration on all CPUs, so it will be a
bit larger on big iron. Clearly taking the run queue lock would be the
safest way to proceed.
Thanks,
Mathieu
--
Mathieu Desnoyers
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
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