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Message-ID: <4B4D28AF.1060506@kernel.org>
Date:	Tue, 12 Jan 2010 17:58:07 -0800
From:	Yinghai Lu <yinghai@...nel.org>
To:	Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
CC:	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Ingo Molnar <mingo@...e.hu>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Ivan Kokshaysky <ink@...assic.park.msu.ru>,
	Alex Chiang <achiang@...com>,
	Bjorn Helgaas <bjorn.helgaas@...com>,
	linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH 09/14] pci: introduce pci_assign_unassigned_bridge_resources

On 01/12/2010 04:50 PM, Kenji Kaneshige wrote:
> Yinghai Lu wrote:
>> for pciehp to use it later
>>
>> pci_setup_bridge() will not check enabled for the slot bridge, otherwise
>> update res is not updated to bridge BAR. that is bridge is enabled already for
>> port service.
>>
>> -v2: update it with resource_list_x
>>
>> Signed-off-by: Yinghai Lu <yinghai@...nel.org>
...

>> +
>> +void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
>> +{
>> +	struct pci_bus *bus;
>> +	struct pci_bus *parent = bridge->subordinate;
>> +	int retval;
>> +
>> +	pci_bus_size_bridges(parent);
>> +	pci_clear_master(bridge);
> 
> I have a concern about clearing bus master enable bit here, though
> I'm not sure about it. I'm wondering if clearing bus master enable
> bit might have some bad effect for the port services to work. For
> example, does MSI interrupt work without enabling bus mastering?
but we set that pci_set_master right away after we assign the new resource
> 
> 
>> +	__pci_bridge_assign_resources(bridge, NULL);
>> +	retval = pci_reenable_device(bridge);
>> +	pci_set_master(bridge);
>> +	pci_enable_bridges(parent);

YH
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