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Message-ID: <20100120100254.GC5238@redhat.com>
Date: Wed, 20 Jan 2010 12:02:54 +0200
From: Gleb Natapov <gleb@...hat.com>
To: "H. Peter Anvin" <hpa@...or.com>
Cc: Peter Zijlstra <peterz@...radead.org>, kvm@...r.kernel.org,
linux-mm@...ck.org, linux-kernel@...r.kernel.org, avi@...hat.com,
mingo@...e.hu, tglx@...utronix.de, riel@...hat.com,
cl@...ux-foundation.org
Subject: Re: [PATCH v3 04/12] Add "handle page fault" PV helper.
On Tue, Jan 19, 2010 at 12:10:17PM -0800, H. Peter Anvin wrote:
> On 01/19/2010 09:44 AM, Gleb Natapov wrote:
> >
> > Yes it can be done this way and I'll look into it once more. Using
> > exception vector is more convenient for three reasons: it allows to pass
> > additional data in error code, it doesn't require guest to issue EOI,
> > exception can be injected when interrupts are disabled by a guest. The
> > last one is not important for now since host doesn't inject notifications
> > when interrupts are disabled currently. Having Intel allocate one
> > exception vector for hypervisor use would be really nice though.
> >
>
> That's probably not going to happen, for the rather obvious reason: *you
> already have 224 of them*.
>
> You seem to be thinking here that vectors 0-31 have to be exceptions and
> 32-255 have to be interrupts. *There is no such distinction*; the only
> thing special about 0-31 is that we (Intel) reserve the right to control
> the assignments; for 32-255 the platform and OS control the assignment.
>
I would be glad to interpret the spec like you do, but table 6-1 SDM 3A
mark vectors 2,32-255 as interrupts while others are traps, fault and
aborts. Unfortunately VMX designers seems to be interpreting the spec
like I do. See below.
> You can have the guest OS take an exception on a vector above 31 just
> fine; you just need it to tell the hypervisor which vector it, the OS,
> assigned for this purpose.
>
VMX doesn't allow to inject hardware exception with vector greater then 31.
SDM 3B section 23.2.1.3.
I can inject the event as HW interrupt on vector greater then 32 but not
go through APIC so EOI will not be required. This sounds non-architectural
and I am not sure kernel has entry point code for this kind of event, it
has one for exception and one for interrupts that goes through __do_IRQ()
which assumes that interrupts should be ACKed.
--
Gleb.
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