linux-kernel - Re: [PATCH] Disable SR when more than one pipe is enabled

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Message-ID: <20100127085103.317e5ad8@jbarnes-piketon>
Date:	Wed, 27 Jan 2010 08:51:03 -0800
From:	Jesse Barnes <jbarnes@...tuousgeek.org>
To:	David John <davidjon@...ontk.org>
Cc:	yakui.zhao@...el.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] Disable SR when more than one pipe is enabled

On Wed, 27 Jan 2010 15:19:08 +0530
David John <davidjon@...ontk.org> wrote:

> Self Refresh should be disabled on dual plane configs.
> Otherwise, as the SR watermark is not calculated for
> such configs, switching to non VGA mode causes FIFO
> underrun and display flicker.
> 
> This fixes Korg Bug # 14897.
> 
> Signed-off-by: David John <davidjon@...ontk.org>
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 45da78e..46d7c0c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2519,6 +2519,10 @@ static void g4x_update_wm(struct drm_device *dev,  int planea_clock,
>  		sr_entries = roundup(sr_entries / cacheline_size, 1);
>  		DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
>  		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
> +	} else {
> +		/* Turn off self refresh if both pipes are enabled */
> +		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
> +					& ~FW_BLC_SELF_EN);
>  	}
>  
>  	DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
> @@ -2562,6 +2566,10 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
>  			srwm = 1;
>  		srwm &= 0x3f;
>  		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
> +	} else {
> +		/* Turn off self refresh if both pipes are enabled */
> +		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
> +					& ~FW_BLC_SELF_EN);
>  	}
>  
>  	DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",
> @@ -2630,6 +2638,10 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
>  		if (srwm < 0)
>  			srwm = 1;
>  		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
> +	} else {
> +		/* Turn off self refresh if both pipes are enabled */
> +		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
> +					& ~FW_BLC_SELF_EN);
>  	}
>  
>  	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
> 

Great!  Looks like the docs were a bit misleading here.  Disabling
self-refresh for dual plane configs is the safest thing to do.

Eric, please apply asap.  Should probably go to stable as well.

Signed-off-by: Jesse Barnes <jbarnes@...tuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center
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