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Message-ID: <1264720855.9660.22.camel@jschopp-laptop>
Date: Thu, 28 Jan 2010 17:20:55 -0600
From: Joel Schopp <jschopp@...tin.ibm.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: ego@...ibm.com, linuxppc-dev@...ts.ozlabs.org,
Ingo Molnar <mingo@...e.hu>, linux-kernel@...r.kernel.org,
benh@...nel.crashing.org, jschopp@...tin.ibm.com
Subject: [PATCHv3 2/2] powerpc: implement arch_scale_smt_power for Power7
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power in these idle cases in order to prefer threads 0,1 over
threads 2,3 within a core.
Signed-off-by: Joel Schopp <jschopp@...tin.ibm.com>
---
Version 2 addresses style and optimization, same basic functionality
Version 3 adds a comment
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power in these idle cases in order to prefer threads 0,1 over
threads 2,3 within a core.
Signed-off-by: Joel Schopp <jschopp@...tin.ibm.com>
---
Version 2 addresses style and optimization, same basic functionality
Index: linux-2.6.git/arch/powerpc/kernel/smp.c
===================================================================
--- linux-2.6.git.orig/arch/powerpc/kernel/smp.c
+++ linux-2.6.git/arch/powerpc/kernel/smp.c
@@ -620,3 +620,59 @@ void __cpu_die(unsigned int cpu)
smp_ops->cpu_die(cpu);
}
#endif
+
+unsigned long arch_scale_smt_power(struct sched_domain *sd, int cpu)
+{
+ int sibling;
+ int idle_count = 0;
+ int thread;
+
+ /* Setup the default weight and smt_gain used by most cpus for SMT
+ * Power. Doing this right away covers the default case and can be
+ * used by cpus that modify it dynamically.
+ */
+ struct cpumask *sibling_map = sched_domain_span(sd);
+ unsigned long weight = cpumask_weight(sibling_map);
+ unsigned long smt_gain = sd->smt_gain;
+
+
+ if (cpu_has_feature(CPU_FTR_ASYNC_SMT4) && weight == 4) {
+ for_each_cpu(sibling, sibling_map) {
+ if (idle_cpu(sibling))
+ idle_count++;
+ }
+
+ /* the following section attempts to tweak cpu power based
+ * on current idleness of the threads dynamically at runtime
+ */
+ if (idle_count > 1) {
+ thread = cpu_thread_in_core(cpu);
+ if (thread < 2) {
+ /* add 75 % to thread power */
+ smt_gain += (smt_gain >> 1) + (smt_gain >> 2);
+ } else {
+ /* subtract 75 % to thread power */
+ smt_gain = smt_gain >> 2;
+ }
+ }
+ }
+
+ /* default smt gain is 1178, weight is # of SMT threads */
+ switch (weight) {
+ case 1:
+ /*divide by 1, do nothing*/
+ break;
+ case 2:
+ smt_gain = smt_gain >> 1;
+ break;
+ case 4:
+ smt_gain = smt_gain >> 2;
+ break;
+ default:
+ smt_gain /= weight;
+ break;
+ }
+
+ return smt_gain;
+
+}
Index: linux-2.6.git/arch/powerpc/include/asm/cputable.h
===================================================================
--- linux-2.6.git.orig/arch/powerpc/include/asm/cputable.h
+++ linux-2.6.git/arch/powerpc/include/asm/cputable.h
@@ -195,6 +195,7 @@ extern const char *powerpc_base_platform
#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000)
+#define CPU_FTR_ASYNC_SMT4 LONG_ASM_CONST(0x0100000000000000)
#ifndef __ASSEMBLY__
@@ -409,7 +410,7 @@ extern const char *powerpc_base_platform
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
- CPU_FTR_DSCR | CPU_FTR_SAO)
+ CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYNC_SMT4)
#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
--
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