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Message-ID: <4B675534.5070107@s5r6.in-berlin.de>
Date: Mon, 01 Feb 2010 23:27:00 +0100
From: Stefan Richter <stefanr@...6.in-berlin.de>
To: "Justin P. Mattock" <justinmattock@...il.com>
CC: Dan Carpenter <error27@...il.com>,
linux1394-devel@...ts.sourceforge.net,
"Rafael J. Wysocki" <rjw@...k.pl>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Kernel Testers List <kernel-testers@...r.kernel.org>
Subject: Re: ohci1394_dma=early crash since 2.6.32 (was Re: [Bug #14487] PANIC:
early exception 08 rip 246:10 error ffffffff810251b5 cr2 0)
Justin P. Mattock wrote:
> (as for yesterdays 0xffffffffffffffff(just experimenting)Google gives me
> no info on the differences between 8f's to 16f's, I was under the
> impression that it's x86_32 and x86_64 for the pci address).
As Dan noted,
(class == 0xffffffff || 0xffffffffffffffff)
is always true because it is logically the same as
(class == whatever) || true
If you really meant
class == 0xffffffff || class == 0xffffffffffffffff
then the latter half will never become true because class is declared as
u32 and got its value from read_pci_config() which also returns u32.
BTW, whether a PCI device is capable of accessing 32 bit bus addresses
or also 64 bit bus addresses depends on the device, not on the CPU.
Originally, PCI only had a 32 bit addressing model. OHCI 1394 1.0/1.1
implementations only deal with 32 bit local bus addresses.
The 'class' however is not an address but merely a register value with
24 bits width. (Defined in the PCI Local Bus spec which is not freely
available, cited in OHCI 1394 annex A.3.) This register is read as a 32
bits wide register from which the excess byte is later discarded. If
all bits read are 1, the bus:slot:function is not actually populated.
--
Stefan Richter
-=====-==-=- --=- ----=
http://arcgraph.de/sr/
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