lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20100203094016.GL6130@pengutronix.de>
Date:	Wed, 3 Feb 2010 10:40:16 +0100
From:	Sascha Hauer <s.hauer@...gutronix.de>
To:	Eric Miao <eric.y.miao@...il.com>
Cc:	Amit Kucheria <amit.kucheria@...onical.com>,
	List Linux Kernel <linux-kernel@...r.kernel.org>,
	linux@....linux.org.uk, Dinh.Nguyen@...escale.com,
	grant.likely@...retlab.ca, r.herring@...escale.com,
	linux-arm-kernel@...ts.infradead.org, daniel@...aq.de,
	bryan.wu@...onical.com, valentin.longchamp@...l.ch
Subject: Re: [PATCHv2 03/11] mxc: Fix Drive Strength Field in the IOMUX
	controller

On Tue, Feb 02, 2010 at 10:29:50PM -0800, Eric Miao wrote:
> On Tue, Feb 2, 2010 at 9:16 PM, Amit Kucheria
> <amit.kucheria@...onical.com> wrote:
> > i.MX51 defines 4 values:
> >
> > 00: Low Drive Strength
> > 01: Medium Drive Strength
> > 10: High Drive Strength
> > 11: Max Drive Strength
> >
> > Signed-off-by: Amit Kucheria <amit.kucheria@...onical.com>
> > ---
> >  arch/arm/plat-mxc/include/mach/iomux-v3.h |    8 +++++---
> >  1 files changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
> > index 1deda01..f2f73d3 100644
> > --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
> > +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
> > @@ -81,11 +81,13 @@ struct pad_desc {
> >
> >  #define PAD_CTL_ODE                    (1 << 3)
> >
> > -#define PAD_CTL_DSE_STANDARD           (0 << 1)
> > -#define PAD_CTL_DSE_HIGH               (1 << 1)
> > -#define PAD_CTL_DSE_MAX                        (2 << 1)
> > +#define PAD_CTL_DSE_LOW                        (0 << 1)
> > +#define PAD_CTL_DSE_MED                        (1 << 1)
> > +#define PAD_CTL_DSE_HIGH               (2 << 1)
> > +#define PAD_CTL_DSE_MAX                        (3 << 1)
> >
> 
> I'm seeing some changes in recent kernel with introduction of PAD_CTL_DRV_*,
> which also affects mx3, think it's a tough problem to keep backward
> compatibility
> now, one way out is to introduce maybe PAD_CTL_DRV_EXTREME specifically
> for imx51.

Given that the values are the same on i.MX3 and i.MX51 we could also
do a

#define PAD_CTL_DSE(x)	((x) << 1)

and add a comment for allowed values 0..2 for i.MX3 and 0..3 for i.MX51.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ