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Message-ID: <bd4cb8901002040704vcd2d8feo82e2e1c166a02669@mail.gmail.com>
Date:	Thu, 4 Feb 2010 16:04:17 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	linux-kernel@...r.kernel.org, mingo@...e.hu, paulus@...ba.org,
	davem@...emloft.net, fweisbec@...il.com, robert.richter@....com,
	perfmon2-devel@...ts.sf.net, eranian@...il.com
Subject: Re: [PATCH] perf_events: AMD event scheduling (v2)

On Thu, Feb 4, 2010 at 3:59 PM, Peter Zijlstra <peterz@...radead.org> wrote:
>
> On Thu, 2010-02-04 at 15:55 +0100, Peter Zijlstra wrote:
> > > +     if (boot_cpu_data.x86_max_cores < 2)
> > > +             return;
> >
> > So there are no single core AMD chips that have a NorthBridge PMU? What
> > about the recent 64bit single core laptop chips?
>
> D'0h, for those there is no need to create inter-cpu constraints.
>
Exactly!


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