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Message-ID: <bd4cb8901002040835n4b58f43fr3d8f0f710794c804@mail.gmail.com>
Date:	Thu, 4 Feb 2010 17:35:24 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	linux-kernel@...r.kernel.org, mingo@...e.hu, paulus@...ba.org,
	davem@...emloft.net, fweisbec@...il.com, robert.richter@....com,
	perfmon2-devel@...ts.sf.net, eranian@...il.com
Subject: Re: [PATCH] perf_events: AMD event scheduling (v2)

>> What I'm worried about is:
>>
>> CPU A and B are of the same NorthBridge and all node counters are taken.
>>
>> CPU-A                   CPU-B
>>
>> perf_disable();
>> event->pmu->disable(event)
>>  x86_pmu.put_event_constraint() /* free slot n */
>>
>>                        event->pmu->enable(event);
>>                          x86_schedule_events();
>>                            x86_pmu.get_event_constraint() /* grab slot n */
>>
>> event->pmu->enable(event)
>>  x86_schedule_events()
>>    x86_pmu.get_event_constraint() /* FAIL */
>> perf_enable();
>>
>> That means you cannot disable/enable the same event within a
>> perf_disable/enable section.
>>
> Yes but I would say that is because of the logic behind the enable/disable
> interface. Here you are disabling "for a short period", you know you're going
> to re-enable. Yet you are using an API that is a generic enable/disable.
> You would need to pass some argument to disable() to say "temporary"
> or "stop but don't release the resource".
>
I think if you were to distinguish between "stop the counter", and
"free the counter"
things would work better here.
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