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Date:	Sat, 13 Feb 2010 12:06:12 +0100
From:	Joerg Roedel <joro@...tes.org>
To:	Joerg Roedel <joerg.roedel@....com>
Cc:	Ingo Molnar <mingo@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86: Print AMD virtualization features in /proc/cpuinfo

Ping.

On Fri, Feb 05, 2010 at 01:51:00PM +0100, Joerg Roedel wrote:
> Are there any problems with this patch or was it just forgotten :-)
> Please let me know.
> 
> 	Joerg
> 
> On Mon, Dec 14, 2009 at 01:08:41PM +0100, Joerg Roedel wrote:
> > This patch adds code to cpu initialization path to detect
> > the extended virtualization features of AMD cpus to show
> > them in /proc/cpuinfo.
> > 
> > Signed-off-by: Joerg Roedel <joerg.roedel@....com>
> > ---
> >  arch/x86/include/asm/cpufeature.h          |    4 ++++
> >  arch/x86/kernel/cpu/addon_cpuid_features.c |    4 ++++
> >  2 files changed, 8 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> > index 613700f..7dbc1c2 100644
> > --- a/arch/x86/include/asm/cpufeature.h
> > +++ b/arch/x86/include/asm/cpufeature.h
> > @@ -167,6 +167,10 @@
> >  #define X86_FEATURE_FLEXPRIORITY (8*32+ 2) /* Intel FlexPriority */
> >  #define X86_FEATURE_EPT         (8*32+ 3) /* Intel Extended Page Table */
> >  #define X86_FEATURE_VPID        (8*32+ 4) /* Intel Virtual Processor ID */
> > +#define X86_FEATURE_NPT		(8*32+5)  /* AMD Nested Page Table support */
> > +#define X86_FEATURE_LBRV	(8*32+6)  /* AMD LBR Virtualization support */
> > +#define X86_FEATURE_SVML	(8*32+7)  /* "svm_lock" AMD SVM locking MSR */
> > +#define X86_FEATURE_NRIPS	(8*32+8)  /* "nrip_save" AMD SVM next_rip save */
> >  
> >  #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
> >  
> > diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
> > index 468489b..97ad79c 100644
> > --- a/arch/x86/kernel/cpu/addon_cpuid_features.c
> > +++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
> > @@ -32,6 +32,10 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
> >  	static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
> >  		{ X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
> >  		{ X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
> > +		{ X86_FEATURE_NPT,   CR_EDX, 0, 0x8000000a },
> > +		{ X86_FEATURE_LBRV,  CR_EDX, 1, 0x8000000a },
> > +		{ X86_FEATURE_SVML,  CR_EDX, 2, 0x8000000a },
> > +		{ X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a },
> >  		{ 0, 0, 0, 0 }
> >  	};
> >  
> > -- 
> > 1.6.5.4
> > 
> 
> --
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