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Message-ID: <1266401149.16346.276.camel@pasglop>
Date: Wed, 17 Feb 2010 21:05:49 +1100
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: Russell King - ARM Linux <linux@....linux.org.uk>
Cc: Oliver Neukum <oliver@...kum.org>,
"Shilimkar, Santosh" <santosh.shilimkar@...com>,
Matthew Dharm <mdharm-kernel@...-eyed-alien.net>,
Ming Lei <tom.leiming@...il.com>,
"Mankad, Maulik Ojas" <x0082077@...com>,
Sergei Shtylyov <sshtylyov@...mvista.com>,
Catalin Marinas <catalin.marinas@....com>,
Sebastian Siewior <bigeasy@...utronix.de>,
"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Pavel Machek <pavel@....cz>, Greg KH <greg@...ah.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: USB mass storage and ARM cache coherency
On Wed, 2010-02-17 at 09:55 +0000, Russell King - ARM Linux wrote:
> Nope. It's to do with mapping a buffer for DMA, and then doing PIO
> reads/writes to it.
>
> With speculative prefetches, you have to deal with cache coherency with
> hardware DMA on DMA unmap. If you've written to the buffer in violation
> of the DMA API buffer ownership rules, then your writes get thrown away
> resulting in immediate data corruption.
Right, and this exact same problem will bite some embedded powerpc
too I suppose :-)
Hrm... actually not :-) We don't do the invalidate at unmap time
today because we know 44x have such a broken prefetcher that we disable
it ... interesting considering that there are machines around that
do non-coherent DMA with 750's style chips who -do- have a prefetcher...
damn, we have a bug :-)
In any case, same problem here.
See my reply to Oliver. Basically, the problem boils down to the
dma_map/unmap being done at the wrong layer. The driver should
simply not do these if it's going to do PIO over that range.
Cheers,
Ben.
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