linux-kernel - Re: USB mass storage and ARM cache coherency

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Message-ID: <1266439020.16346.285.camel@pasglop>
Date:	Thu, 18 Feb 2010 07:37:00 +1100
From:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:	Catalin Marinas <catalin.marinas@....com>
Cc:	Oliver Neukum <oliver@...kum.org>,
	"Shilimkar, Santosh" <santosh.shilimkar@...com>,
	Matthew Dharm <mdharm-kernel@...-eyed-alien.net>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	Ming Lei <tom.leiming@...il.com>,
	"Mankad, Maulik Ojas" <x0082077@...com>,
	Sergei Shtylyov <sshtylyov@...mvista.com>,
	Sebastian Siewior <bigeasy@...utronix.de>,
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Pavel Machek <pavel@....cz>, Greg KH <greg@...ah.com>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: USB mass storage and ARM cache coherency

On Wed, 2010-02-17 at 15:27 +0000, Catalin Marinas wrote:
> We do the same on ARM. The problem with most (all) HCD drivers that do
> PIO is that they copy the data to the transfer buffer but there is no
> call in this driver to flush_dcache_page(). The upper mass storage or
> filesystem layers don't call this function either, so there isn't
> anything that would set the PG_arch1 bit. 

Actually, clear it :-)

I suppose that's one thing that needs to be fixed in the drivers.

Cheers,
Ben.


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