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Message-Id: <201002192153.22159.oliver@neukum.org>
Date:	Fri, 19 Feb 2010 21:53:22 +0100
From:	Oliver Neukum <oliver@...kum.org>
To:	Catalin Marinas <catalin.marinas@....com>
Cc:	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Matthew Dharm <mdharm-kernel@...-eyed-alien.net>,
	linux-usb@...r.kernel.org,
	"Russell King - ARM Linux" <linux@....linux.org.uk>,
	"Mankad,Maulik Ojas" <x0082077@...com>,
	Sergei Shtylyov <sshtylyov@...mvista.com>,
	Ming Lei <tom.leiming@...il.com>,
	Sebastian Siewior <bigeasy@...utronix.de>,
	"linux-kernel" <linux-kernel@...r.kernel.org>,
	"Shilimkar,Santosh" <santosh.shilimkar@...com>,
	Pavel Machek <pavel@....cz>, Greg KH <greg@...ah.com>,
	"linux-arm-kernel" <linux-arm-kernel@...ts.infradead.org>,
	James Bottomley <James.Bottomley@...senpartnership.com>
Subject: Re: USB mass storage and ARM cache coherency

Am Freitag, 19. Februar 2010 18:36:51 schrieb Catalin Marinas:
> If a page is already mapped in user space, flush_dcache_page() on ARM
> does the flushing rather than deferring it to update_mmu_cache(). The
> PIO HCD drivers, however, don't call flush_dcache_page(). Is it possible
> that the HCD could transfer data into a page cache page already mapped
> in user space? My understanding is that the scenario above is possible.

Yes, video drivers do that.

	Regards
		Oliver
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