linux-kernel - Re: UIO support for >32-bit physical addresses on 32-bit platforms

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Date:	Tue, 23 Feb 2010 16:52:56 -0600
From:	Kumar Gala <galak@...nel.crashing.org>
To:	"Hans J. Koch" <hjk@...utronix.de>
Cc:	Greg KH <gregkh@...e.de>,
	"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>
Subject: Re: UIO support for >32-bit physical addresses on 32-bit platforms


On Feb 23, 2010, at 1:49 PM, Hans J. Koch wrote:

> On Tue, Feb 23, 2010 at 07:01:41AM -0800, Greg KH wrote:
>> On Tue, Feb 23, 2010 at 08:54:16AM -0600, Kumar Gala wrote:
>>> Hans, Greg,
>>> 
>>> We are looking at using UIO for some driver work and noticed it
>>> assumes the address for MMIO regions is an 'unsigned long'.  This is a
>>> problem for the platforms we have in which we support a 36-bit
>>> physical address in a 32-bit machine.
>>> 
>>> Should we just change addr/size in struct uio_mem to u64 always?
> 
> No, if I didn't miss something important, it's not feasible IMHO.
> 
>>> At
>>> first I was thinking phys_addr_t but realized the addr could be PHYS,
>>> LOGICAL, or VIRTUAL.
>> 
>> I think that would work out fine, Hans, any ideas if this would cause
>> any problems with existing code or not?
> 
> It won't work. This is not a UIO problem. UIO just passes addr to other
> system functions, and all of them use "unsigned long" for these addresses.
> You'd have to change the whole memory management code.
> 
> Note that members vm_start and vm_end in struct vm_area_struct are
> also unsigned long. Having an u64 in the UIO core doesn't help at all.

This already works for mmap since we pass down a PFN and not an address to remap_pfn_range.  While we can handle any physical address size we can handle one up to 44 bits on most architectures which is well beyond the 36-bit physical address case I'm dealing with on PPC.

> Memory above the 4G border can only be accessed through himem mechanisms
> or be mapped to an address below that border in lowlevel arch code.
> 
> In most cases, I'd say it's bad board design to have memory-mapped hardware
> above the 4G border on a 32-bit machine.

While I might agree with you its a reality on a number of embedded processors and I know three different PowerPC based embedded families that have 36-bit physical addressing to allow for >4G of DDR and thus IO ends up being above the 4G physical boundary and we already support these in the kernel.

- k--
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