linux-kernel - [tip:x86/mrst] x86, apbt: Moorestown APB system timer driver

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Message-ID: <tip-aa19febbc933936219c59ac83e61049fc7136e62@git.kernel.org>
Date:	Wed, 24 Feb 2010 08:09:06 GMT
From:	tip-bot for Jacob Pan <jacob.jun.pan@...el.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	jacob.jun.pan@...el.com, tglx@...utronix.de
Subject: [tip:x86/mrst] x86, apbt: Moorestown APB system timer driver

Commit-ID:  aa19febbc933936219c59ac83e61049fc7136e62
Gitweb:     http://git.kernel.org/tip/aa19febbc933936219c59ac83e61049fc7136e62
Author:     Jacob Pan <jacob.jun.pan@...el.com>
AuthorDate: Wed, 2 Sep 2009 07:37:17 -0700
Committer:  H. Peter Anvin <hpa@...or.com>
CommitDate: Tue, 23 Feb 2010 23:15:19 -0800

x86, apbt: Moorestown APB system timer driver

Moorestown platform does not have PIT or HPET platform timers.  Instead it
has a bank of eight APB timers.  The number of available timers to the os
is exposed via SFI mtmr tables.  All APB timer interrupts are routed via
ioapic rtes and delivered as MSI.
Currently, we use timer 0 and 1 for per cpu clockevent devices, timer 2
for clocksource.

Signed-off-by: Jacob Pan <jacob.jun.pan@...el.com>
LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D2D2@...msx508.amr.corp.intel.com>
Signed-off-by: H. Peter Anvin <hpa@...or.com>
---
 Documentation/kernel-parameters.txt |    6 ++++++
 arch/x86/Kconfig                    |   11 +++++++++++
 arch/x86/kernel/Makefile            |    1 +
 3 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 51bceb0..9172204 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2793,6 +2793,12 @@ and is between 256 and 4096 characters. It is defined in the file
 			default x2apic cluster mode on platforms
 			supporting x2apic.
 
+	x86_mrst_timer= [X86-32,APBT]
+			Choose timer option for x86 Moorestown MID platform.
+			Two valid options are apbt timer only and lapic timer
+			plus one apbt timer for broadcast timer.
+			x86_mrst_timer=apbt_only | lapic_and_apbt
+
 	xd=		[HW,XT] Original XT pre-IDE (RLL encoded) disks.
 	xd_geo=		See header of drivers/block/xd.c.
 
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index eb40925..0ab2dce 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -390,6 +390,7 @@ config X86_MRST
        bool "Moorestown MID platform"
 	depends on X86_32
 	depends on X86_EXTENDED_PLATFORM
+	select APB_TIMER
 	---help---
 	  Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
 	  Internet Device(MID) platform. Moorestown consists of two chips:
@@ -612,6 +613,16 @@ config HPET_EMULATE_RTC
 	def_bool y
 	depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
 
+config APB_TIMER
+       def_bool y if MRST
+       prompt "Langwell APB Timer Support" if X86_MRST
+       help
+         APB timer is the replacement for 8254, HPET on X86 MID platforms.
+         The APBT provides a stable time base on SMP
+         systems, unlike the TSC, but it is more expensive to access,
+         as it is off-chip. APB timers are always running regardless of CPU
+         C states, they are used as per CPU clockevent device when possible.
+
 # Mark as embedded because too many people got it wrong.
 # The code disables itself when not needed.
 config DMI
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index d87f09b..4c58352 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -87,6 +87,7 @@ obj-$(CONFIG_VM86)		+= vm86_32.o
 obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
 
 obj-$(CONFIG_HPET_TIMER) 	+= hpet.o
+obj-$(CONFIG_APB_TIMER)		+= apb_timer.o
 
 obj-$(CONFIG_K8_NB)		+= k8.o
 obj-$(CONFIG_DEBUG_RODATA_TEST)	+= test_rodata.o
--
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