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Message-ID: <20100226210030.GC23933@n2100.arm.linux.org.uk>
Date: Fri, 26 Feb 2010 21:00:30 +0000
From: Russell King - ARM Linux <linux@....linux.org.uk>
To: Catalin Marinas <catalin.marinas@....com>
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Matthew Dharm <mdharm-kernel@...-eyed-alien.net>,
linux-usb@...r.kernel.org, "Mankad,Maulik Ojas" <x0082077@...com>,
Sergei Shtylyov <sshtylyov@...mvista.com>,
Ming Lei <tom.leiming@...il.com>,
Sebastian Siewior <bigeasy@...utronix.de>,
Oliver Neukum <oliver@...kum.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
"Shilimkar,Santosh" <santosh.shilimkar@...com>,
Pavel Machek <pavel@....cz>, Greg KH <greg@...ah.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
James Bottomley <James.Bottomley@...senPartnership.com>
Subject: Re: USB mass storage and ARM cache coherency
On Fri, Feb 26, 2010 at 04:25:21PM +0000, Catalin Marinas wrote:
> For mmap'ed pages (and present in the page cache), is it guaranteed that
> the HCD driver won't write to it once it has been mapped into user
> space? If that's the case, it may solve the problem by just reversing
> the meaning of PG_arch_1 on ARM and assume that a newly allocated page
> has dirty D-cache by default.
I guess we could also set PG_arch_1 in the DMA API as well, to avoid the
unnecessary D cache flushing when clean pages get mapped into userspace.
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