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Date: Tue, 2 Mar 2010 22:16:26 -0800
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: mingo@...hat.com, hpa@...or.com, linux-kernel@...r.kernel.org,
tglx@...utronix.de, mingo@...e.hu,
linux-tip-commits@...r.kernel.org
Subject: Re: [tip:perf/core] perf_events, x86: Fixup fixed counter constraints
On Tue, Mar 2, 2010 at 9:54 AM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Tue, 2010-03-02 at 17:26 +0100, Stephane Eranian wrote:
>> > @@ -37,14 +43,16 @@ static struct event_constraint intel_core2_event_constraints[] =
>> > INTEL_EVENT_CONSTRAINT(0x18, 0x1), /* IDLE_DURING_DIV */
>> > INTEL_EVENT_CONSTRAINT(0x19, 0x2), /* DELAYED_BYPASS */
>> > INTEL_EVENT_CONSTRAINT(0xa1, 0x1), /* RS_UOPS_DISPATCH_CYCLES */
>> > + INTEL_EVENT_CONSTRAINT(0xc9, 0x1), /* ITLB_MISS_RETIRED (T30-9) */
>>
>> Where does the constraint on ITLB_MISS_RETIRED come from?
>
> Intel® 64 and IA-32 Architectures Software Developer’s Manual
> Volume 3B: System Programming Guide, Part 2
>
> Dec 2009 (253669)
>
> Section 30.4.3, Table 30-9
>
I am not so sure about this one. I will double check.
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