linux-kernel - Re: USB mass storage and ARM cache coherency

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Date:	Wed, 3 Mar 2010 15:35:48 +0900
From:	FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>
To:	benh@...nel.crashing.org
Cc:	fujita.tomonori@....ntt.co.jp, catalin.marinas@....com,
	mdharm-kernel@...-eyed-alien.net, oliver@...kum.org,
	linux@....linux.org.uk, greg@...ah.com, x0082077@...com,
	sshtylyov@...mvista.com, bigeasy@...utronix.de,
	linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org,
	James.Bottomley@...senPartnership.com, santosh.shilimkar@...com,
	pavel@....cz, tom.leiming@...il.com,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: USB mass storage and ARM cache coherency

On Wed, 03 Mar 2010 16:10:32 +1100
Benjamin Herrenschmidt <benh@...nel.crashing.org> wrote:

> On Wed, 2010-03-03 at 12:47 +0900, FUJITA Tomonori wrote:
> > The ways to improve the approach (introducing PG_arch_2 or marking a
> > page clean on dma_unmap_* with DMA_FROM_DEVICE like ia64 does) is up
> > to architectures. 
> 
> How does the above work ? IE, the dma unmap will flush the D side but
> not the I side ... or is the ia64 flush primitive magic enough to do
> both ?

On ia64 platform, I (and D) cache is coherent with the memory that you
did DMA to, I think. But better to ask an ia64 guru. :)
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