[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <bd4cb8901003051128l67a52d38h17208ec340b86c4e@mail.gmail.com>
Date: Fri, 5 Mar 2010 11:28:36 -0800
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: mingo@...e.hu, linux-kernel@...r.kernel.org, paulus@...ba.org,
robert.richter@....com, fweisbec@...il.com,
Arnaldo Carvalho de Melo <acme@...radead.org>
Subject: Re: [PATCH 3/5] perf, x86: Disable PEBS on clowertown chips
On Fri, Mar 5, 2010 at 11:15 AM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Fri, 2010-03-05 at 10:58 -0800, Stephane Eranian wrote:
>> > case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
>> > + x86_pmu.quirks = intel_clowertown_quirks;
>>
>> That's too coarse grain!
>> It is more subtle than this. Some of the errata are marked as Plan
>> fix. They seem to be
>> fixed in later models. Your looking at the E5xxx series errata but the
>> E7xxx do not have
>> the same problems.
>
> OK, I'll look at those errata again and try to come up with a stepping
> test for this errata.
>
There is erratum which you need to implement the workaround for and
this is AAJ91 on Nehalem. It does happen.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists