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Date:	Fri, 5 Mar 2010 13:38:56 -0800
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	mingo@...e.hu, linux-kernel@...r.kernel.org, paulus@...ba.org,
	robert.richter@....com, fweisbec@...il.com,
	Arnaldo Carvalho de Melo <acme@...radead.org>
Subject: Re: [PATCH 3/5] perf, x86: Disable PEBS on clowertown chips

On Fri, Mar 5, 2010 at 1:35 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Fri, 2010-03-05 at 13:22 -0800, Stephane Eranian wrote:
>> > The two serious ones, AJ106 and AJ68 are no fix and are listed as such
>> > in all errata I can find, including the 7[23]00 series.
>> >
>> Not E74xx. I think it would be fine to drop LBR with PEBS as the work-around
>> to AJ106.
>>
>> > I checked the 65nm Core2Duo, Xeon 5200 and Xeon 7[23]00 spec updates.
>> > Going by that it seems the full model 15 family is broken and I'll leave
>> > the patch as is.
>>
>> But the E74xx are okay and you are excluding them. Worst case you should
>> provide an override.
>
> >From what I can tell E74xx is model 29, which would be just fine with
> this patch, this patch only marks model 15 as broken.
>
True, my bad.
So it would be a matter to provide some ways of disabling LBR with PEBS
on model 15.
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