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Message-ID: <4B977815.4000703@ru.mvista.com>
Date: Wed, 10 Mar 2010 13:44:37 +0300
From: Sergei Shtylyov <sshtylyov@...sta.com>
To: Wu Zhangjin <wuzhangjin@...il.com>
CC: Ralf Baechle <ralf@...ux-mips.org>, Greg KH <gregkh@...e.de>,
linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
as BTB and RAS
Hello.
Wu Zhangjin wrote:
> From: Wu Zhangjin <wuzhangjin@...il.com>
>
> As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
> workaround the Issue of Loongson-2F,We need to do:
>
> "When switching from user model to kernel model, you should flush the branch
> target history such as BTB and RAS."
>
> This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
> via Loongson-2F's 64bit diagnostic register.
>
> [1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
> [2] English Version of Chapter 15:
> http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
>
> Signed-off-by: Wu Zhangjin <wuzhangjin@...il.com>
> ---
> arch/mips/include/asm/stackframe.h | 19 +++++++++++++++++++
> 1 files changed, 19 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
> index 3b6da33..b84cfda 100644
> --- a/arch/mips/include/asm/stackframe.h
> +++ b/arch/mips/include/asm/stackframe.h
> @@ -121,6 +121,25 @@
> .endm
> #else
> .macro get_saved_sp /* Uniprocessor variation */
> +#ifdef CONFIG_CPU_LOONGSON2F
> + /*
> + * Clear BTB(branch target buffer), forbid RAS(row address
> + * strobe)
No spaces before the left paren...
> to workaround the Out-of-oder Issue in Loongson2F
> + * via it's diagnostic register.
>
Only "its".
> + */
> + move k0, ra
>
Operands misalined...
WBR, Sergei
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