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Message-ID: <tip-12ab854d744f04bfc5c6c4db723b7e31fc03eb29@git.kernel.org>
Date: Wed, 10 Mar 2010 13:23:25 GMT
From: tip-bot for Peter Zijlstra <a.p.zijlstra@...llo.nl>
To: linux-tip-commits@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
acme@...radead.org, a.p.zijlstra@...llo.nl, tglx@...utronix.de,
mingo@...e.hu
Subject: [tip:perf/pebs] perf, x86: Deal with multiple state bits for pebs-fmt1
Commit-ID: 12ab854d744f04bfc5c6c4db723b7e31fc03eb29
Gitweb: http://git.kernel.org/tip/12ab854d744f04bfc5c6c4db723b7e31fc03eb29
Author: Peter Zijlstra <a.p.zijlstra@...llo.nl>
AuthorDate: Sat, 6 Mar 2010 18:57:38 +0100
Committer: Ingo Molnar <mingo@...e.hu>
CommitDate: Wed, 10 Mar 2010 13:23:38 +0100
perf, x86: Deal with multiple state bits for pebs-fmt1
Its unclear if the PEBS state record will have only a single bit set, in
case it does not and accumulates bits, deal with that by only processing
each event once.
Also, robustify some of the code.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Arnaldo Carvalho de Melo <acme@...radead.org>
Cc: paulus@...ba.org
Cc: eranian@...gle.com
Cc: robert.richter@....com
Cc: fweisbec@...il.com
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
arch/x86/kernel/cpu/perf_event_intel_ds.c | 16 +++++++++++++---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 9ad0e67..b4680da 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -538,6 +538,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
struct perf_event *event = NULL;
struct perf_raw_record raw;
struct pt_regs regs;
+ u64 status = 0;
int bit, n;
if (!ds || !x86_pmu.pebs)
@@ -561,13 +562,22 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
for ( ; at < top; at++) {
for_each_bit(bit, (unsigned long *)&at->status, MAX_PEBS_EVENTS) {
- if (!cpuc->events[bit]->attr.precise)
+ event = cpuc->events[bit];
+ if (!test_bit(bit, cpuc->active_mask))
continue;
- event = cpuc->events[bit];
+ WARN_ON_ONCE(!event);
+
+ if (!event->attr.precise)
+ continue;
+
+ if (__test_and_set_bit(bit, (unsigned long *)&status))
+ continue;
+
+ break;
}
- if (!event)
+ if (!event || bit >= MAX_PEBS_EVENTS)
continue;
if (!intel_pmu_save_and_restart(event))
--
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