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Message-ID: <1268278520.17798.5.camel@falcon>
Date: Thu, 11 Mar 2010 11:35:20 +0800
From: Wu Zhangjin <wuzhangjin@...il.com>
To: Shinya Kuribayashi <shinya.kuribayashi@...el.com>
Cc: Ralf Baechle <ralf@...ux-mips.org>, Greg KH <gregkh@...e.de>,
linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
zhangfx <zhangfx@...ote.com>, yanh <yanh@...toe.com>
Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
as BTB and RAS
On Thu, 2010-03-11 at 12:27 +0900, Shinya Kuribayashi wrote:
> Wu Zhangjin wrote:
> > From: Wu Zhangjin <wuzhangjin@...il.com>
> >
> > As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
> > workaround the Issue of Loongson-2F,We need to do:
> >
> > "When switching from user model to kernel model, you should flush the branch
> > target history such as BTB and RAS."
>
> Just wondered, model or mode?
>
Hmm, should be mode.
> > This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
> > via Loongson-2F's 64bit diagnostic register.
>
> Are you sure that RAS represents "Row Address Strobe", not "Return
> Address Stack?"
>
Hi, Yanhua(from Lemote), can you help to clear this part?
> By the way, we have a similar local workaround for vr55xx processors
> when switching from kernel mode to user mode. It's not necessarily
> related to out-of-order issues, but we need to prevent the processor
> from doing instruction prefetch beyond "eret" instruction.
>
> In the long term, it would be appreciated that the kernel has a set
> of hooks when switching KUX-modes, so that each machine could have
> his own, processor-specific treatmens.
>
Good idea.
Thanks!
Regards,
Wu Zhangjin
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