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Message-Id: <20100313.121248.76758764.davem@davemloft.net>
Date: Sat, 13 Mar 2010 12:12:48 -0800 (PST)
From: David Miller <davem@...emloft.net>
To: stefani@...bold.net
Cc: linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH] fix PHY polling system blocking
From: Stefani Seibold <stefani@...bold.net>
Date: Sat, 13 Mar 2010 13:53:10 +0100
> For PHY chips without interrupts, the status of the ethernet will be
> polled every 2 sec. The poll function will read some register of the MII
> PHY. The time between the sending the MII_READ_COMMAND and receiving the
> result could be very long (>100us).
I'm not apply this, as I described in my previous email.
If it's expensive to detect link configuration changes that
doesn't mean you just turn it off.
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