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Message-ID: <4B9FCC42.2080709@cn.fujitsu.com>
Date: Wed, 17 Mar 2010 02:21:54 +0800
From: Xiao Guangrong <xiaoguangrong@...fujitsu.com>
To: Avi Kivity <avi@...hat.com>
CC: Sheng Yang <sheng@...ux.intel.com>,
Marcelo Tosatti <mtosatti@...hat.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: [PATCH] KVM MMU: check reserved bits only if CR4.PSE=1 or CR4.PAE=1
The RSV bit is possibility set in error code when #PF occurred
only if CR4.PSE=1 or CR4.PAE=1
Signed-off-by: Xiao Guangrong <xiaoguangrong@...fujitsu.com>
---
arch/x86/kvm/mmu.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 741373e..36e50ab 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -2270,6 +2270,9 @@ static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
{
int bit7;
+ if (!is_pae(vcpu) && !is_pse(vcpu))
+ return 0;
+
bit7 = (gpte >> 7) & 1;
return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
}
--
1.6.1.2
--
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