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Message-ID: <tip-7335f75e9ca166044e38a96abad422d8e6e364b5@git.kernel.org>
Date:	Thu, 18 Mar 2010 17:37:45 GMT
From:	tip-bot for Cyrill Gorcunov <gorcunov@...nvz.org>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	gorcunov@...nvz.org, tglx@...utronix.de, mingo@...e.hu
Subject: [tip:perf/core] x86, perf: Use apic_write unconditionally

Commit-ID:  7335f75e9ca166044e38a96abad422d8e6e364b5
Gitweb:     http://git.kernel.org/tip/7335f75e9ca166044e38a96abad422d8e6e364b5
Author:     Cyrill Gorcunov <gorcunov@...nvz.org>
AuthorDate: Wed, 17 Mar 2010 13:37:01 +0300
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Thu, 18 Mar 2010 17:03:22 +0100

x86, perf: Use apic_write unconditionally

Since apic_write() maps to a plain noop in the !CONFIG_X86_LOCAL_APIC
case we're safe to remove this conditional compilation and clean up
the code a bit.

Signed-off-by: Cyrill Gorcunov <gorcunov@...nvz.org>
Cc: fweisbec@...il.com
Cc: acme@...hat.com
Cc: eranian@...gle.com
Cc: peterz@...radead.org
LKML-Reference: <20100317104356.232371479@...nvz.org>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/kernel/cpu/perf_event.c    |    4 ----
 arch/x86/kernel/cpu/perf_event_p4.c |    2 --
 2 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index c97d5b5..14eca80 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1136,7 +1136,6 @@ void set_perf_event_pending(void)
 
 void perf_events_lapic_init(void)
 {
-#ifdef CONFIG_X86_LOCAL_APIC
 	if (!x86_pmu.apic || !x86_pmu_initialized())
 		return;
 
@@ -1144,7 +1143,6 @@ void perf_events_lapic_init(void)
 	 * Always use NMI for PMU
 	 */
 	apic_write(APIC_LVTPC, APIC_DM_NMI);
-#endif
 }
 
 static int __kprobes
@@ -1168,9 +1166,7 @@ perf_event_nmi_handler(struct notifier_block *self,
 
 	regs = args->regs;
 
-#ifdef CONFIG_X86_LOCAL_APIC
 	apic_write(APIC_LVTPC, APIC_DM_NMI);
-#endif
 	/*
 	 * Can't rely on the handled return value to say it was our NMI, two
 	 * events could trigger 'simultaneously' raising two back-to-back NMIs.
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index a11ce73..0367889 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -363,10 +363,8 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
 	}
 
 	if (handled) {
-#ifdef CONFIG_X86_LOCAL_APIC
 		/* p4 quirk: unmask it again */
 		apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
-#endif
 		inc_irq_stat(apic_perf_irqs);
 	}
 
--
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