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Message-ID: <19364.58488.817538.692599@pilspetsen.it.uu.se>
Date: Sat, 20 Mar 2010 16:06:32 +0100
From: Mikael Pettersson <mikpe@...uu.se>
To: David Woodhouse <dwmw2@...radead.org>
Cc: Paulius Zaleckas <paulius.zaleckas@...il.com>, nico@....org,
rth@...ddle.net, nico@...xnic.net, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org, u.kleine-koenig@...gutronix.de,
simon.kagstrom@...insight.net, akpm@...ux-foundation.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] MTD: Fix Orion NAND driver compilation with ARM OABI
David Woodhouse writes:
> On Sat, 2010-03-20 at 13:20 +0200, Paulius Zaleckas wrote:
> > On Sat, Mar 20, 2010 at 11:41 AM, David Woodhouse <dwmw2@...radead.org> wrote:
> > > On Sat, 2010-03-20 at 10:55 +0200, Paulius Zaleckas wrote:
> > >> - uint64_t x;
> > >> + /*
> > >> + * force x variable to r2/r3 registers since ldrd instruction
> > >> + * requires first register to be even.
> > >> + */
> > >> + register uint64_t x asm ("r2");
> > >> +
> > >> asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
> > >
> > > Hm, isn't there an asm constraint which will force it into an
> > > appropriate register pair?
> >
> > Not that I know of...
> >
> > > Failing that, "=&r2,r4,r6,r8" ought to work.
> >
> > No, fails with error: matching constraint not valid in output operand
>
> Hm, crap -- GCC on ARM doesn't let you give specific registers, so that
> trick doesn't work.
I missed the start of this thread, but looking at orion_nand.c I fail to
see why you'd need to mess with inline asm for reading a sequence of u64
values from an I/O location to an array.
Rewriting that to proper C generates a nice ldrd;strd loop with my gcc-4.4.3.
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