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Message-ID: <badfd5ba1003200420xc0680c1h8b4cccd02a8fdaba@mail.gmail.com>
Date: Sat, 20 Mar 2010 13:20:50 +0200
From: Paulius Zaleckas <paulius.zaleckas@...il.com>
To: David Woodhouse <dwmw2@...radead.org>
Cc: nico@...xnic.net, akpm@...ux-foundation.org,
u.kleine-koenig@...gutronix.de, simon.kagstrom@...insight.net,
linux-mtd@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MTD: Fix Orion NAND driver compilation with ARM OABI
On Sat, Mar 20, 2010 at 11:41 AM, David Woodhouse <dwmw2@...radead.org> wrote:
> On Sat, 2010-03-20 at 10:55 +0200, Paulius Zaleckas wrote:
>> We must tell GCC to use even register for variable passed
>> to ldrd instruction. Without this patch GCC 4.2.1 puts this
>> variable to r2/r3 on EABI and r3/r4 on OABI, so force it to
>> r2/r3. This does not change anything when EABI and OABI
>> compilation works OK.
>>
>> Without this patch and with OABI I get:
>> /tmp/ccMkwOCs.s:63: Error: first destination register must be even -- `ldrd r3,[ip]'
>> make[5]: *** [drivers/mtd/nand/orion_nand.o] Error 1
>
> ...
>> - uint64_t x;
>> + /*
>> + * force x variable to r2/r3 registers since ldrd instruction
>> + * requires first register to be even.
>> + */
>> + register uint64_t x asm ("r2");
>> +
>> asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
>
> Hm, isn't there an asm constraint which will force it into an
> appropriate register pair?
Not that I know of...
> Failing that, "=&2,4,6,8" ought to work.
No, fails with error: matching constraint not valid in output operand
> (Um, and why the earlyclobber? Why can't io_base be passed in in one of
> the same registers?)
>
> We should try to avoid making our constraints more restrictive than they
> need to be.
>
> --
> David Woodhouse Open Source Technology Centre
> David.Woodhouse@...el.com Intel Corporation
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