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Message-ID: <Pine.LNX.4.64.1003212017420.12371@ask.diku.dk>
Date: Sun, 21 Mar 2010 20:35:19 +0100 (CET)
From: Julia Lawall <julia@...u.dk>
To: "Eric W. Biederman" <ebiederm@...ssion.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Yinghai Lu <yinghai@...nel.org>, Ingo Molnar <mingo@...e.hu>,
"H. Peter Anvin" <hpa@...or.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Suresh Siddha <suresh.b.siddha@...el.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 06/12] genericirq: make irq_chip related function to take
desc
Here is the patch that is generated by my semantic patch. Perhaps it is
not safe to just apply it, but it might be useful as a reference.
diff -u -p a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -56,7 +56,7 @@ int irq_select_affinity(unsigned int irq
last_cpu = cpu;
cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
- irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
+ irq_desc[irq].chip->set_affinity(irq_to_desc(irq), cpumask_of(cpu));
return 0;
}
#endif /* CONFIG_SMP */
diff -u -p a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -218,8 +218,8 @@ process_mcheck_info(unsigned long vector
* processed by PALcode, and comes in via entInt vector 1.
*/
-static void rtc_enable_disable(unsigned int irq) { }
-static unsigned int rtc_startup(unsigned int irq) { return 0; }
+static void rtc_enable_disable(struct irq_desc *unused) { }
+static unsigned int rtc_startup(struct irq_desc *unused) { return 0; }
struct irqaction timer_irqaction = {
.handler = timer_interrupt,
diff -u -p a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c
--- a/arch/alpha/kernel/irq_i8259.c
+++ b/arch/alpha/kernel/irq_i8259.c
@@ -33,8 +33,9 @@ i8259_update_irq_hw(unsigned int irq, un
}
inline void
-i8259a_enable_irq(unsigned int irq)
+i8259a_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&i8259_irq_lock);
i8259_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq));
spin_unlock(&i8259_irq_lock);
@@ -47,16 +48,18 @@ __i8259a_disable_irq(unsigned int irq)
}
void
-i8259a_disable_irq(unsigned int irq)
+i8259a_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&i8259_irq_lock);
__i8259a_disable_irq(irq);
spin_unlock(&i8259_irq_lock);
}
void
-i8259a_mask_and_ack_irq(unsigned int irq)
+i8259a_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&i8259_irq_lock);
__i8259a_disable_irq(irq);
@@ -70,17 +73,17 @@ i8259a_mask_and_ack_irq(unsigned int irq
}
unsigned int
-i8259a_startup_irq(unsigned int irq)
+i8259a_startup_irq(struct irq_desc *desc)
{
- i8259a_enable_irq(irq);
+ i8259a_enable_irq(desc);
return 0; /* never anything pending */
}
void
-i8259a_end_irq(unsigned int irq)
+i8259a_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- i8259a_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ i8259a_enable_irq(desc);
}
struct irq_chip i8259a_irq_type = {
diff -u -p a/arch/alpha/kernel/irq_impl.h b/arch/alpha/kernel/irq_impl.h
--- a/arch/alpha/kernel/irq_impl.h
+++ b/arch/alpha/kernel/irq_impl.h
@@ -31,11 +31,11 @@ extern void init_rtc_irq(void);
extern void common_init_isa_dma(void);
-extern void i8259a_enable_irq(unsigned int);
-extern void i8259a_disable_irq(unsigned int);
-extern void i8259a_mask_and_ack_irq(unsigned int);
-extern unsigned int i8259a_startup_irq(unsigned int);
-extern void i8259a_end_irq(unsigned int);
+extern void i8259a_enable_irq(struct irq_desc *);
+extern void i8259a_disable_irq(struct irq_desc *);
+extern void i8259a_mask_and_ack_irq(struct irq_desc *);
+extern unsigned int i8259a_startup_irq(struct irq_desc *);
+extern void i8259a_end_irq(struct irq_desc *);
extern struct irq_chip i8259a_irq_type;
extern void init_i8259a_irqs(void);
diff -u -p a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c
--- a/arch/alpha/kernel/irq_pyxis.c
+++ b/arch/alpha/kernel/irq_pyxis.c
@@ -29,34 +29,37 @@ pyxis_update_irq_hw(unsigned long mask)
}
static inline void
-pyxis_enable_irq(unsigned int irq)
+pyxis_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pyxis_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
}
static void
-pyxis_disable_irq(unsigned int irq)
+pyxis_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
}
static unsigned int
-pyxis_startup_irq(unsigned int irq)
+pyxis_startup_irq(struct irq_desc *desc)
{
- pyxis_enable_irq(irq);
+ pyxis_enable_irq(desc);
return 0;
}
static void
-pyxis_end_irq(unsigned int irq)
+pyxis_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- pyxis_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ pyxis_enable_irq(desc);
}
static void
-pyxis_mask_and_ack_irq(unsigned int irq)
+pyxis_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long bit = 1UL << (irq - 16);
unsigned long mask = cached_irq_mask &= ~bit;
diff -u -p a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c
--- a/arch/alpha/kernel/irq_srm.c
+++ b/arch/alpha/kernel/irq_srm.c
@@ -18,33 +18,35 @@
DEFINE_SPINLOCK(srm_irq_lock);
static inline void
-srm_enable_irq(unsigned int irq)
+srm_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&srm_irq_lock);
cserve_ena(irq - 16);
spin_unlock(&srm_irq_lock);
}
static void
-srm_disable_irq(unsigned int irq)
+srm_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&srm_irq_lock);
cserve_dis(irq - 16);
spin_unlock(&srm_irq_lock);
}
static unsigned int
-srm_startup_irq(unsigned int irq)
+srm_startup_irq(struct irq_desc *desc)
{
- srm_enable_irq(irq);
+ srm_enable_irq(desc);
return 0;
}
static void
-srm_end_irq(unsigned int irq)
+srm_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- srm_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ srm_enable_irq(desc);
}
/* Handle interrupts from the SRM, assuming no additional weirdness. */
diff -u -p a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c
--- a/arch/alpha/kernel/sys_alcor.c
+++ b/arch/alpha/kernel/sys_alcor.c
@@ -44,21 +44,24 @@ alcor_update_irq_hw(unsigned long mask)
}
static inline void
-alcor_enable_irq(unsigned int irq)
+alcor_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
alcor_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
}
static void
-alcor_disable_irq(unsigned int irq)
+alcor_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
}
static void
-alcor_mask_and_ack_irq(unsigned int irq)
+alcor_mask_and_ack_irq(struct irq_desc *desc)
{
- alcor_disable_irq(irq);
+ unsigned int irq = desc->irq;
+ alcor_disable_irq(desc);
/* On ALCOR/XLT, need to dismiss interrupt via GRU. */
*(vuip)GRU_INT_CLEAR = 1 << (irq - 16); mb();
@@ -66,15 +69,16 @@ alcor_mask_and_ack_irq(unsigned int irq)
}
static unsigned int
-alcor_startup_irq(unsigned int irq)
+alcor_startup_irq(struct irq_desc *desc)
{
- alcor_enable_irq(irq);
+ alcor_enable_irq(desc);
return 0;
}
static void
-alcor_isa_mask_and_ack_irq(unsigned int irq)
+alcor_isa_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
i8259a_mask_and_ack_irq(irq);
/* On ALCOR/XLT, need to dismiss interrupt via GRU. */
@@ -83,10 +87,10 @@ alcor_isa_mask_and_ack_irq(unsigned int
}
static void
-alcor_end_irq(unsigned int irq)
+alcor_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- alcor_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ alcor_enable_irq(desc);
}
static struct irq_chip alcor_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c
--- a/arch/alpha/kernel/sys_cabriolet.c
+++ b/arch/alpha/kernel/sys_cabriolet.c
@@ -46,29 +46,31 @@ cabriolet_update_irq_hw(unsigned int irq
}
static inline void
-cabriolet_enable_irq(unsigned int irq)
+cabriolet_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cabriolet_update_irq_hw(irq, cached_irq_mask &= ~(1UL << irq));
}
static void
-cabriolet_disable_irq(unsigned int irq)
+cabriolet_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cabriolet_update_irq_hw(irq, cached_irq_mask |= 1UL << irq);
}
static unsigned int
-cabriolet_startup_irq(unsigned int irq)
-{
- cabriolet_enable_irq(irq);
+cabriolet_startup_irq(struct irq_desc *desc)
+{
+ cabriolet_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-cabriolet_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- cabriolet_enable_irq(irq);
+cabriolet_end_irq(struct irq_desc *desc)
+{
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ cabriolet_enable_irq(desc);
}
static struct irq_chip cabriolet_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -98,8 +98,9 @@ tsunami_update_irq_hw(unsigned long mask
}
static void
-dp264_enable_irq(unsigned int irq)
+dp264_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&dp264_irq_lock);
cached_irq_mask |= 1UL << irq;
tsunami_update_irq_hw(cached_irq_mask);
@@ -107,8 +108,9 @@ dp264_enable_irq(unsigned int irq)
}
static void
-dp264_disable_irq(unsigned int irq)
+dp264_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&dp264_irq_lock);
cached_irq_mask &= ~(1UL << irq);
tsunami_update_irq_hw(cached_irq_mask);
@@ -116,22 +118,23 @@ dp264_disable_irq(unsigned int irq)
}
static unsigned int
-dp264_startup_irq(unsigned int irq)
-{
- dp264_enable_irq(irq);
+dp264_startup_irq(struct irq_desc *desc)
+{
+ dp264_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-dp264_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- dp264_enable_irq(irq);
+dp264_end_irq(struct irq_desc *desc)
+{
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ dp264_enable_irq(desc);
}
static void
-clipper_enable_irq(unsigned int irq)
+clipper_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&dp264_irq_lock);
cached_irq_mask |= 1UL << (irq - 16);
tsunami_update_irq_hw(cached_irq_mask);
@@ -139,8 +142,9 @@ clipper_enable_irq(unsigned int irq)
}
static void
-clipper_disable_irq(unsigned int irq)
+clipper_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&dp264_irq_lock);
cached_irq_mask &= ~(1UL << (irq - 16));
tsunami_update_irq_hw(cached_irq_mask);
@@ -148,17 +152,17 @@ clipper_disable_irq(unsigned int irq)
}
static unsigned int
-clipper_startup_irq(unsigned int irq)
-{
- clipper_enable_irq(irq);
+clipper_startup_irq(struct irq_desc *desc)
+{
+ clipper_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-clipper_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- clipper_enable_irq(irq);
+clipper_end_irq(struct irq_desc *desc)
+{
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ clipper_enable_irq(desc);
}
static void
@@ -177,8 +181,9 @@ cpu_set_irq_affinity(unsigned int irq, c
}
static int
-dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
-{
+dp264_set_affinity(struct irq_desc *desc, const struct cpumask *affinity)
+{
+ unsigned int irq = desc->irq;
spin_lock(&dp264_irq_lock);
cpu_set_irq_affinity(irq, *affinity);
tsunami_update_irq_hw(cached_irq_mask);
@@ -188,8 +193,9 @@ dp264_set_affinity(unsigned int irq, con
}
static int
-clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
-{
+clipper_set_affinity(struct irq_desc *desc, const struct cpumask *affinity)
+{
+ unsigned int irq = desc->irq;
spin_lock(&dp264_irq_lock);
cpu_set_irq_affinity(irq - 16, *affinity);
tsunami_update_irq_hw(cached_irq_mask);
diff -u -p a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c
--- a/arch/alpha/kernel/sys_eb64p.c
+++ b/arch/alpha/kernel/sys_eb64p.c
@@ -44,29 +44,31 @@ eb64p_update_irq_hw(unsigned int irq, un
}
static inline void
-eb64p_enable_irq(unsigned int irq)
+eb64p_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
eb64p_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq));
}
static void
-eb64p_disable_irq(unsigned int irq)
+eb64p_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
eb64p_update_irq_hw(irq, cached_irq_mask |= 1 << irq);
}
static unsigned int
-eb64p_startup_irq(unsigned int irq)
+eb64p_startup_irq(struct irq_desc *desc)
{
- eb64p_enable_irq(irq);
+ eb64p_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-eb64p_end_irq(unsigned int irq)
+eb64p_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- eb64p_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ eb64p_enable_irq(desc);
}
static struct irq_chip eb64p_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c
--- a/arch/alpha/kernel/sys_eiger.c
+++ b/arch/alpha/kernel/sys_eiger.c
@@ -51,33 +51,35 @@ eiger_update_irq_hw(unsigned long irq, u
}
static inline void
-eiger_enable_irq(unsigned int irq)
+eiger_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask;
mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63)));
eiger_update_irq_hw(irq, mask);
}
static void
-eiger_disable_irq(unsigned int irq)
+eiger_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask;
mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63));
eiger_update_irq_hw(irq, mask);
}
static unsigned int
-eiger_startup_irq(unsigned int irq)
+eiger_startup_irq(struct irq_desc *desc)
{
- eiger_enable_irq(irq);
+ eiger_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-eiger_end_irq(unsigned int irq)
+eiger_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- eiger_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ eiger_enable_irq(desc);
}
static struct irq_chip eiger_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c
--- a/arch/alpha/kernel/sys_jensen.c
+++ b/arch/alpha/kernel/sys_jensen.c
@@ -63,8 +63,9 @@
*/
static unsigned int
-jensen_local_startup(unsigned int irq)
+jensen_local_startup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* the parport is really hw IRQ 1, silly Jensen. */
if (irq == 7)
i8259a_startup_irq(1);
@@ -73,46 +74,51 @@ jensen_local_startup(unsigned int irq)
* For all true local interrupts, set the flag that prevents
* the IPL from being dropped during handler processing.
*/
- if (irq_desc[irq].action)
- irq_desc[irq].action->flags |= IRQF_DISABLED;
+ if (desc->action)
+ desc->action->flags |= IRQF_DISABLED;
return 0;
}
static void
-jensen_local_shutdown(unsigned int irq)
+jensen_local_shutdown(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* the parport is really hw IRQ 1, silly Jensen. */
if (irq == 7)
i8259a_disable_irq(1);
}
static void
-jensen_local_enable(unsigned int irq)
+jensen_local_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* the parport is really hw IRQ 1, silly Jensen. */
if (irq == 7)
i8259a_enable_irq(1);
}
static void
-jensen_local_disable(unsigned int irq)
+jensen_local_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* the parport is really hw IRQ 1, silly Jensen. */
if (irq == 7)
i8259a_disable_irq(1);
}
static void
-jensen_local_ack(unsigned int irq)
+jensen_local_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* the parport is really hw IRQ 1, silly Jensen. */
if (irq == 7)
i8259a_mask_and_ack_irq(1);
}
static void
-jensen_local_end(unsigned int irq)
+jensen_local_end(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* the parport is really hw IRQ 1, silly Jensen. */
if (irq == 7)
i8259a_end_irq(1);
diff -u -p a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -104,8 +104,9 @@ io7_get_irq_ctl(unsigned int irq, struct
}
static void
-io7_enable_irq(unsigned int irq)
+io7_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
volatile unsigned long *ctl;
struct io7 *io7;
@@ -124,8 +125,9 @@ io7_enable_irq(unsigned int irq)
}
static void
-io7_disable_irq(unsigned int irq)
+io7_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
volatile unsigned long *ctl;
struct io7 *io7;
@@ -144,27 +146,27 @@ io7_disable_irq(unsigned int irq)
}
static unsigned int
-io7_startup_irq(unsigned int irq)
+io7_startup_irq(struct irq_desc *desc)
{
- io7_enable_irq(irq);
+ io7_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-io7_end_irq(unsigned int irq)
+io7_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- io7_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ io7_enable_irq(desc);
}
static void
-marvel_irq_noop(unsigned int irq)
+marvel_irq_noop(struct irq_desc *unused)
{
return;
}
static unsigned int
-marvel_irq_noop_return(unsigned int irq)
+marvel_irq_noop_return(struct irq_desc *unused)
{
return 0;
}
diff -u -p a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c
--- a/arch/alpha/kernel/sys_mikasa.c
+++ b/arch/alpha/kernel/sys_mikasa.c
@@ -43,29 +43,31 @@ mikasa_update_irq_hw(int mask)
}
static inline void
-mikasa_enable_irq(unsigned int irq)
+mikasa_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mikasa_update_irq_hw(cached_irq_mask |= 1 << (irq - 16));
}
static void
-mikasa_disable_irq(unsigned int irq)
+mikasa_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (irq - 16)));
}
static unsigned int
-mikasa_startup_irq(unsigned int irq)
+mikasa_startup_irq(struct irq_desc *desc)
{
- mikasa_enable_irq(irq);
+ mikasa_enable_irq(desc);
return 0;
}
static void
-mikasa_end_irq(unsigned int irq)
+mikasa_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- mikasa_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ mikasa_enable_irq(desc);
}
static struct irq_chip mikasa_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c
--- a/arch/alpha/kernel/sys_noritake.c
+++ b/arch/alpha/kernel/sys_noritake.c
@@ -48,29 +48,31 @@ noritake_update_irq_hw(int irq, int mask
}
static void
-noritake_enable_irq(unsigned int irq)
+noritake_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
noritake_update_irq_hw(irq, cached_irq_mask |= 1 << (irq - 16));
}
static void
-noritake_disable_irq(unsigned int irq)
+noritake_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
noritake_update_irq_hw(irq, cached_irq_mask &= ~(1 << (irq - 16)));
}
static unsigned int
-noritake_startup_irq(unsigned int irq)
+noritake_startup_irq(struct irq_desc *desc)
{
- noritake_enable_irq(irq);
+ noritake_enable_irq(desc);
return 0;
}
static void
-noritake_end_irq(unsigned int irq)
+noritake_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- noritake_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ noritake_enable_irq(desc);
}
static struct irq_chip noritake_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c
--- a/arch/alpha/kernel/sys_rawhide.c
+++ b/arch/alpha/kernel/sys_rawhide.c
@@ -56,8 +56,9 @@ rawhide_update_irq_hw(int hose, int mask
(((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0))
static inline void
-rawhide_enable_irq(unsigned int irq)
+rawhide_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask, hose;
irq -= 16;
@@ -76,8 +77,9 @@ rawhide_enable_irq(unsigned int irq)
}
static void
-rawhide_disable_irq(unsigned int irq)
+rawhide_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask, hose;
irq -= 16;
@@ -96,8 +98,9 @@ rawhide_disable_irq(unsigned int irq)
}
static void
-rawhide_mask_and_ack_irq(unsigned int irq)
+rawhide_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask, mask1, hose;
irq -= 16;
@@ -122,17 +125,17 @@ rawhide_mask_and_ack_irq(unsigned int ir
}
static unsigned int
-rawhide_startup_irq(unsigned int irq)
+rawhide_startup_irq(struct irq_desc *desc)
{
- rawhide_enable_irq(irq);
+ rawhide_enable_irq(desc);
return 0;
}
static void
-rawhide_end_irq(unsigned int irq)
+rawhide_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- rawhide_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ rawhide_enable_irq(desc);
}
static struct irq_chip rawhide_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c
--- a/arch/alpha/kernel/sys_rx164.c
+++ b/arch/alpha/kernel/sys_rx164.c
@@ -47,29 +47,31 @@ rx164_update_irq_hw(unsigned long mask)
}
static inline void
-rx164_enable_irq(unsigned int irq)
+rx164_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
rx164_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
}
static void
-rx164_disable_irq(unsigned int irq)
+rx164_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
}
static unsigned int
-rx164_startup_irq(unsigned int irq)
+rx164_startup_irq(struct irq_desc *desc)
{
- rx164_enable_irq(irq);
+ rx164_enable_irq(desc);
return 0;
}
static void
-rx164_end_irq(unsigned int irq)
+rx164_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- rx164_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ rx164_enable_irq(desc);
}
static struct irq_chip rx164_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c
--- a/arch/alpha/kernel/sys_sable.c
+++ b/arch/alpha/kernel/sys_sable.c
@@ -443,8 +443,9 @@ lynx_swizzle(struct pci_dev *dev, u8 *pi
/* GENERIC irq routines */
static inline void
-sable_lynx_enable_irq(unsigned int irq)
+sable_lynx_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long bit, mask;
bit = sable_lynx_irq_swizzle->irq_to_mask[irq];
@@ -459,8 +460,9 @@ sable_lynx_enable_irq(unsigned int irq)
}
static void
-sable_lynx_disable_irq(unsigned int irq)
+sable_lynx_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long bit, mask;
bit = sable_lynx_irq_swizzle->irq_to_mask[irq];
@@ -475,22 +477,23 @@ sable_lynx_disable_irq(unsigned int irq)
}
static unsigned int
-sable_lynx_startup_irq(unsigned int irq)
+sable_lynx_startup_irq(struct irq_desc *desc)
{
- sable_lynx_enable_irq(irq);
+ sable_lynx_enable_irq(desc);
return 0;
}
static void
-sable_lynx_end_irq(unsigned int irq)
+sable_lynx_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- sable_lynx_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ sable_lynx_enable_irq(desc);
}
static void
-sable_lynx_mask_and_ack_irq(unsigned int irq)
+sable_lynx_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long bit, mask;
bit = sable_lynx_irq_swizzle->irq_to_mask[irq];
diff -u -p a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c
--- a/arch/alpha/kernel/sys_takara.c
+++ b/arch/alpha/kernel/sys_takara.c
@@ -45,33 +45,35 @@ takara_update_irq_hw(unsigned long irq,
}
static inline void
-takara_enable_irq(unsigned int irq)
+takara_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask;
mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63)));
takara_update_irq_hw(irq, mask);
}
static void
-takara_disable_irq(unsigned int irq)
+takara_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask;
mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63));
takara_update_irq_hw(irq, mask);
}
static unsigned int
-takara_startup_irq(unsigned int irq)
+takara_startup_irq(struct irq_desc *desc)
{
- takara_enable_irq(irq);
+ takara_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-takara_end_irq(unsigned int irq)
+takara_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- takara_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ takara_enable_irq(desc);
}
static struct irq_chip takara_irq_type = {
diff -u -p a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -112,8 +112,9 @@ titan_update_irq_hw(unsigned long mask)
}
static inline void
-titan_enable_irq(unsigned int irq)
+titan_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&titan_irq_lock);
titan_cached_irq_mask |= 1UL << (irq - 16);
titan_update_irq_hw(titan_cached_irq_mask);
@@ -121,8 +122,9 @@ titan_enable_irq(unsigned int irq)
}
static inline void
-titan_disable_irq(unsigned int irq)
+titan_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
spin_lock(&titan_irq_lock);
titan_cached_irq_mask &= ~(1UL << (irq - 16));
titan_update_irq_hw(titan_cached_irq_mask);
@@ -130,17 +132,17 @@ titan_disable_irq(unsigned int irq)
}
static unsigned int
-titan_startup_irq(unsigned int irq)
+titan_startup_irq(struct irq_desc *desc)
{
- titan_enable_irq(irq);
+ titan_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-titan_end_irq(unsigned int irq)
+titan_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- titan_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ titan_enable_irq(desc);
}
static void
@@ -158,8 +160,9 @@ titan_cpu_set_irq_affinity(unsigned int
}
static int
-titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
-{
+titan_set_irq_affinity(struct irq_desc *desc, const struct cpumask *affinity)
+{
+ unsigned int irq = desc->irq;
spin_lock(&titan_irq_lock);
titan_cpu_set_irq_affinity(irq - 16, *affinity);
titan_update_irq_hw(titan_cached_irq_mask);
diff -u -p a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c
--- a/arch/alpha/kernel/sys_wildfire.c
+++ b/arch/alpha/kernel/sys_wildfire.c
@@ -104,8 +104,9 @@ wildfire_init_irq_hw(void)
}
static void
-wildfire_enable_irq(unsigned int irq)
+wildfire_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq < 16)
i8259a_enable_irq(irq);
@@ -116,8 +117,9 @@ wildfire_enable_irq(unsigned int irq)
}
static void
-wildfire_disable_irq(unsigned int irq)
+wildfire_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq < 16)
i8259a_disable_irq(irq);
@@ -128,8 +130,9 @@ wildfire_disable_irq(unsigned int irq)
}
static void
-wildfire_mask_and_ack_irq(unsigned int irq)
+wildfire_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq < 16)
i8259a_mask_and_ack_irq(irq);
@@ -140,21 +143,22 @@ wildfire_mask_and_ack_irq(unsigned int i
}
static unsigned int
-wildfire_startup_irq(unsigned int irq)
-{
- wildfire_enable_irq(irq);
+wildfire_startup_irq(struct irq_desc *desc)
+{
+ wildfire_enable_irq(desc);
return 0; /* never anything pending */
}
static void
-wildfire_end_irq(unsigned int irq)
-{
+wildfire_end_irq(struct irq_desc *desc)
+{
+unsigned int irq = desc->irq;
#if 0
- if (!irq_desc[irq].action)
+ if (!desc->action)
printk("got irq %d\n", irq);
#endif
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- wildfire_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ wildfire_enable_irq(desc);
}
static struct irq_chip wildfire_irq_type = {
diff -u -p a/arch/arm/common/gic.c b/arch/arm/common/gic.c
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -80,8 +80,9 @@ static inline unsigned int gic_irq(unsig
* our "acknowledge" routine disable the interrupt, then mark it as
* complete.
*/
-static void gic_ack_irq(unsigned int irq)
+static void gic_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask = 1 << (irq % 32);
spin_lock(&irq_controller_lock);
@@ -90,8 +91,9 @@ static void gic_ack_irq(unsigned int irq
spin_unlock(&irq_controller_lock);
}
-static void gic_mask_irq(unsigned int irq)
+static void gic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask = 1 << (irq % 32);
spin_lock(&irq_controller_lock);
@@ -99,8 +101,9 @@ static void gic_mask_irq(unsigned int ir
spin_unlock(&irq_controller_lock);
}
-static void gic_unmask_irq(unsigned int irq)
+static void gic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask = 1 << (irq % 32);
spin_lock(&irq_controller_lock);
@@ -109,15 +112,16 @@ static void gic_unmask_irq(unsigned int
}
#ifdef CONFIG_SMP
-static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
+static int gic_set_cpu(struct irq_desc *desc, const struct cpumask *mask_val)
{
+ unsigned int irq = desc->irq;
void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
unsigned int shift = (irq % 4) * 8;
unsigned int cpu = cpumask_first(mask_val);
u32 val;
spin_lock(&irq_controller_lock);
- irq_desc[irq].node = cpu;
+ desc->node = cpu;
val = readl(reg) & ~(0xff << shift);
val |= 1 << (cpu + shift);
writel(val, reg);
@@ -135,7 +139,7 @@ static void gic_handle_cascade_irq(unsig
unsigned long status;
/* primary controller ack'ing */
- chip->ack(irq);
+ chip->ack(irq_to_desc(irq));
spin_lock(&irq_controller_lock);
status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
@@ -153,7 +157,7 @@ static void gic_handle_cascade_irq(unsig
out:
/* primary controller unmasking */
- chip->unmask(irq);
+ chip->unmask(irq_to_desc(irq));
}
static struct irq_chip gic_chip = {
diff -u -p a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -32,8 +32,9 @@
#define MAX_SLOTS 21
-static void it8152_mask_irq(unsigned int irq)
+static void it8152_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq >= IT8152_LD_IRQ(0)) {
__raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) |
(1 << (irq - IT8152_LD_IRQ(0)))),
@@ -49,8 +50,9 @@ static void it8152_mask_irq(unsigned int
}
}
-static void it8152_unmask_irq(unsigned int irq)
+static void it8152_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq >= IT8152_LD_IRQ(0)) {
__raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) &
~(1 << (irq - IT8152_LD_IRQ(0)))),
diff -u -p a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -144,7 +144,7 @@ static void locomo_handler(unsigned int
int req, i;
/* Acknowledge the parent IRQ */
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
/* check why this interrupt was generated */
req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
@@ -161,12 +161,13 @@ static void locomo_handler(unsigned int
}
}
-static void locomo_ack_irq(unsigned int irq)
+static void locomo_ack_irq(struct irq_desc *unused)
{
}
-static void locomo_mask_irq(unsigned int irq)
+static void locomo_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct locomo *lchip = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(lchip->base + LOCOMO_ICR);
@@ -174,8 +175,9 @@ static void locomo_mask_irq(unsigned int
locomo_writel(r, lchip->base + LOCOMO_ICR);
}
-static void locomo_unmask_irq(unsigned int irq)
+static void locomo_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct locomo *lchip = get_irq_chip_data(irq);
unsigned int r;
r = locomo_readl(lchip->base + LOCOMO_ICR);
diff -u -p a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -213,7 +213,7 @@ sa1111_irq_handler(unsigned int irq, str
sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
@@ -231,18 +231,19 @@ sa1111_irq_handler(unsigned int irq, str
generic_handle_irq(i + sachip->irq_base);
/* For level-based interrupts */
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
-static void sa1111_ack_irq(unsigned int irq)
+static void sa1111_ack_irq(struct irq_desc *unused)
{
}
-static void sa1111_mask_lowirq(unsigned int irq)
+static void sa1111_mask_lowirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie0;
@@ -252,8 +253,9 @@ static void sa1111_mask_lowirq(unsigned
writel(ie0, mapbase + SA1111_INTEN0);
}
-static void sa1111_unmask_lowirq(unsigned int irq)
+static void sa1111_unmask_lowirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie0;
@@ -270,8 +272,9 @@ static void sa1111_unmask_lowirq(unsigne
* be triggered. In fact, its very difficult, if not impossible to get
* INTSET to re-trigger the interrupt.
*/
-static int sa1111_retrigger_lowirq(unsigned int irq)
+static int sa1111_retrigger_lowirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_LO(irq);
@@ -292,8 +295,9 @@ static int sa1111_retrigger_lowirq(unsig
return i == 8 ? -1 : 0;
}
-static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
+static int sa1111_type_lowirq(struct irq_desc *desc, unsigned int flags)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_LO(irq);
@@ -316,8 +320,9 @@ static int sa1111_type_lowirq(unsigned i
return 0;
}
-static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
+static int sa1111_wake_lowirq(struct irq_desc *desc, unsigned int on)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_LO(irq);
@@ -343,8 +348,9 @@ static struct irq_chip sa1111_low_chip =
.set_wake = sa1111_wake_lowirq,
};
-static void sa1111_mask_highirq(unsigned int irq)
+static void sa1111_mask_highirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie1;
@@ -354,8 +360,9 @@ static void sa1111_mask_highirq(unsigned
sa1111_writel(ie1, mapbase + SA1111_INTEN1);
}
-static void sa1111_unmask_highirq(unsigned int irq)
+static void sa1111_unmask_highirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie1;
@@ -372,8 +379,9 @@ static void sa1111_unmask_highirq(unsign
* be triggered. In fact, its very difficult, if not impossible to get
* INTSET to re-trigger the interrupt.
*/
-static int sa1111_retrigger_highirq(unsigned int irq)
+static int sa1111_retrigger_highirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_HI(irq);
@@ -394,8 +402,9 @@ static int sa1111_retrigger_highirq(unsi
return i == 8 ? -1 : 0;
}
-static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
+static int sa1111_type_highirq(struct irq_desc *desc, unsigned int flags)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_HI(irq);
@@ -418,8 +427,9 @@ static int sa1111_type_highirq(unsigned
return 0;
}
-static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
+static int sa1111_wake_highirq(struct irq_desc *desc, unsigned int on)
{
+ unsigned int irq = desc->irq;
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_HI(irq);
diff -u -p a/arch/arm/common/vic.c b/arch/arm/common/vic.c
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -204,8 +204,9 @@ static void __init vic_pm_register(void
static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
#endif /* CONFIG_PM */
-static void vic_ack_irq(unsigned int irq)
+static void vic_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *base = get_irq_chip_data(irq);
irq &= 31;
writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
@@ -213,15 +214,17 @@ static void vic_ack_irq(unsigned int irq
writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
}
-static void vic_mask_irq(unsigned int irq)
+static void vic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *base = get_irq_chip_data(irq);
irq &= 31;
writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
}
-static void vic_unmask_irq(unsigned int irq)
+static void vic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *base = get_irq_chip_data(irq);
irq &= 31;
writel(1 << irq, base + VIC_INT_ENABLE);
@@ -242,8 +245,9 @@ static struct vic_device *vic_from_irq(u
return NULL;
}
-static int vic_set_wake(unsigned int irq, unsigned int on)
+static int vic_set_wake(struct irq_desc *desc, unsigned int on)
{
+ unsigned int irq = desc->irq;
struct vic_device *v = vic_from_irq(irq);
unsigned int off = irq & 31;
u32 bit = 1 << off;
diff -u -p a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -443,8 +443,9 @@ static expansioncard_ops_t ecard_default
*
* They are not meant to be called directly, but via enable/disable_irq.
*/
-static void ecard_irq_unmask(unsigned int irqnr)
+static void ecard_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irqnr = desc->irq;
ecard_t *ec = slot_to_ecard(irqnr - 32);
if (ec) {
@@ -459,8 +460,9 @@ static void ecard_irq_unmask(unsigned in
}
}
-static void ecard_irq_mask(unsigned int irqnr)
+static void ecard_irq_mask(struct irq_desc *desc)
{
+ unsigned int irqnr = desc->irq;
ecard_t *ec = slot_to_ecard(irqnr - 32);
if (ec) {
@@ -551,7 +553,7 @@ static void ecard_check_lockup(struct ir
printk(KERN_ERR "\nInterrupt lockup detected - "
"disabling all expansion card interrupts\n");
- desc->chip->mask(IRQ_EXPANSIONCARD);
+ desc->chip->mask(irq_to_desc(IRQ_EXPANSIONCARD));
ecard_dump_irq_state();
}
} else
@@ -574,7 +576,7 @@ ecard_irq_handler(unsigned int irq, stru
ecard_t *ec;
int called = 0;
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
for (ec = cards; ec; ec = ec->next) {
int pending;
@@ -591,7 +593,7 @@ ecard_irq_handler(unsigned int irq, stru
called ++;
}
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
if (called == 0)
ecard_check_lockup(desc);
diff -u -p a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -138,7 +138,7 @@ void set_irq_flags(unsigned int irq, uns
return;
}
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
raw_spin_lock_irqsave(&desc->lock, flags);
desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
if (iflags & IRQF_VALID)
@@ -167,7 +167,7 @@ static void route_irq(struct irq_desc *d
pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->node, cpu);
raw_spin_lock_irq(&desc->lock);
- desc->chip->set_affinity(irq, cpumask_of(cpu));
+ desc->chip->set_affinity(irq_to_desc(irq), cpumask_of(cpu));
raw_spin_unlock_irq(&desc->lock);
}
@@ -181,7 +181,7 @@ void migrate_irqs(void)
unsigned int i, cpu = smp_processor_id();
for (i = 0; i < NR_IRQS; i++) {
- struct irq_desc *desc = irq_desc + i;
+ struct irq_desc *desc = irq_to_desc(i);
if (desc->node == cpu) {
unsigned int newcpu = cpumask_any_and(desc->affinity,
diff -u -p a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -67,18 +67,21 @@ void __init aaec2000_map_io(void)
/*
* Interrupt handling routines
*/
-static void aaec2000_int_ack(unsigned int irq)
+static void aaec2000_int_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
IRQ_INTSR = 1 << irq;
}
-static void aaec2000_int_mask(unsigned int irq)
+static void aaec2000_int_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
IRQ_INTENC |= (1 << irq);
}
-static void aaec2000_int_unmask(unsigned int irq)
+static void aaec2000_int_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
IRQ_INTENS |= (1 << irq);
}
diff -u -p a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -274,8 +274,9 @@ EXPORT_SYMBOL(at91_get_gpio_value);
static u32 wakeups[MAX_GPIO_BANKS];
static u32 backups[MAX_GPIO_BANKS];
-static int gpio_irq_set_wake(unsigned pin, unsigned state)
+static int gpio_irq_set_wake(struct irq_desc *desc, unsigned state)
{
+ unsigned int pin = desc->irq;
unsigned mask = pin_to_mask(pin);
unsigned bank = (pin - PIN_BASE) / 32;
@@ -344,8 +345,9 @@ void at91_gpio_resume(void)
* IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering.
*/
-static void gpio_irq_mask(unsigned pin)
+static void gpio_irq_mask(struct irq_desc *desc)
{
+ unsigned int pin = desc->irq;
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
@@ -353,8 +355,9 @@ static void gpio_irq_mask(unsigned pin)
__raw_writel(mask, pio + PIO_IDR);
}
-static void gpio_irq_unmask(unsigned pin)
+static void gpio_irq_unmask(struct irq_desc *desc)
{
+ unsigned int pin = desc->irq;
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
@@ -362,7 +365,7 @@ static void gpio_irq_unmask(unsigned pin
__raw_writel(mask, pio + PIO_IER);
}
-static int gpio_irq_type(unsigned pin, unsigned type)
+static int gpio_irq_type(struct irq_desc *unused, unsigned type)
{
switch (type) {
case IRQ_TYPE_NONE:
@@ -393,7 +396,7 @@ static void gpio_irq_handler(unsigned ir
pio = at91_gpio->regbase;
/* temporarily mask (level sensitive) parent IRQ */
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
for (;;) {
/* Reading ISR acks pending (edge triggered) GPIO interrupts.
* When there none are pending, we're finished unless we need
@@ -409,7 +412,7 @@ static void gpio_irq_handler(unsigned ir
}
pin = at91_gpio->chip.base;
- gpio = &irq_desc[pin];
+ gpio = irq_to_desc(pin);
while (isr) {
if (isr & 1) {
@@ -419,7 +422,7 @@ static void gpio_irq_handler(unsigned ir
* another IRQ must be generated before it actually gets
* here to be disabled on the GPIO controller.
*/
- gpio_irq_mask(pin);
+ gpio_irq_mask(gpio);
}
else
generic_handle_irq(pin);
@@ -429,7 +432,7 @@ static void gpio_irq_handler(unsigned ir
isr >>= 1;
}
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
/* now it may re-trigger */
}
diff -u -p a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -34,14 +34,16 @@
#include <asm/mach/map.h>
-static void at91_aic_mask_irq(unsigned int irq)
+static void at91_aic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* Disable interrupt on AIC */
at91_sys_write(AT91_AIC_IDCR, 1 << irq);
}
-static void at91_aic_unmask_irq(unsigned int irq)
+static void at91_aic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* Enable interrupt on AIC */
at91_sys_write(AT91_AIC_IECR, 1 << irq);
}
@@ -50,8 +52,9 @@ unsigned int at91_extern_irq;
#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
-static int at91_aic_set_type(unsigned irq, unsigned type)
+static int at91_aic_set_type(struct irq_desc *desc, unsigned type)
{
+ unsigned int irq = desc->irq;
unsigned int smr, srctype;
switch (type) {
@@ -87,8 +90,9 @@ static int at91_aic_set_type(unsigned ir
static u32 wakeups;
static u32 backups;
-static int at91_aic_set_wake(unsigned irq, unsigned value)
+static int at91_aic_set_wake(struct irq_desc *desc, unsigned value)
{
+ unsigned int irq = desc->irq;
if (unlikely(irq >= 32))
return -EINVAL;
diff -u -p a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c
--- a/arch/arm/mach-bcmring/irq.c
+++ b/arch/arm/mach-bcmring/irq.c
@@ -30,38 +30,44 @@
#include <mach/csp/intcHw_reg.h>
#include <mach/csp/mm_io.h>
-static void bcmring_mask_irq0(unsigned int irq)
+static void bcmring_mask_irq0(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - IRQ_INTC0_START),
MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
}
-static void bcmring_unmask_irq0(unsigned int irq)
+static void bcmring_unmask_irq0(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - IRQ_INTC0_START),
MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
}
-static void bcmring_mask_irq1(unsigned int irq)
+static void bcmring_mask_irq1(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - IRQ_INTC1_START),
MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
}
-static void bcmring_unmask_irq1(unsigned int irq)
+static void bcmring_unmask_irq1(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - IRQ_INTC1_START),
MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
}
-static void bcmring_mask_irq2(unsigned int irq)
+static void bcmring_mask_irq2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - IRQ_SINTC_START),
MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
}
-static void bcmring_unmask_irq2(unsigned int irq)
+static void bcmring_unmask_irq2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - IRQ_SINTC_START),
MM_IO_BASE_SINTC + INTCHW_INTENABLE);
}
diff -u -p a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/irq.c
@@ -27,8 +27,9 @@
#include <asm/hardware/clps7111.h>
-static void int1_mask(unsigned int irq)
+static void int1_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 intmr1;
intmr1 = clps_readl(INTMR1);
@@ -36,8 +37,9 @@ static void int1_mask(unsigned int irq)
clps_writel(intmr1, INTMR1);
}
-static void int1_ack(unsigned int irq)
+static void int1_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 intmr1;
intmr1 = clps_readl(INTMR1);
@@ -54,8 +56,9 @@ static void int1_ack(unsigned int irq)
}
}
-static void int1_unmask(unsigned int irq)
+static void int1_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 intmr1;
intmr1 = clps_readl(INTMR1);
@@ -69,8 +72,9 @@ static struct irq_chip int1_chip = {
.unmask = int1_unmask,
};
-static void int2_mask(unsigned int irq)
+static void int2_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 intmr2;
intmr2 = clps_readl(INTMR2);
@@ -78,8 +82,9 @@ static void int2_mask(unsigned int irq)
clps_writel(intmr2, INTMR2);
}
-static void int2_ack(unsigned int irq)
+static void int2_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 intmr2;
intmr2 = clps_readl(INTMR2);
@@ -91,8 +96,9 @@ static void int2_ack(unsigned int irq)
}
}
-static void int2_unmask(unsigned int irq)
+static void int2_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 intmr2;
intmr2 = clps_readl(INTMR2);
diff -u -p a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -27,14 +27,16 @@ static inline void cp_intc_write(unsigne
__raw_writel(value, cp_intc_base + offset);
}
-static void cp_intc_ack_irq(unsigned int irq)
+static void cp_intc_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cp_intc_write(irq, CP_INTC_SYS_STAT_IDX_CLR);
}
/* Disable interrupt */
-static void cp_intc_mask_irq(unsigned int irq)
+static void cp_intc_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* XXX don't know why we need to disable nIRQ here... */
cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_CLR);
@@ -42,13 +44,15 @@ static void cp_intc_mask_irq(unsigned in
}
/* Enable interrupt */
-static void cp_intc_unmask_irq(unsigned int irq)
+static void cp_intc_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_SET);
}
-static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type)
+static int cp_intc_set_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
unsigned reg = BIT_WORD(irq);
unsigned mask = BIT_MASK(irq);
unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg));
@@ -86,7 +90,7 @@ static int cp_intc_set_irq_type(unsigned
* generic drivers which call {enable|disable}_irq_wake for
* wake up interrupt sources (eg RTC on DA850).
*/
-static int cp_intc_set_wake(unsigned int irq, unsigned int on)
+static int cp_intc_set_wake(struct irq_desc *unused, unsigned int on)
{
return 0;
}
diff -u -p a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -168,8 +168,9 @@ pure_initcall(davinci_gpio_setup);
* serve as EDMA event triggers.
*/
-static void gpio_irq_disable(unsigned irq)
+static void gpio_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct gpio_controller __iomem *g = irq2controller(irq);
u32 mask = (u32) get_irq_data(irq);
@@ -177,11 +178,12 @@ static void gpio_irq_disable(unsigned ir
__raw_writel(mask, &g->clr_rising);
}
-static void gpio_irq_enable(unsigned irq)
+static void gpio_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct gpio_controller __iomem *g = irq2controller(irq);
u32 mask = (u32) get_irq_data(irq);
- unsigned status = irq_desc[irq].status;
+ unsigned status = desc->status;
status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
if (!status)
@@ -193,19 +195,20 @@ static void gpio_irq_enable(unsigned irq
__raw_writel(mask, &g->set_rising);
}
-static int gpio_irq_type(unsigned irq, unsigned trigger)
+static int gpio_irq_type(struct irq_desc *desc, unsigned trigger)
{
+ unsigned int irq = desc->irq;
struct gpio_controller __iomem *g = irq2controller(irq);
u32 mask = (u32) get_irq_data(irq);
if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
return -EINVAL;
- irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
- irq_desc[irq].status |= trigger;
+ desc->status &= ~IRQ_TYPE_SENSE_MASK;
+ desc->status |= trigger;
/* don't enable the IRQ if it's currently disabled */
- if (irq_desc[irq].depth == 0) {
+ if (desc->depth == 0) {
__raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
? &g->set_falling : &g->clr_falling);
__raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
@@ -232,8 +235,8 @@ gpio_irq_handler(unsigned irq, struct ir
mask <<= 16;
/* temporarily mask (level sensitive) parent IRQ */
- desc->chip->mask(irq);
- desc->chip->ack(irq);
+ desc->chip->mask(irq_to_desc(irq));
+ desc->chip->ack(irq_to_desc(irq));
while (1) {
u32 status;
int n;
@@ -256,7 +259,7 @@ gpio_irq_handler(unsigned irq, struct ir
status >>= res;
}
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
/* now it may re-trigger */
}
@@ -283,8 +286,9 @@ static int gpio_to_irq_unbanked(struct g
return -ENODEV;
}
-static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger)
+static int gpio_irq_type_unbanked(struct irq_desc *desc, unsigned trigger)
{
+ unsigned int irq = desc->irq;
struct gpio_controller __iomem *g = irq2controller(irq);
u32 mask = (u32) get_irq_data(irq);
diff -u -p a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -53,8 +53,9 @@ static inline void davinci_irq_writel(un
}
/* Disable interrupt */
-static void davinci_mask_irq(unsigned int irq)
+static void davinci_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
u32 l;
@@ -72,8 +73,9 @@ static void davinci_mask_irq(unsigned in
}
/* Enable interrupt */
-static void davinci_unmask_irq(unsigned int irq)
+static void davinci_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
u32 l;
@@ -91,8 +93,9 @@ static void davinci_unmask_irq(unsigned
}
/* EOI interrupt */
-static void davinci_ack_irq(unsigned int irq)
+static void davinci_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
mask = 1 << IRQ_BIT(irq);
diff -u -p a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -36,8 +36,9 @@ static void gpio_irq_handler(unsigned in
}
}
-static void pmu_irq_mask(unsigned int irq)
+static void pmu_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq_to_pmu(irq);
u32 u;
@@ -46,8 +47,9 @@ static void pmu_irq_mask(unsigned int ir
writel(u, PMU_INTERRUPT_MASK);
}
-static void pmu_irq_unmask(unsigned int irq)
+static void pmu_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq_to_pmu(irq);
u32 u;
@@ -56,8 +58,9 @@ static void pmu_irq_unmask(unsigned int
writel(u, PMU_INTERRUPT_MASK);
}
-static void pmu_irq_ack(unsigned int irq)
+static void pmu_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq_to_pmu(irq);
u32 u;
@@ -86,7 +89,7 @@ static void pmu_irq_handler(unsigned int
if (!(cause & (1 << irq)))
continue;
irq = pmu_to_irq(irq);
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
desc_handle_irq(irq, desc);
}
}
diff -u -p a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -35,13 +35,15 @@
#define IRQ_STAT 0xff000000 /* read */
#define IRQ_MCLR 0xff000000 /* write */
-static void ebsa110_mask_irq(unsigned int irq)
+static void ebsa110_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writeb(1 << irq, IRQ_MCLR);
}
-static void ebsa110_unmask_irq(unsigned int irq)
+static void ebsa110_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writeb(1 << irq, IRQ_MSET);
}
diff -u -p a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -112,13 +112,14 @@ static void ep93xx_gpio_f_irq_handler(un
generic_handle_irq(gpio_irq);
}
-static void ep93xx_gpio_irq_ack(unsigned int irq)
+static void ep93xx_gpio_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int line = irq_to_gpio(irq);
int port = line >> 3;
int port_mask = 1 << (line & 7);
- if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+ if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
gpio_int_type2[port] ^= port_mask; /* switch edge direction */
ep93xx_gpio_update_int_params(port);
}
@@ -126,13 +127,14 @@ static void ep93xx_gpio_irq_ack(unsigned
__raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
}
-static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
+static void ep93xx_gpio_irq_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int line = irq_to_gpio(irq);
int port = line >> 3;
int port_mask = 1 << (line & 7);
- if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
+ if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
gpio_int_type2[port] ^= port_mask; /* switch edge direction */
gpio_int_unmasked[port] &= ~port_mask;
@@ -141,8 +143,9 @@ static void ep93xx_gpio_irq_mask_ack(uns
__raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
}
-static void ep93xx_gpio_irq_mask(unsigned int irq)
+static void ep93xx_gpio_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int line = irq_to_gpio(irq);
int port = line >> 3;
@@ -150,8 +153,9 @@ static void ep93xx_gpio_irq_mask(unsigne
ep93xx_gpio_update_int_params(port);
}
-static void ep93xx_gpio_irq_unmask(unsigned int irq)
+static void ep93xx_gpio_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int line = irq_to_gpio(irq);
int port = line >> 3;
@@ -164,9 +168,9 @@ static void ep93xx_gpio_irq_unmask(unsig
* edge (1) triggered, while gpio_int_type2 controls whether it
* triggers on low/falling (0) or high/rising (1).
*/
-static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
+static int ep93xx_gpio_irq_type(struct irq_desc *desc, unsigned int type)
{
- struct irq_desc *desc = irq_desc + irq;
+ unsigned int irq = desc->irq;
const int gpio = irq_to_gpio(irq);
const int port = gpio >> 3;
const int port_mask = 1 << (gpio & 7);
@@ -356,7 +360,7 @@ static void ep93xx_gpio_dbg_show(struct
if (!is_out) {
int irq = gpio_to_irq(gpio);
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
if (irq >= 0 && desc->action) {
char *trigger;
diff -u -p a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -75,13 +75,15 @@ static const int fb_irq_mask[] = {
IRQ_MASK_PCI_PERR, /* 19 */
};
-static void fb_mask_irq(unsigned int irq)
+static void fb_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
}
-static void fb_unmask_irq(unsigned int irq)
+static void fb_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
}
diff -u -p a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -30,23 +30,26 @@
#include "common.h"
-static void isa_mask_pic_lo_irq(unsigned int irq)
+static void isa_mask_pic_lo_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq & 7);
outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
}
-static void isa_ack_pic_lo_irq(unsigned int irq)
+static void isa_ack_pic_lo_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq & 7);
outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
outb(0x20, PIC_LO);
}
-static void isa_unmask_pic_lo_irq(unsigned int irq)
+static void isa_unmask_pic_lo_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq & 7);
outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO);
@@ -58,15 +61,17 @@ static struct irq_chip isa_lo_chip = {
.unmask = isa_unmask_pic_lo_irq,
};
-static void isa_mask_pic_hi_irq(unsigned int irq)
+static void isa_mask_pic_hi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq & 7);
outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
}
-static void isa_ack_pic_hi_irq(unsigned int irq)
+static void isa_ack_pic_hi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq & 7);
outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
@@ -74,8 +79,9 @@ static void isa_ack_pic_hi_irq(unsigned
outb(0x20, PIC_HI);
}
-static void isa_unmask_pic_hi_irq(unsigned int irq)
+static void isa_unmask_pic_hi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq & 7);
outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI);
diff -u -p a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -54,32 +54,36 @@ static void _set_gpio_irqenable(unsigned
__raw_writel(reg, base + GPIO_INT_EN);
}
-static void gpio_ack_irq(unsigned int irq)
+static void gpio_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq_to_gpio(irq);
unsigned int base = GPIO_BASE(gpio / 32);
__raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR);
}
-static void gpio_mask_irq(unsigned int irq)
+static void gpio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq_to_gpio(irq);
unsigned int base = GPIO_BASE(gpio / 32);
_set_gpio_irqenable(base, gpio % 32, 0);
}
-static void gpio_unmask_irq(unsigned int irq)
+static void gpio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq_to_gpio(irq);
unsigned int base = GPIO_BASE(gpio / 32);
_set_gpio_irqenable(base, gpio % 32, 1);
}
-static int gpio_set_irq_type(unsigned int irq, unsigned int type)
+static int gpio_set_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq_to_gpio(irq);
unsigned int gpio_mask = 1 << (gpio % 32);
unsigned int base = GPIO_BASE(gpio / 32);
@@ -120,7 +124,7 @@ static int gpio_set_irq_type(unsigned in
__raw_writel(reg_level, base + GPIO_INT_LEVEL);
__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
- gpio_ack_irq(irq);
+ gpio_ack_irq(desc);
return 0;
}
@@ -140,7 +144,7 @@ static void gpio_irq_handler(unsigned in
BUG_ON(!(irq_desc[gpio_irq_no].handle_irq));
irq_desc[gpio_irq_no].handle_irq(gpio_irq_no,
- &irq_desc[gpio_irq_no]);
+ irq_to_desc(gpio_irq_no));
}
}
diff -u -p a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -32,13 +32,15 @@
#define FIQ_LEVEL(base_addr) (base_addr + 0x30)
#define FIQ_STATUS(base_addr) (base_addr + 0x34)
-static void gemini_ack_irq(unsigned int irq)
+static void gemini_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(1 << irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
}
-static void gemini_mask_irq(unsigned int irq)
+static void gemini_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
@@ -46,8 +48,9 @@ static void gemini_mask_irq(unsigned int
__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
}
-static void gemini_unmask_irq(unsigned int irq)
+static void gemini_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
diff -u -p a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -53,16 +53,18 @@ unsigned long h720x_gettimeoffset(void)
/*
* mask Global irq's
*/
-static void mask_global_irq (unsigned int irq )
+static void mask_global_irq (struct irq_desc *desc )
{
+ unsigned int irq = desc->irq;
CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << irq);
}
/*
* unmask Global irq's
*/
-static void unmask_global_irq (unsigned int irq )
+static void unmask_global_irq (struct irq_desc *desc )
{
+ unsigned int irq = desc->irq;
CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << irq);
}
@@ -71,8 +73,9 @@ static void unmask_global_irq (unsigned
* ack GPIO irq's
* Ack only for edge triggered int's valid
*/
-static void inline ack_gpio_irq(u32 irq)
+static void inline ack_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
u32 bit = IRQ_TO_BIT(irq);
if ( (CPU_REG (reg_base, GPIO_EDGE) & bit))
@@ -82,8 +85,9 @@ static void inline ack_gpio_irq(u32 irq)
/*
* mask GPIO irq's
*/
-static void inline mask_gpio_irq(u32 irq)
+static void inline mask_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
u32 bit = IRQ_TO_BIT(irq);
CPU_REG (reg_base, GPIO_MASK) &= ~bit;
@@ -92,8 +96,9 @@ static void inline mask_gpio_irq(u32 irq
/*
* unmask GPIO irq's
*/
-static void inline unmask_gpio_irq(u32 irq)
+static void inline unmask_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq));
u32 bit = IRQ_TO_BIT(irq);
CPU_REG (reg_base, GPIO_MASK) |= bit;
diff -u -p a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -141,8 +141,9 @@ h7202_timer_interrupt(int irq, void *dev
/*
* mask multiplexed timer IRQs
*/
-static void inline mask_timerx_irq (u32 irq)
+static void inline mask_timerx_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit;
bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit;
@@ -151,8 +152,9 @@ static void inline mask_timerx_irq (u32
/*
* unmask multiplexed timer IRQs
*/
-static void inline unmask_timerx_irq (u32 irq)
+static void inline unmask_timerx_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit;
bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit;
@@ -196,7 +198,7 @@ void __init h7202_init_irq (void)
for (irq = IRQ_TIMER1;
irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
- mask_timerx_irq(irq);
+ mask_timerx_irq(irq_to_desc(irq));
set_irq_chip(irq, &h7202_timerx_chip);
set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID );
diff -u -p a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -154,13 +154,15 @@ static void __init ap_map_io(void)
#define INTEGRATOR_SC_VALID_INT 0x003fffff
-static void sc_mask_irq(unsigned int irq)
+static void sc_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_CLEAR);
}
-static void sc_unmask_irq(unsigned int irq)
+static void sc_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET);
}
diff -u -p a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -145,14 +145,16 @@ static void __init intcp_map_io(void)
#define sic_writel __raw_writel
#define sic_readl __raw_readl
-static void cic_mask_irq(unsigned int irq)
+static void cic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_CIC_START;
cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
}
-static void cic_unmask_irq(unsigned int irq)
+static void cic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_CIC_START;
cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
}
@@ -164,14 +166,16 @@ static struct irq_chip cic_chip = {
.unmask = cic_unmask_irq,
};
-static void pic_mask_irq(unsigned int irq)
+static void pic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_PIC_START;
pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
}
-static void pic_unmask_irq(unsigned int irq)
+static void pic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_PIC_START;
pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
}
@@ -183,14 +187,16 @@ static struct irq_chip pic_chip = {
.unmask = pic_unmask_irq,
};
-static void sic_mask_irq(unsigned int irq)
+static void sic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_SIC_START;
sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
}
-static void sic_unmask_irq(unsigned int irq)
+static void sic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_SIC_START;
sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
}
diff -u -p a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -123,50 +123,58 @@ static void write_intsize(u32 val)
/* 0 = Interrupt Masked and 1 = Interrupt not masked */
static void
-iop13xx_irq_mask0 (unsigned int irq)
+iop13xx_irq_mask0 (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_0(read_intctl_0() & ~(1 << (irq - 0)));
}
static void
-iop13xx_irq_mask1 (unsigned int irq)
+iop13xx_irq_mask1 (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_1(read_intctl_1() & ~(1 << (irq - 32)));
}
static void
-iop13xx_irq_mask2 (unsigned int irq)
+iop13xx_irq_mask2 (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_2(read_intctl_2() & ~(1 << (irq - 64)));
}
static void
-iop13xx_irq_mask3 (unsigned int irq)
+iop13xx_irq_mask3 (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_3(read_intctl_3() & ~(1 << (irq - 96)));
}
static void
-iop13xx_irq_unmask0(unsigned int irq)
+iop13xx_irq_unmask0(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_0(read_intctl_0() | (1 << (irq - 0)));
}
static void
-iop13xx_irq_unmask1(unsigned int irq)
+iop13xx_irq_unmask1(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_1(read_intctl_1() | (1 << (irq - 32)));
}
static void
-iop13xx_irq_unmask2(unsigned int irq)
+iop13xx_irq_unmask2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_2(read_intctl_2() | (1 << (irq - 64)));
}
static void
-iop13xx_irq_unmask3(unsigned int irq)
+iop13xx_irq_unmask3(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
write_intctl_3(read_intctl_3() | (1 << (irq - 96)));
}
diff -u -p a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -156,7 +156,7 @@ void arch_teardown_msi_irq(unsigned int
destroy_irq(irq);
}
-static void iop13xx_msi_nop(unsigned int irq)
+static void iop13xx_msi_nop(struct irq_desc *unused)
{
return;
}
diff -u -p a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -32,15 +32,17 @@ static void intstr_write(u32 val)
}
static void
-iop32x_irq_mask(unsigned int irq)
+iop32x_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
iop32x_mask &= ~(1 << irq);
intctl_write(iop32x_mask);
}
static void
-iop32x_irq_unmask(unsigned int irq)
+iop32x_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
iop32x_mask |= 1 << irq;
intctl_write(iop32x_mask);
}
diff -u -p a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -53,29 +53,33 @@ static void intsize_write(u32 val)
}
static void
-iop33x_irq_mask1 (unsigned int irq)
+iop33x_irq_mask1 (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
iop33x_mask0 &= ~(1 << irq);
intctl0_write(iop33x_mask0);
}
static void
-iop33x_irq_mask2 (unsigned int irq)
+iop33x_irq_mask2 (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
iop33x_mask1 &= ~(1 << (irq - 32));
intctl1_write(iop33x_mask1);
}
static void
-iop33x_irq_unmask1(unsigned int irq)
+iop33x_irq_unmask1(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
iop33x_mask0 |= 1 << irq;
intctl0_write(iop33x_mask0);
}
static void
-iop33x_irq_unmask2(unsigned int irq)
+iop33x_irq_unmask2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
iop33x_mask1 |= (1 << (irq - 32));
intctl1_write(iop33x_mask1);
}
diff -u -p a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -309,8 +309,9 @@ static void ixp2000_GPIO_irq_handler(uns
}
}
-static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
+static int ixp2000_GPIO_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int line = irq - IRQ_IXP2000_GPIO0;
/*
@@ -342,8 +343,9 @@ static int ixp2000_GPIO_irq_type(unsigne
return 0;
}
-static void ixp2000_GPIO_irq_mask_ack(unsigned int irq)
+static void ixp2000_GPIO_irq_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
@@ -351,13 +353,15 @@ static void ixp2000_GPIO_irq_mask_ack(un
ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0)));
}
-static void ixp2000_GPIO_irq_mask(unsigned int irq)
+static void ixp2000_GPIO_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
}
-static void ixp2000_GPIO_irq_unmask(unsigned int irq)
+static void ixp2000_GPIO_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
}
@@ -368,8 +372,9 @@ static struct irq_chip ixp2000_GPIO_irq_
.set_type = ixp2000_GPIO_irq_type,
};
-static void ixp2000_pci_irq_mask(unsigned int irq)
+static void ixp2000_pci_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
if (irq == IRQ_IXP2000_PCIA)
ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26)));
@@ -377,8 +382,9 @@ static void ixp2000_pci_irq_mask(unsigne
ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27)));
}
-static void ixp2000_pci_irq_unmask(unsigned int irq)
+static void ixp2000_pci_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
if (irq == IRQ_IXP2000_PCIA)
ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 26)));
@@ -401,14 +407,16 @@ static void ixp2000_err_irq_handler(unsi
}
}
-static void ixp2000_err_irq_mask(unsigned int irq)
+static void ixp2000_err_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR,
(1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
}
-static void ixp2000_err_irq_unmask(unsigned int irq)
+static void ixp2000_err_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET,
(1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
}
@@ -425,13 +433,15 @@ static struct irq_chip ixp2000_pci_irq_c
.unmask = ixp2000_pci_irq_unmask
};
-static void ixp2000_irq_mask(unsigned int irq)
+static void ixp2000_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << irq));
}
-static void ixp2000_irq_unmask(unsigned int irq)
+static void ixp2000_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq));
}
diff -u -p a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -64,8 +64,9 @@ static struct slowport_cfg slowport_cpld
};
#endif
-static void ixdp2x00_irq_mask(unsigned int irq)
+static void ixdp2x00_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long dummy;
static struct slowport_cfg old_cfg;
@@ -88,8 +89,9 @@ static void ixdp2x00_irq_mask(unsigned i
#endif
}
-static void ixdp2x00_irq_unmask(unsigned int irq)
+static void ixdp2x00_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long dummy;
static struct slowport_cfg old_cfg;
@@ -112,7 +114,7 @@ static void ixdp2x00_irq_handler(unsigne
static struct slowport_cfg old_cfg;
int i;
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
#ifdef CONFIG_ARCH_IXDP2400
if (machine_is_ixdp2400())
@@ -134,7 +136,7 @@ static void ixdp2x00_irq_handler(unsigne
}
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
static struct irq_chip ixdp2x00_cpld_irq_chip = {
diff -u -p a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -49,14 +49,16 @@
/*************************************************************************
* IXDP2x01 IRQ Handling
*************************************************************************/
-static void ixdp2x01_irq_mask(unsigned int irq)
+static void ixdp2x01_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG,
IXP2000_BOARD_IRQ_MASK(irq));
}
-static void ixdp2x01_irq_unmask(unsigned int irq)
+static void ixdp2x01_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG,
IXP2000_BOARD_IRQ_MASK(irq));
}
@@ -68,7 +70,7 @@ static void ixdp2x01_irq_handler(unsigne
u32 ex_interrupt;
int i;
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
ex_interrupt = *IXDP2X01_INT_STAT_REG & valid_irq_mask;
@@ -84,7 +86,7 @@ static void ixdp2x01_irq_handler(unsigne
}
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
static struct irq_chip ixdp2x01_irq_chip = {
diff -u -p a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -111,8 +111,9 @@ enum ixp23xx_irq_type {
static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type);
-static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
+static int ixp23xx_irq_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int line = irq - IRQ_IXP23XX_GPIO6 + 6;
u32 int_style;
enum ixp23xx_irq_type irq_type;
@@ -173,8 +174,9 @@ static int ixp23xx_irq_set_type(unsigned
return 0;
}
-static void ixp23xx_irq_mask(unsigned int irq)
+static void ixp23xx_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
volatile unsigned long *intr_reg;
if (irq >= 56)
@@ -184,8 +186,9 @@ static void ixp23xx_irq_mask(unsigned in
*intr_reg &= ~(1 << (irq % 32));
}
-static void ixp23xx_irq_ack(unsigned int irq)
+static void ixp23xx_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int line = irq - IRQ_IXP23XX_GPIO6 + 6;
if ((line < 6) || (line > 15))
@@ -198,11 +201,12 @@ static void ixp23xx_irq_ack(unsigned int
* Level triggered interrupts on GPIO lines can only be cleared when the
* interrupt condition disappears.
*/
-static void ixp23xx_irq_level_unmask(unsigned int irq)
+static void ixp23xx_irq_level_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
volatile unsigned long *intr_reg;
- ixp23xx_irq_ack(irq);
+ ixp23xx_irq_ack(desc);
if (irq >= 56)
irq += 8;
@@ -211,8 +215,9 @@ static void ixp23xx_irq_level_unmask(uns
*intr_reg |= (1 << (irq % 32));
}
-static void ixp23xx_irq_edge_unmask(unsigned int irq)
+static void ixp23xx_irq_edge_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
volatile unsigned long *intr_reg;
if (irq >= 56)
@@ -236,13 +241,15 @@ static struct irq_chip ixp23xx_irq_edge_
.set_type = ixp23xx_irq_set_type
};
-static void ixp23xx_pci_irq_mask(unsigned int irq)
+static void ixp23xx_pci_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*IXP23XX_PCI_XSCALE_INT_ENABLE &= ~(1 << (IRQ_IXP23XX_INTA + 27 - irq));
}
-static void ixp23xx_pci_irq_unmask(unsigned int irq)
+static void ixp23xx_pci_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*IXP23XX_PCI_XSCALE_INT_ENABLE |= (1 << (IRQ_IXP23XX_INTA + 27 - irq));
}
@@ -256,7 +263,7 @@ static void pci_handler(unsigned int irq
pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
/* See which PCI_INTA, or PCI_INTB interrupted */
if (pci_interrupt & (1 << 26)) {
@@ -269,7 +276,7 @@ static void pci_handler(unsigned int irq
generic_handle_irq(irqno);
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
static struct irq_chip ixp23xx_pci_irq_chip = {
diff -u -p a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -48,13 +48,15 @@
/*
* IXDP2351 Interrupt Handling
*/
-static void ixdp2351_inta_mask(unsigned int irq)
+static void ixdp2351_inta_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(irq);
}
-static void ixdp2351_inta_unmask(unsigned int irq)
+static void ixdp2351_inta_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq);
}
@@ -64,7 +66,7 @@ static void ixdp2351_inta_handler(unsign
*IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID;
int i;
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
if (ex_interrupt & (1 << i)) {
@@ -74,7 +76,7 @@ static void ixdp2351_inta_handler(unsign
}
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
static struct irq_chip ixdp2351_inta_chip = {
@@ -83,13 +85,15 @@ static struct irq_chip ixdp2351_inta_chi
.unmask = ixdp2351_inta_unmask
};
-static void ixdp2351_intb_mask(unsigned int irq)
+static void ixdp2351_intb_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(irq);
}
-static void ixdp2351_intb_unmask(unsigned int irq)
+static void ixdp2351_intb_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
*IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq);
}
@@ -99,7 +103,7 @@ static void ixdp2351_intb_handler(unsign
*IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID;
int i;
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
if (ex_interrupt & (1 << i)) {
@@ -109,7 +113,7 @@ static void ixdp2351_intb_handler(unsign
}
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
static struct irq_chip ixdp2351_intb_chip = {
diff -u -p a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -128,8 +128,9 @@ int irq_to_gpio(unsigned int irq)
}
EXPORT_SYMBOL(irq_to_gpio);
-static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
+static int ixp4xx_set_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int line = irq2gpio[irq];
u32 int_style;
enum ixp4xx_irq_type irq_type;
@@ -193,16 +194,18 @@ static int ixp4xx_set_irq_type(unsigned
return 0;
}
-static void ixp4xx_irq_mask(unsigned int irq)
+static void ixp4xx_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
*IXP4XX_ICMR2 &= ~(1 << (irq - 32));
else
*IXP4XX_ICMR &= ~(1 << irq);
}
-static void ixp4xx_irq_ack(unsigned int irq)
+static void ixp4xx_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int line = (irq < 32) ? irq2gpio[irq] : -1;
if (line >= 0)
@@ -213,10 +216,11 @@ static void ixp4xx_irq_ack(unsigned int
* Level triggered interrupts on GPIO lines can only be cleared when the
* interrupt condition disappears.
*/
-static void ixp4xx_irq_unmask(unsigned int irq)
+static void ixp4xx_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (!(ixp4xx_irq_edge & (1 << irq)))
- ixp4xx_irq_ack(irq);
+ ixp4xx_irq_ack(desc);
if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
*IXP4XX_ICMR2 |= (1 << (irq - 32));
diff -u -p a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -34,8 +34,9 @@
#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>
-static void ks8695_irq_mask(unsigned int irqno)
+static void ks8695_irq_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long inten;
inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
@@ -44,8 +45,9 @@ static void ks8695_irq_mask(unsigned int
__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
}
-static void ks8695_irq_unmask(unsigned int irqno)
+static void ks8695_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long inten;
inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
@@ -54,8 +56,9 @@ static void ks8695_irq_unmask(unsigned i
__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
}
-static void ks8695_irq_ack(unsigned int irqno)
+static void ks8695_irq_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
__raw_writel((1 << irqno), KS8695_IRQ_VA + KS8695_INTST);
}
@@ -64,8 +67,9 @@ static struct irq_chip ks8695_irq_level_
static struct irq_chip ks8695_irq_edge_chip;
-static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
+static int ks8695_irq_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irqno = desc->irq;
unsigned long ctrl, mode;
unsigned short level_triggered = 0;
@@ -164,7 +168,7 @@ void __init ks8695_init_irq(void)
/* Edge-triggered interrupts */
default:
- ks8695_irq_ack(irq); /* clear pending bit */
+ ks8695_irq_ack(irq_to_desc(irq)); /* clear pending bit */
set_irq_chip(irq, &ks8695_irq_edge_chip);
set_irq_handler(irq, handle_edge_irq);
}
diff -u -p a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c
--- a/arch/arm/mach-l7200/core.c
+++ b/arch/arm/mach-l7200/core.c
@@ -45,13 +45,15 @@
#define FIQ_SOFT (*(volatile unsigned long *) (IRQ_BASE + 0x110))
#define FIQ_SOURCESEL (*(volatile unsigned long *) (IRQ_BASE + 0x118))
-static void l7200_mask_irq(unsigned int irq)
+static void l7200_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
IRQ_ENABLECLEAR = 1 << irq;
}
-static void l7200_unmask_irq(unsigned int irq)
+static void l7200_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
IRQ_ENABLE = 1 << irq;
}
diff -u -p a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -46,19 +46,22 @@ void __init kev7a400_map_io(void)
static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */
-static void kev7a400_ack_cpld_irq (u32 irq)
+static void kev7a400_ack_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD);
}
-static void kev7a400_mask_cpld_irq (u32 irq)
+static void kev7a400_mask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD));
CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
}
-static void kev7a400_unmask_cpld_irq (u32 irq)
+static void kev7a400_unmask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD);
CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
}
diff -u -p a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -159,8 +159,9 @@ static void __init lpd7a40x_init (void)
#endif
}
-static void lh7a40x_ack_cpld_irq (u32 irq)
+static void lh7a40x_ack_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* CPLD doesn't have ack capability, but some devices may */
#if defined (CPLD_INTMASK_TOUCH)
@@ -172,8 +173,9 @@ static void lh7a40x_ack_cpld_irq (u32 ir
#endif
}
-static void lh7a40x_mask_cpld_irq (u32 irq)
+static void lh7a40x_mask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
switch (irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET;
@@ -186,8 +188,9 @@ static void lh7a40x_mask_cpld_irq (u32 i
}
}
-static void lh7a40x_unmask_cpld_irq (u32 irq)
+static void lh7a40x_unmask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
switch (irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET;
@@ -211,7 +214,7 @@ static void lpd7a40x_cpld_handler (unsig
{
unsigned int mask = CPLD_INTERRUPTS;
- desc->chip->ack (irq);
+ desc->chip->ack (irq_to_desc(irq));
if ((mask & (1<<0)) == 0) /* WLAN */
generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -221,7 +224,7 @@ static void lpd7a40x_cpld_handler (unsig
generic_handle_irq(IRQ_TOUCH);
#endif
- desc->chip->unmask (irq); /* Level-triggered need this */
+ desc->chip->unmask (irq_to_desc(irq)); /* Level-triggered need this */
}
diff -u -p a/arch/arm/mach-lh7a40x/irq-kev7a400.c b/arch/arm/mach-lh7a40x/irq-kev7a400.c
--- a/arch/arm/mach-lh7a40x/irq-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/irq-kev7a400.c
@@ -23,21 +23,24 @@
static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */
static void
-lh7a400_ack_cpld_irq (u32 irq)
+lh7a400_ack_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD);
}
static void
-lh7a400_mask_cpld_irq (u32 irq)
+lh7a400_mask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD));
CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
}
static void
-lh7a400_unmask_cpld_irq (u32 irq)
+lh7a400_unmask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD);
CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
}
diff -u -p a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c
--- a/arch/arm/mach-lh7a40x/irq-lh7a400.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c
@@ -21,18 +21,21 @@
/* CPU IRQ handling */
-static void lh7a400_mask_irq (u32 irq)
+static void lh7a400_mask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
INTC_INTENC = (1 << irq);
}
-static void lh7a400_unmask_irq (u32 irq)
+static void lh7a400_unmask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
INTC_INTENS = (1 << irq);
}
-static void lh7a400_ack_gpio_irq (u32 irq)
+static void lh7a400_ack_gpio_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
INTC_INTENC = (1 << irq);
}
diff -u -p a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c
--- a/arch/arm/mach-lh7a40x/irq-lh7a404.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c
@@ -43,34 +43,40 @@ static unsigned char irq_pri_vic2[] = {
/* CPU IRQ handling */
-static void lh7a404_vic1_mask_irq (u32 irq)
+static void lh7a404_vic1_mask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
VIC1_INTENCLR = (1 << irq);
}
-static void lh7a404_vic1_unmask_irq (u32 irq)
+static void lh7a404_vic1_unmask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
VIC1_INTEN = (1 << irq);
}
-static void lh7a404_vic2_mask_irq (u32 irq)
+static void lh7a404_vic2_mask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
VIC2_INTENCLR = (1 << (irq - 32));
}
-static void lh7a404_vic2_unmask_irq (u32 irq)
+static void lh7a404_vic2_unmask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
VIC2_INTEN = (1 << (irq - 32));
}
-static void lh7a404_vic1_ack_gpio_irq (u32 irq)
+static void lh7a404_vic1_ack_gpio_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
VIC1_INTENCLR = (1 << irq);
}
-static void lh7a404_vic2_ack_gpio_irq (u32 irq)
+static void lh7a404_vic2_ack_gpio_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq));
VIC2_INTENCLR = (1 << irq);
}
diff -u -p a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
--- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
@@ -20,13 +20,14 @@
#include "common.h"
-static void lh7a40x_ack_cpld_irq (u32 irq)
+static void lh7a40x_ack_cpld_irq (struct irq_desc *unused)
{
/* CPLD doesn't have ack capability */
}
-static void lh7a40x_mask_cpld_irq (u32 irq)
+static void lh7a40x_mask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
switch (irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4;
@@ -37,8 +38,9 @@ static void lh7a40x_mask_cpld_irq (u32 i
}
}
-static void lh7a40x_unmask_cpld_irq (u32 irq)
+static void lh7a40x_unmask_cpld_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
switch (irq) {
case IRQ_LPD7A40X_ETH_INT:
CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4;
@@ -60,7 +62,7 @@ static void lh7a40x_cpld_handler (unsign
{
unsigned int mask = CPLD_INTERRUPTS;
- desc->chip->ack (irq);
+ desc->chip->ack (irq_to_desc(irq));
if ((mask & 0x1) == 0) /* WLAN */
generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -68,7 +70,7 @@ static void lh7a40x_cpld_handler (unsign
if ((mask & 0x2) == 0) /* Touch */
generic_handle_irq(IRQ_LPD7A400_TS);
- desc->chip->unmask (irq); /* Level-triggered need this */
+ desc->chip->unmask (irq_to_desc(irq)); /* Level-triggered need this */
}
diff -u -p a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -19,16 +19,18 @@
#include "common.h"
-static void icu_mask_irq(unsigned int irq)
+static void icu_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint32_t r = __raw_readl(ICU_INT_CONF(irq));
r &= ~ICU_INT_ROUTE_PJ4_IRQ;
__raw_writel(r, ICU_INT_CONF(irq));
}
-static void icu_unmask_irq(unsigned int irq)
+static void icu_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint32_t r = __raw_readl(ICU_INT_CONF(irq));
r |= ICU_INT_ROUTE_PJ4_IRQ;
@@ -103,9 +105,9 @@ static void init_mux_irq(struct irq_chip
for (irq = start; num > 0; irq++, num--) {
/* mask and clear the IRQ */
- chip->mask(irq);
+ chip->mask(irq_to_desc(irq));
if (chip->ack)
- chip->ack(irq);
+ chip->ack(irq_to_desc(irq));
set_irq_chip(irq, chip);
set_irq_flags(irq, IRQF_VALID);
@@ -118,7 +120,7 @@ void __init mmp2_init_icu(void)
int irq;
for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
- icu_mask_irq(irq);
+ icu_mask_irq(irq_to_desc(irq));
set_irq_chip(irq, &icu_irq_chip);
set_irq_flags(irq, IRQF_VALID);
diff -u -p a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c
--- a/arch/arm/mach-mmp/irq-pxa168.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
@@ -25,13 +25,15 @@
#define PRIORITY_DEFAULT 0x1
#define PRIORITY_NONE 0x0 /* means IRQ disabled */
-static void icu_mask_irq(unsigned int irq)
+static void icu_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(PRIORITY_NONE, ICU_INT_CONF(irq));
}
-static void icu_unmask_irq(unsigned int irq)
+static void icu_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(irq));
}
@@ -47,7 +49,7 @@ void __init icu_init_irq(void)
int irq;
for (irq = 0; irq < 64; irq++) {
- icu_mask_irq(irq);
+ icu_mask_irq(irq_to_desc(irq));
set_irq_chip(irq, &icu_irq_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
diff -u -p a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -64,32 +64,36 @@
#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4))
#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4))
-static void msm_irq_ack(unsigned int irq)
+static void msm_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0);
irq = 1 << (irq & 31);
writel(irq, reg);
}
-static void msm_irq_mask(unsigned int irq)
+static void msm_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0);
writel(1 << (irq & 31), reg);
}
-static void msm_irq_unmask(unsigned int irq)
+static void msm_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0);
writel(1 << (irq & 31), reg);
}
-static int msm_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_irq_set_wake(struct irq_desc *unused, unsigned int on)
{
return -EINVAL;
}
-static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_irq_set_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0);
void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0);
int b = 1 << (irq & 31);
@@ -101,11 +105,11 @@ static int msm_irq_set_type(unsigned int
if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
writel(readl(treg) | b, treg);
- irq_desc[irq].handle_irq = handle_edge_irq;
+ desc->handle_irq = handle_edge_irq;
}
if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
writel(readl(treg) & (~b), treg);
- irq_desc[irq].handle_irq = handle_level_irq;
+ desc->handle_irq = handle_level_irq;
}
return 0;
}
diff -u -p a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -116,8 +116,9 @@ static void mx31pdk_expio_irq_handler(ui
* Disable an expio pin's interrupt by setting the bit in the imr.
* @param irq an expio virtual irq number
*/
-static void expio_mask_irq(uint32_t irq)
+static void expio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t reg;
uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
@@ -131,23 +132,25 @@ static void expio_mask_irq(uint32_t irq)
* Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
* @param irq an expanded io virtual irq number
*/
-static void expio_ack_irq(uint32_t irq)
+static void expio_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
/* clear the interrupt status */
__raw_writew(1 << expio, CPLD_INT_RESET_REG);
__raw_writew(0, CPLD_INT_RESET_REG);
/* mask the interrupt */
- expio_mask_irq(irq);
+ expio_mask_irq(desc);
}
/*
* Enable a expio pin's interrupt by clearing the bit in the imr.
* @param irq a expio virtual irq number
*/
-static void expio_unmask_irq(uint32_t irq)
+static void expio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t reg;
uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
diff -u -p a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
--- a/arch/arm/mach-mx3/mach-mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -142,8 +142,9 @@ static void mx31ads_expio_irq_handler(u3
* Disable an expio pin's interrupt by setting the bit in the imr.
* @param irq an expio virtual irq number
*/
-static void expio_mask_irq(u32 irq)
+static void expio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 expio = MXC_IRQ_TO_EXPIO(irq);
/* mask the interrupt */
__raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
@@ -154,8 +155,9 @@ static void expio_mask_irq(u32 irq)
* Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
* @param irq an expanded io virtual irq number
*/
-static void expio_ack_irq(u32 irq)
+static void expio_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 expio = MXC_IRQ_TO_EXPIO(irq);
/* clear the interrupt status */
__raw_writew(1 << expio, PBC_INTSTATUS_REG);
@@ -165,8 +167,9 @@ static void expio_ack_irq(u32 irq)
* Enable a expio pin's interrupt by clearing the bit in the imr.
* @param irq a expio virtual irq number
*/
-static void expio_unmask_irq(u32 irq)
+static void expio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 expio = MXC_IRQ_TO_EXPIO(irq);
/* unmask the interrupt */
__raw_writew(1 << expio, PBC_INTMASK_SET_REG);
diff -u -p a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -88,8 +88,9 @@ netx_hif_demux_handler(unsigned int irq_
}
static int
-netx_hif_irq_type(unsigned int _irq, unsigned int type)
+netx_hif_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int _irq = desc->irq;
unsigned int val, irq;
val = readl(NETX_DPMAS_IF_CONF1);
@@ -119,8 +120,9 @@ netx_hif_irq_type(unsigned int _irq, uns
}
static void
-netx_hif_ack_irq(unsigned int _irq)
+netx_hif_ack_irq(struct irq_desc *desc)
{
+ unsigned int _irq = desc->irq;
unsigned int val, irq;
irq = _irq - NETX_IRQ_HIF_CHAINED(0);
@@ -134,8 +136,9 @@ netx_hif_ack_irq(unsigned int _irq)
}
static void
-netx_hif_mask_irq(unsigned int _irq)
+netx_hif_mask_irq(struct irq_desc *desc)
{
+ unsigned int _irq = desc->irq;
unsigned int val, irq;
irq = _irq - NETX_IRQ_HIF_CHAINED(0);
@@ -146,8 +149,9 @@ netx_hif_mask_irq(unsigned int _irq)
}
static void
-netx_hif_unmask_irq(unsigned int _irq)
+netx_hif_unmask_irq(struct irq_desc *desc)
{
+ unsigned int _irq = desc->irq;
unsigned int val, irq;
irq = _irq - NETX_IRQ_HIF_CHAINED(0);
diff -u -p a/arch/arm/mach-nomadik/gpio.c b/arch/arm/mach-nomadik/gpio.c
--- a/arch/arm/mach-nomadik/gpio.c
+++ b/arch/arm/mach-nomadik/gpio.c
@@ -95,8 +95,9 @@ static inline int nmk_gpio_get_bitmask(i
return 1 << (gpio % 32);
}
-static void nmk_gpio_irq_ack(unsigned int irq)
+static void nmk_gpio_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int gpio;
struct nmk_gpio_chip *nmk_chip;
@@ -107,8 +108,9 @@ static void nmk_gpio_irq_ack(unsigned in
writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
}
-static void nmk_gpio_irq_mask(unsigned int irq)
+static void nmk_gpio_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int gpio;
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
@@ -135,8 +137,9 @@ static void nmk_gpio_irq_mask(unsigned i
spin_unlock_irqrestore(&nmk_chip->lock, flags);
};
-static void nmk_gpio_irq_unmask(unsigned int irq)
+static void nmk_gpio_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int gpio;
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
@@ -163,8 +166,9 @@ static void nmk_gpio_irq_unmask(unsigned
spin_unlock_irqrestore(&nmk_chip->lock, flags);
}
-static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
+static int nmk_gpio_irq_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int gpio;
struct nmk_gpio_chip *nmk_chip;
unsigned long flags;
@@ -195,7 +199,7 @@ static int nmk_gpio_irq_set_type(unsigne
spin_unlock_irqrestore(&nmk_chip->lock, flags);
- nmk_gpio_irq_unmask(irq);
+ nmk_gpio_irq_unmask(desc);
return 0;
}
@@ -224,7 +228,7 @@ static void nmk_gpio_irq_handler(unsigne
}
if (0) {/* don't ack parent irq, as ack == disable */
host_chip = get_irq_chip(irq);
- host_chip->ack(irq);
+ host_chip->ack(irq_to_desc(irq));
}
}
diff -u -p a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -37,13 +37,14 @@ void __init board_a9m9750dev_map_io(void
ARRAY_SIZE(board_a9m9750dev_io_desc));
}
-static void a9m9750dev_fpga_ack_irq(unsigned int irq)
+static void a9m9750dev_fpga_ack_irq(struct irq_desc *unused)
{
/* nothing */
}
-static void a9m9750dev_fpga_mask_irq(unsigned int irq)
+static void a9m9750dev_fpga_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u8 ier;
ier = __raw_readb(FPGA_IER);
@@ -53,14 +54,15 @@ static void a9m9750dev_fpga_mask_irq(uns
__raw_writeb(ier, FPGA_IER);
}
-static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
+static void a9m9750dev_fpga_maskack_irq(struct irq_desc *desc)
{
- a9m9750dev_fpga_mask_irq(irq);
- a9m9750dev_fpga_ack_irq(irq);
+ a9m9750dev_fpga_mask_irq(desc);
+ a9m9750dev_fpga_ack_irq(desc);
}
-static void a9m9750dev_fpga_unmask_irq(unsigned int irq)
+static void a9m9750dev_fpga_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u8 ier;
ier = __raw_readb(FPGA_IER);
@@ -82,7 +84,7 @@ static void a9m9750dev_fpga_demux_handle
{
u8 stat = __raw_readb(FPGA_ISR);
- desc->chip->mask_ack(irq);
+ desc->chip->mask_ack(irq_to_desc(irq));
while (stat != 0) {
int irqno = fls(stat) - 1;
@@ -92,7 +94,7 @@ static void a9m9750dev_fpga_demux_handle
generic_handle_irq(FPGA_IRQ(irqno));
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
void __init board_a9m9750dev_init_irq(void)
diff -u -p a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -22,8 +22,9 @@
#define irq2prio(i) (i)
#define prio2irq(p) (p)
-static void ns9xxx_mask_irq(unsigned int irq)
+static void ns9xxx_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* XXX: better use cpp symbols */
int prio = irq2prio(irq);
u32 ic = __raw_readl(SYS_IC(prio / 4));
@@ -31,19 +32,20 @@ static void ns9xxx_mask_irq(unsigned int
__raw_writel(ic, SYS_IC(prio / 4));
}
-static void ns9xxx_ack_irq(unsigned int irq)
+static void ns9xxx_ack_irq(struct irq_desc *unused)
{
__raw_writel(0, SYS_ISRADDR);
}
-static void ns9xxx_maskack_irq(unsigned int irq)
+static void ns9xxx_maskack_irq(struct irq_desc *desc)
{
- ns9xxx_mask_irq(irq);
- ns9xxx_ack_irq(irq);
+ ns9xxx_mask_irq(desc);
+ ns9xxx_ack_irq(desc);
}
-static void ns9xxx_unmask_irq(unsigned int irq)
+static void ns9xxx_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* XXX: better use cpp symbols */
int prio = irq2prio(irq);
u32 ic = __raw_readl(SYS_IC(prio / 4));
@@ -92,10 +94,10 @@ static void handle_prio_irq(unsigned int
if (desc->status & IRQ_DISABLED)
out_mask:
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
/* ack unconditionally to unmask lower prio irqs */
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
raw_spin_unlock(&desc->lock);
}
diff -u -p a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c
--- a/arch/arm/mach-nuc93x/irq.c
+++ b/arch/arm/mach-nuc93x/irq.c
@@ -25,8 +25,9 @@
#include <mach/hardware.h>
#include <mach/regs-irq.h>
-static void nuc93x_irq_mask(unsigned int irq)
+static void nuc93x_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(1 << irq, REG_AIC_MDCR);
}
@@ -35,13 +36,14 @@ static void nuc93x_irq_mask(unsigned int
* to REG_AIC_EOSCR for ACK
*/
-static void nuc93x_irq_ack(unsigned int irq)
+static void nuc93x_irq_ack(struct irq_desc *unused)
{
__raw_writel(0x01, REG_AIC_EOSCR);
}
-static void nuc93x_irq_unmask(unsigned int irq)
+static void nuc93x_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(1 << irq, REG_AIC_MECR);
}
diff -u -p a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -30,8 +30,9 @@
#include <plat/fpga.h>
#include <mach/gpio.h>
-static void fpga_mask_irq(unsigned int irq)
+static void fpga_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= OMAP_FPGA_IRQ_BASE;
if (irq < 8)
@@ -58,13 +59,14 @@ static inline u32 get_fpga_unmasked_irqs
}
-static void fpga_ack_irq(unsigned int irq)
+static void fpga_ack_irq(struct irq_desc *unused)
{
/* Don't need to explicitly ACK FPGA interrupts */
}
-static void fpga_unmask_irq(unsigned int irq)
+static void fpga_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= OMAP_FPGA_IRQ_BASE;
if (irq < 8)
@@ -78,10 +80,10 @@ static void fpga_unmask_irq(unsigned int
| (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
}
-static void fpga_mask_ack_irq(unsigned int irq)
+static void fpga_mask_ack_irq(struct irq_desc *desc)
{
- fpga_mask_irq(irq);
- fpga_ack_irq(irq);
+ fpga_mask_irq(desc);
+ fpga_ack_irq(desc);
}
void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
diff -u -p a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -78,8 +78,9 @@ static void omap_ack_irq(unsigned int ir
omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET);
}
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int bank = IRQ_BANK(irq);
u32 l;
@@ -88,8 +89,9 @@ static void omap_mask_irq(unsigned int i
omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
}
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int bank = IRQ_BANK(irq);
u32 l;
@@ -98,14 +100,16 @@ static void omap_unmask_irq(unsigned int
omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
}
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_desc *desc)
{
- omap_mask_irq(irq);
+ unsigned int irq = desc->irq;
+ omap_mask_irq(desc);
omap_ack_irq(irq);
}
-static int omap_wake_irq(unsigned int irq, unsigned int enable)
+static int omap_wake_irq(struct irq_desc *desc, unsigned int enable)
{
+ unsigned int irq = desc->irq;
int bank = IRQ_BANK(irq);
if (enable)
@@ -234,9 +238,9 @@ void __init omap_init_irq(void)
/* Unmask level 2 handler */
if (cpu_is_omap7xx())
- omap_unmask_irq(INT_7XX_IH2_IRQ);
+ omap_unmask_irq(irq_to_desc(INT_7XX_IH2_IRQ));
else if (cpu_is_omap15xx())
- omap_unmask_irq(INT_1510_IH2_IRQ);
+ omap_unmask_irq(irq_to_desc(INT_1510_IH2_IRQ));
else if (cpu_is_omap16xx())
- omap_unmask_irq(INT_1610_IH2_IRQ);
+ omap_unmask_irq(irq_to_desc(INT_1610_IH2_IRQ));
}
diff -u -p a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -106,8 +106,9 @@ static void omap_ack_irq(unsigned int ir
intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL);
}
-static void omap_mask_irq(unsigned int irq)
+static void omap_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int offset = irq & (~(IRQ_BITS_PER_REG - 1));
if (cpu_is_omap34xx()) {
@@ -129,8 +130,9 @@ static void omap_mask_irq(unsigned int i
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
}
-static void omap_unmask_irq(unsigned int irq)
+static void omap_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int offset = irq & (~(IRQ_BITS_PER_REG - 1));
irq &= (IRQ_BITS_PER_REG - 1);
@@ -138,9 +140,10 @@ static void omap_unmask_irq(unsigned int
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
}
-static void omap_mask_ack_irq(unsigned int irq)
+static void omap_mask_ack_irq(struct irq_desc *desc)
{
- omap_mask_irq(irq);
+ unsigned int irq = desc->irq;
+ omap_mask_irq(desc);
omap_ack_irq(irq);
}
diff -u -p a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -36,24 +36,28 @@
static u8 pnx4008_irq_type[NR_IRQS] = PNX4008_IRQ_TYPES;
-static void pnx4008_mask_irq(unsigned int irq)
+static void pnx4008_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */
}
-static void pnx4008_unmask_irq(unsigned int irq)
+static void pnx4008_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq)); /* unmask interrupt */
}
-static void pnx4008_mask_ack_irq(unsigned int irq)
+static void pnx4008_mask_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */
__raw_writel(INTC_BIT(irq), INTC_SR(irq)); /* clear interrupt status */
}
-static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
+static int pnx4008_set_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
switch (type) {
case IRQ_TYPE_EDGE_RISING:
__raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */
@@ -99,14 +103,14 @@ void __init pnx4008_init_irq(void)
for (i = 0; i < NR_IRQS; i++) {
set_irq_flags(i, IRQF_VALID);
set_irq_chip(i, &pnx4008_irq_chip);
- pnx4008_set_irq_type(i, pnx4008_irq_type[i]);
+ pnx4008_set_irq_type(irq_to_desc(i), pnx4008_irq_type[i]);
}
/* configure and enable IRQ 0,1,30,31 (cascade interrupts) */
- pnx4008_set_irq_type(SUB1_IRQ_N, pnx4008_irq_type[SUB1_IRQ_N]);
- pnx4008_set_irq_type(SUB2_IRQ_N, pnx4008_irq_type[SUB2_IRQ_N]);
- pnx4008_set_irq_type(SUB1_FIQ_N, pnx4008_irq_type[SUB1_FIQ_N]);
- pnx4008_set_irq_type(SUB2_FIQ_N, pnx4008_irq_type[SUB2_FIQ_N]);
+ pnx4008_set_irq_type(irq_to_desc(SUB1_IRQ_N), pnx4008_irq_type[SUB1_IRQ_N]);
+ pnx4008_set_irq_type(irq_to_desc(SUB2_IRQ_N), pnx4008_irq_type[SUB2_IRQ_N]);
+ pnx4008_set_irq_type(irq_to_desc(SUB1_FIQ_N), pnx4008_irq_type[SUB1_FIQ_N]);
+ pnx4008_set_irq_type(irq_to_desc(SUB2_FIQ_N), pnx4008_irq_type[SUB2_FIQ_N]);
/* mask all others */
__raw_writel((1 << SUB2_FIQ_N) | (1 << SUB1_FIQ_N) |
diff -u -p a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -73,15 +73,17 @@ int __init parse_balloon3_features(char
}
early_param("balloon3_features", parse_balloon3_features);
-static void balloon3_mask_irq(unsigned int irq)
+static void balloon3_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int balloon3_irq = (irq - BALLOON3_IRQ(0));
balloon3_irq_enabled &= ~(1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
-static void balloon3_unmask_irq(unsigned int irq)
+static void balloon3_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int balloon3_irq = (irq - BALLOON3_IRQ(0));
balloon3_irq_enabled |= (1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
@@ -102,7 +104,7 @@ static void balloon3_irq_handler(unsigne
do {
/* clear useless edge notification */
if (desc->chip->ack)
- desc->chip->ack(BALLOON3_AUX_NIRQ);
+ desc->chip->ack(irq_to_desc(BALLOON3_AUX_NIRQ));
while (pending) {
irq = BALLOON3_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff -u -p a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(int
static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
{
/* clear our parent irq */
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
it8152_irq_demux(irq, desc);
}
diff -u -p a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -37,13 +37,15 @@
static int pxa_internal_irq_nr;
-static void pxa_mask_irq(unsigned int irq)
+static void pxa_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
_ICMR(irq) &= ~(1 << IRQ_BIT(irq));
}
-static void pxa_unmask_irq(unsigned int irq)
+static void pxa_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
_ICMR(irq) |= 1 << IRQ_BIT(irq);
}
@@ -57,8 +59,9 @@ static struct irq_chip pxa_internal_irq_
/*
* GPIO IRQs for GPIO 0 and 1
*/
-static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
+static int pxa_set_low_gpio_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int gpio = irq - IRQ_GPIO0;
if (__gpio_is_occupied(gpio)) {
@@ -79,18 +82,21 @@ static int pxa_set_low_gpio_type(unsigne
return 0;
}
-static void pxa_ack_low_gpio(unsigned int irq)
+static void pxa_ack_low_gpio(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
GEDR0 = (1 << (irq - IRQ_GPIO0));
}
-static void pxa_mask_low_gpio(unsigned int irq)
+static void pxa_mask_low_gpio(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR &= ~(1 << (irq - PXA_IRQ(0)));
}
-static void pxa_unmask_low_gpio(unsigned int irq)
+static void pxa_unmask_low_gpio(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR |= 1 << (irq - PXA_IRQ(0));
}
diff -u -p a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -94,8 +94,9 @@ static unsigned long lpd270_pin_config[]
static unsigned int lpd270_irq_enabled;
-static void lpd270_mask_irq(unsigned int irq)
+static void lpd270_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int lpd270_irq = irq - LPD270_IRQ(0);
__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
@@ -104,8 +105,9 @@ static void lpd270_mask_irq(unsigned int
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
}
-static void lpd270_unmask_irq(unsigned int irq)
+static void lpd270_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int lpd270_irq = irq - LPD270_IRQ(0);
lpd270_irq_enabled |= 1 << lpd270_irq;
@@ -125,7 +127,7 @@ static void lpd270_irq_handler(unsigned
pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
do {
- desc->chip->ack(irq); /* clear useless edge notification */
+ desc->chip->ack(irq_to_desc(irq)); /* clear useless edge notification */
if (likely(pending)) {
irq = LPD270_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff -u -p a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -121,14 +121,16 @@ EXPORT_SYMBOL(lubbock_set_misc_wr);
static unsigned long lubbock_irq_enabled;
-static void lubbock_mask_irq(unsigned int irq)
+static void lubbock_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int lubbock_irq = (irq - LUBBOCK_IRQ(0));
LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
}
-static void lubbock_unmask_irq(unsigned int irq)
+static void lubbock_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int lubbock_irq = (irq - LUBBOCK_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
@@ -146,7 +148,7 @@ static void lubbock_irq_handler(unsigned
{
unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
do {
- desc->chip->ack(irq); /* clear our parent irq */
+ desc->chip->ack(irq_to_desc(irq)); /* clear our parent irq */
if (likely(pending)) {
irq = LUBBOCK_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff -u -p a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -122,14 +122,16 @@ static unsigned long mainstone_pin_confi
static unsigned long mainstone_irq_enabled;
-static void mainstone_mask_irq(unsigned int irq)
+static void mainstone_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int mainstone_irq = (irq - MAINSTONE_IRQ(0));
MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
}
-static void mainstone_unmask_irq(unsigned int irq)
+static void mainstone_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int mainstone_irq = (irq - MAINSTONE_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
MST_INTSETCLR &= ~(1 << mainstone_irq);
@@ -147,7 +149,7 @@ static void mainstone_irq_handler(unsign
{
unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
do {
- desc->chip->ack(irq); /* clear useless edge notification */
+ desc->chip->ack(irq_to_desc(irq)); /* clear useless edge notification */
if (likely(pending)) {
irq = MAINSTONE_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff -u -p a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -241,14 +241,16 @@ static struct platform_device pcm990_bac
static unsigned long pcm990_irq_enabled;
-static void pcm990_mask_ack_irq(unsigned int irq)
+static void pcm990_mask_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pcm990_irq = (irq - PCM027_IRQ(0));
PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
}
-static void pcm990_unmask_irq(unsigned int irq)
+static void pcm990_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pcm990_irq = (irq - PCM027_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */
PCM990_INTSETCLR |= 1 << pcm990_irq;
@@ -265,7 +267,7 @@ static void pcm990_irq_handler(unsigned
unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
do {
- desc->chip->ack(irq); /* clear our parent IRQ */
+ desc->chip->ack(irq_to_desc(irq)); /* clear our parent IRQ */
if (likely(pending)) {
irq = PCM027_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
diff -u -p a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -536,19 +536,22 @@ static inline void pxa3xx_init_pm(void)
#define pxa3xx_set_wake NULL
#endif
-static void pxa_ack_ext_wakeup(unsigned int irq)
+static void pxa_ack_ext_wakeup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
PECR |= PECR_IS(irq - IRQ_WAKEUP0);
}
-static void pxa_mask_ext_wakeup(unsigned int irq)
+static void pxa_mask_ext_wakeup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f));
PECR &= ~PECR_IE(irq - IRQ_WAKEUP0);
}
-static void pxa_unmask_ext_wakeup(unsigned int irq)
+static void pxa_unmask_ext_wakeup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f);
PECR |= PECR_IE(irq - IRQ_WAKEUP0);
}
diff -u -p a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -247,8 +247,9 @@ static inline int viper_bit_to_irq(int b
return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
}
-static void viper_ack_irq(unsigned int irq)
+static void viper_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int viper_irq = viper_irq_to_bitmask(irq);
if (viper_irq & 0xff)
@@ -257,13 +258,15 @@ static void viper_ack_irq(unsigned int i
VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
}
-static void viper_mask_irq(unsigned int irq)
+static void viper_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
}
-static void viper_unmask_irq(unsigned int irq)
+static void viper_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
}
@@ -281,7 +284,7 @@ static void viper_irq_handler(unsigned i
do {
/* we're in a chained irq handler,
* so ack the interrupt by hand */
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
if (likely(pending)) {
irq = viper_bit_to_irq(__ffs(pending));
diff -u -p a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -82,18 +82,21 @@ static inline int zeus_bit_to_irq(int bi
return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
}
-static void zeus_ack_irq(unsigned int irq)
+static void zeus_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ);
}
-static void zeus_mask_irq(unsigned int irq)
+static void zeus_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq));
}
-static void zeus_unmask_irq(unsigned int irq)
+static void zeus_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq);
}
@@ -110,7 +113,7 @@ static void zeus_irq_handler(unsigned in
do {
/* we're in a chained irq handler,
* so ack the interrupt by hand */
- desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO));
+ desc->chip->ack(irq_to_desc(gpio_to_irq(ZEUS_ISA_GPIO)));
if (likely(pending)) {
irq = zeus_bit_to_irq(__ffs(pending));
diff -u -p a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -6,8 +6,9 @@
#include <asm/hardware/iomd.h>
#include <asm/irq.h>
-static void iomd_ack_irq_a(unsigned int irq)
+static void iomd_ack_irq_a(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << irq;
@@ -16,8 +17,9 @@ static void iomd_ack_irq_a(unsigned int
iomd_writeb(mask, IOMD_IRQCLRA);
}
-static void iomd_mask_irq_a(unsigned int irq)
+static void iomd_mask_irq_a(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << irq;
@@ -25,8 +27,9 @@ static void iomd_mask_irq_a(unsigned int
iomd_writeb(val & ~mask, IOMD_IRQMASKA);
}
-static void iomd_unmask_irq_a(unsigned int irq)
+static void iomd_unmask_irq_a(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << irq;
@@ -40,8 +43,9 @@ static struct irq_chip iomd_a_chip = {
.unmask = iomd_unmask_irq_a,
};
-static void iomd_mask_irq_b(unsigned int irq)
+static void iomd_mask_irq_b(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << (irq & 7);
@@ -49,8 +53,9 @@ static void iomd_mask_irq_b(unsigned int
iomd_writeb(val & ~mask, IOMD_IRQMASKB);
}
-static void iomd_unmask_irq_b(unsigned int irq)
+static void iomd_unmask_irq_b(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << (irq & 7);
@@ -64,8 +69,9 @@ static struct irq_chip iomd_b_chip = {
.unmask = iomd_unmask_irq_b,
};
-static void iomd_mask_irq_dma(unsigned int irq)
+static void iomd_mask_irq_dma(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << (irq & 7);
@@ -73,8 +79,9 @@ static void iomd_mask_irq_dma(unsigned i
iomd_writeb(val & ~mask, IOMD_DMAMASK);
}
-static void iomd_unmask_irq_dma(unsigned int irq)
+static void iomd_unmask_irq_dma(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << (irq & 7);
@@ -88,8 +95,9 @@ static struct irq_chip iomd_dma_chip = {
.unmask = iomd_unmask_irq_dma,
};
-static void iomd_mask_irq_fiq(unsigned int irq)
+static void iomd_mask_irq_fiq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << (irq & 7);
@@ -97,8 +105,9 @@ static void iomd_mask_irq_fiq(unsigned i
iomd_writeb(val & ~mask, IOMD_FIQMASK);
}
-static void iomd_unmask_irq_fiq(unsigned int irq)
+static void iomd_unmask_irq_fiq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int val, mask;
mask = 1 << (irq & 7);
diff -u -p a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -75,8 +75,9 @@ static unsigned char bast_pc104_irqmasks
static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };
static void
-bast_pc104_mask(unsigned int irqno)
+bast_pc104_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long temp;
temp = __raw_readb(BAST_VA_PC104_IRQMASK);
@@ -87,15 +88,16 @@ bast_pc104_mask(unsigned int irqno)
static void
bast_pc104_maskack(unsigned int irqno)
{
- struct irq_desc *desc = irq_desc + IRQ_ISA;
+ struct irq_desc *desc = irq_to_desc(IRQ_ISA);
- bast_pc104_mask(irqno);
- desc->chip->ack(IRQ_ISA);
+ bast_pc104_mask(irq_to_desc(irqno));
+ desc->chip->ack(desc);
}
static void
-bast_pc104_unmask(unsigned int irqno)
+bast_pc104_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long temp;
temp = __raw_readb(BAST_VA_PC104_IRQMASK);
@@ -122,8 +124,8 @@ bast_irq_pc104_demux(unsigned int irq,
if (unlikely(stat == 0)) {
/* ack if we get an irq with nothing (ie, startup) */
- desc = irq_desc + IRQ_ISA;
- desc->chip->ack(IRQ_ISA);
+ desc = irq_to_desc(IRQ_ISA);
+ desc->chip->ack(desc);
} else {
/* handle the IRQ */
diff -u -p a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -49,8 +49,9 @@
*/
static void
-s3c2412_irq_mask(unsigned int irqno)
+s3c2412_irq_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;
@@ -62,8 +63,9 @@ s3c2412_irq_mask(unsigned int irqno)
}
static inline void
-s3c2412_irq_ack(unsigned int irqno)
+s3c2412_irq_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
__raw_writel(bitval, S3C2412_EINTPEND);
@@ -89,8 +91,9 @@ s3c2412_irq_maskack(unsigned int irqno)
}
static void
-s3c2412_irq_unmask(unsigned int irqno)
+s3c2412_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;
@@ -132,18 +135,21 @@ static void s3c2412_irq_demux_cfsdi(unsi
#define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
#define SUBMSK_CFSDI INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF)
-static void s3c2412_irq_cfsdi_mask(unsigned int irqno)
+static void s3c2412_irq_cfsdi_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
}
-static void s3c2412_irq_cfsdi_unmask(unsigned int irqno)
+static void s3c2412_irq_cfsdi_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_CFSDI);
}
-static void s3c2412_irq_cfsdi_ack(unsigned int irqno)
+static void s3c2412_irq_cfsdi_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
}
@@ -154,8 +160,9 @@ static struct irq_chip s3c2412_irq_cfsdi
.unmask = s3c2412_irq_cfsdi_unmask,
};
-static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
+static int s3c2412_irq_rtc_wake(struct irq_desc *desc, unsigned int state)
{
+ unsigned int irqno = desc->irq;
unsigned long pwrcfg;
pwrcfg = __raw_readl(S3C2412_PWRCFG);
diff -u -p a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -69,20 +69,23 @@ static void s3c_irq_demux_wdtac97(unsign
#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
static void
-s3c_irq_wdtac97_mask(unsigned int irqno)
+s3c_irq_wdtac97_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
}
static void
-s3c_irq_wdtac97_unmask(unsigned int irqno)
+s3c_irq_wdtac97_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_WDT);
}
static void
-s3c_irq_wdtac97_ack(unsigned int irqno)
+s3c_irq_wdtac97_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
}
diff -u -p a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
--- a/arch/arm/mach-s3c2440/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
@@ -68,20 +68,23 @@ static void s3c_irq_demux_cam(unsigned i
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
static void
-s3c_irq_cam_mask(unsigned int irqno)
+s3c_irq_cam_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
}
static void
-s3c_irq_cam_unmask(unsigned int irqno)
+s3c_irq_cam_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_CAM);
}
static void
-s3c_irq_cam_ack(unsigned int irqno)
+s3c_irq_cam_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
}
diff -u -p a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -75,18 +75,21 @@ static void s3c2443_irq_demux_wdtac97(un
#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
-static void s3c2443_irq_wdtac97_mask(unsigned int irqno)
+static void s3c2443_irq_wdtac97_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
}
-static void s3c2443_irq_wdtac97_unmask(unsigned int irqno)
+static void s3c2443_irq_wdtac97_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
}
-static void s3c2443_irq_wdtac97_ack(unsigned int irqno)
+static void s3c2443_irq_wdtac97_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
}
@@ -107,18 +110,21 @@ static void s3c2443_irq_demux_lcd(unsign
#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
-static void s3c2443_irq_lcd_mask(unsigned int irqno)
+static void s3c2443_irq_lcd_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
}
-static void s3c2443_irq_lcd_unmask(unsigned int irqno)
+static void s3c2443_irq_lcd_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_LCD);
}
-static void s3c2443_irq_lcd_ack(unsigned int irqno)
+static void s3c2443_irq_lcd_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
}
@@ -140,18 +146,21 @@ static void s3c2443_irq_demux_dma(unsign
#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
-static void s3c2443_irq_dma_mask(unsigned int irqno)
+static void s3c2443_irq_dma_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
}
-static void s3c2443_irq_dma_unmask(unsigned int irqno)
+static void s3c2443_irq_dma_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_DMA);
}
-static void s3c2443_irq_dma_ack(unsigned int irqno)
+static void s3c2443_irq_dma_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
}
@@ -173,18 +182,21 @@ static void s3c2443_irq_demux_uart3(unsi
#define SUBMSK_UART3 (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
-static void s3c2443_irq_uart3_mask(unsigned int irqno)
+static void s3c2443_irq_uart3_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
}
-static void s3c2443_irq_uart3_unmask(unsigned int irqno)
+static void s3c2443_irq_uart3_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_UART3);
}
-static void s3c2443_irq_uart3_ack(unsigned int irqno)
+static void s3c2443_irq_uart3_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
}
@@ -205,18 +217,21 @@ static void s3c2443_irq_demux_cam(unsign
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
#define SUBMSK_CAM INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
-static void s3c2443_irq_cam_mask(unsigned int irqno)
+static void s3c2443_irq_cam_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_CAM, SUBMSK_CAM);
}
-static void s3c2443_irq_cam_unmask(unsigned int irqno)
+static void s3c2443_irq_cam_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_CAM);
}
-static void s3c2443_irq_cam_ack(unsigned int irqno)
+static void s3c2443_irq_cam_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_CAM, SUBMSK_CAM);
}
diff -u -p a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -32,8 +32,9 @@
#define eint_offset(irq) ((irq) - IRQ_EINT(0))
#define eint_irq_to_bit(irq) (1 << eint_offset(irq))
-static inline void s3c_irq_eint_mask(unsigned int irq)
+static inline void s3c_irq_eint_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask;
mask = __raw_readl(S3C64XX_EINT0MASK);
@@ -41,8 +42,9 @@ static inline void s3c_irq_eint_mask(uns
__raw_writel(mask, S3C64XX_EINT0MASK);
}
-static void s3c_irq_eint_unmask(unsigned int irq)
+static void s3c_irq_eint_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask;
mask = __raw_readl(S3C64XX_EINT0MASK);
@@ -50,20 +52,22 @@ static void s3c_irq_eint_unmask(unsigned
__raw_writel(mask, S3C64XX_EINT0MASK);
}
-static inline void s3c_irq_eint_ack(unsigned int irq)
+static inline void s3c_irq_eint_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND);
}
-static void s3c_irq_eint_maskack(unsigned int irq)
+static void s3c_irq_eint_maskack(struct irq_desc *desc)
{
/* compiler should in-line these */
- s3c_irq_eint_mask(irq);
- s3c_irq_eint_ack(irq);
+ s3c_irq_eint_mask(desc);
+ s3c_irq_eint_ack(desc);
}
-static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
+static int s3c_irq_eint_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int offs = eint_offset(irq);
int pin, pin_val;
int shift;
diff -u -p a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -37,8 +37,9 @@ static int GPIO_IRQ_mask = (1 << 11) - 1
#define GPIO_11_27_IRQ(i) ((i) - 21)
#define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq))
-static int sa1100_gpio_type(unsigned int irq, unsigned int type)
+static int sa1100_gpio_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
if (irq <= 10)
@@ -70,23 +71,27 @@ static int sa1100_gpio_type(unsigned int
/*
* GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10.
*/
-static void sa1100_low_gpio_ack(unsigned int irq)
+static void sa1100_low_gpio_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
GEDR = (1 << irq);
}
-static void sa1100_low_gpio_mask(unsigned int irq)
+static void sa1100_low_gpio_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR &= ~(1 << irq);
}
-static void sa1100_low_gpio_unmask(unsigned int irq)
+static void sa1100_low_gpio_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR |= 1 << irq;
}
-static int sa1100_low_gpio_wake(unsigned int irq, unsigned int on)
+static int sa1100_low_gpio_wake(struct irq_desc *desc, unsigned int on)
{
+ unsigned int irq = desc->irq;
if (on)
PWER |= 1 << irq;
else
@@ -139,15 +144,17 @@ sa1100_high_gpio_handler(unsigned int ir
* In addition, the IRQs are all collected up into one bit in the
* interrupt controller registers.
*/
-static void sa1100_high_gpio_ack(unsigned int irq)
+static void sa1100_high_gpio_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = GPIO11_27_MASK(irq);
GEDR = mask;
}
-static void sa1100_high_gpio_mask(unsigned int irq)
+static void sa1100_high_gpio_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = GPIO11_27_MASK(irq);
GPIO_IRQ_mask &= ~mask;
@@ -156,8 +163,9 @@ static void sa1100_high_gpio_mask(unsign
GFER &= ~mask;
}
-static void sa1100_high_gpio_unmask(unsigned int irq)
+static void sa1100_high_gpio_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = GPIO11_27_MASK(irq);
GPIO_IRQ_mask |= mask;
@@ -166,8 +174,9 @@ static void sa1100_high_gpio_unmask(unsi
GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
}
-static int sa1100_high_gpio_wake(unsigned int irq, unsigned int on)
+static int sa1100_high_gpio_wake(struct irq_desc *desc, unsigned int on)
{
+ unsigned int irq = desc->irq;
if (on)
PWER |= GPIO11_27_MASK(irq);
else
@@ -188,21 +197,24 @@ static struct irq_chip sa1100_high_gpio_
* We don't need to ACK IRQs on the SA1100 unless they're GPIOs
* this is for internal IRQs i.e. from 11 to 31.
*/
-static void sa1100_mask_irq(unsigned int irq)
+static void sa1100_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR &= ~(1 << irq);
}
-static void sa1100_unmask_irq(unsigned int irq)
+static void sa1100_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ICMR |= (1 << irq);
}
/*
* Apart form GPIOs, only the RTC alarm can be a wakeup event.
*/
-static int sa1100_set_wake(unsigned int irq, unsigned int on)
+static int sa1100_set_wake(struct irq_desc *desc, unsigned int on)
{
+ unsigned int irq = desc->irq;
if (irq == IRQ_RTCAlrm) {
if (on)
PWER |= PWER_RTC;
diff -u -p a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -36,7 +36,7 @@ neponset_irq_handler(unsigned int irq, s
/*
* Acknowledge the parent IRQ.
*/
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
/*
* Read the interrupt reason register. Let's have all
@@ -54,7 +54,7 @@ neponset_irq_handler(unsigned int irq, s
* recheck the register for any pending IRQs.
*/
if (irr & (IRR_ETHERNET | IRR_USAR)) {
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
/*
* Ack the interrupt now to prevent re-entering
@@ -62,7 +62,7 @@ neponset_irq_handler(unsigned int irq, s
* since we'll check the IRR register prior to
* leaving.
*/
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
if (irr & IRR_ETHERNET) {
generic_handle_irq(IRQ_NEPONSET_SMC9196);
@@ -72,7 +72,7 @@ neponset_irq_handler(unsigned int irq, s
generic_handle_irq(IRQ_NEPONSET_USAR);
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
if (irr & IRR_SA1111) {
diff -u -p a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c
--- a/arch/arm/mach-shark/irq.c
+++ b/arch/arm/mach-shark/irq.c
@@ -30,8 +30,9 @@ static unsigned char cached_irq_mask[2]
* These have to be protected by the irq controller spinlock
* before being called.
*/
-static void shark_disable_8259A_irq(unsigned int irq)
+static void shark_disable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
if (irq<8) {
mask = 1 << irq;
@@ -44,8 +45,9 @@ static void shark_disable_8259A_irq(unsi
}
}
-static void shark_enable_8259A_irq(unsigned int irq)
+static void shark_enable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
if (irq<8) {
mask = ~(1 << irq);
@@ -58,7 +60,7 @@ static void shark_enable_8259A_irq(unsig
}
}
-static void shark_ack_8259A_irq(unsigned int irq){}
+static void shark_ack_8259A_irq(struct irq_desc *unused){}
static irqreturn_t bogus_int(int irq, void *dev_id)
{
diff -u -p a/arch/arm/mach-stmp378x/stmp378x.c b/arch/arm/mach-stmp378x/stmp378x.c
--- a/arch/arm/mach-stmp378x/stmp378x.c
+++ b/arch/arm/mach-stmp378x/stmp378x.c
@@ -47,7 +47,7 @@
/*
* IRQ handling
*/
-static void stmp378x_ack_irq(unsigned int irq)
+static void stmp378x_ack_irq(struct irq_desc *unused)
{
/* Tell ICOLL to release IRQ line */
__raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR);
@@ -60,15 +60,17 @@ static void stmp378x_ack_irq(unsigned in
(void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT);
}
-static void stmp378x_mask_irq(unsigned int irq)
+static void stmp378x_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* IRQ disable */
stmp3xxx_clearl(BM_ICOLL_INTERRUPTn_ENABLE,
REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
}
-static void stmp378x_unmask_irq(unsigned int irq)
+static void stmp378x_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* IRQ enable */
stmp3xxx_setl(BM_ICOLL_INTERRUPTn_ENABLE,
REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10);
diff -u -p a/arch/arm/mach-stmp37xx/stmp37xx.c b/arch/arm/mach-stmp37xx/stmp37xx.c
--- a/arch/arm/mach-stmp37xx/stmp37xx.c
+++ b/arch/arm/mach-stmp37xx/stmp37xx.c
@@ -43,8 +43,9 @@
/*
* IRQ handling
*/
-static void stmp37xx_ack_irq(unsigned int irq)
+static void stmp37xx_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* Disable IRQ */
stmp3xxx_clearl(0x04 << ((irq % 4) * 8),
REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10);
@@ -56,15 +57,17 @@ static void stmp37xx_ack_irq(unsigned in
(void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT);
}
-static void stmp37xx_mask_irq(unsigned int irq)
+static void stmp37xx_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* IRQ disable */
stmp3xxx_clearl(0x04 << ((irq % 4) * 8),
REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10);
}
-static void stmp37xx_unmask_irq(unsigned int irq)
+static void stmp37xx_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* IRQ enable */
stmp3xxx_setl(0x04 << ((irq % 4) * 8),
REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10);
diff -u -p a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -60,14 +60,16 @@
#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
-static void sic_mask_irq(unsigned int irq)
+static void sic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_SIC_START;
writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
}
-static void sic_unmask_irq(unsigned int irq)
+static void sic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= IRQ_SIC_START;
writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
}
diff -u -p a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -92,8 +92,9 @@ static void nuc900_group_enable(struct g
__raw_writel(regval, REG_AIC_GEN);
}
-static void nuc900_irq_mask(unsigned int irq)
+static void nuc900_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct group_irq *group_irq;
group_irq = NULL;
@@ -143,13 +144,14 @@ static void nuc900_irq_mask(unsigned int
* to REG_AIC_EOSCR for ACK
*/
-static void nuc900_irq_ack(unsigned int irq)
+static void nuc900_irq_ack(struct irq_desc *unused)
{
__raw_writel(0x01, REG_AIC_EOSCR);
}
-static void nuc900_irq_unmask(unsigned int irq)
+static void nuc900_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct group_irq *group_irq;
group_irq = NULL;
diff -u -p a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ b/arch/arm/oprofile/op_model_mpcore.c
@@ -270,12 +270,12 @@ static void em_stop(void)
*/
static void em_route_irq(int irq, unsigned int cpu)
{
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
const struct cpumask *mask = cpumask_of(cpu);
spin_lock_irq(&desc->lock);
cpumask_copy(desc->affinity, mask);
- desc->chip->set_affinity(irq, mask);
+ desc->chip->set_affinity(desc, mask);
spin_unlock_irq(&desc->lock);
}
diff -u -p a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -63,28 +63,32 @@ static void _set_gpio_irqenable(struct m
__raw_writel(l, port->base + GPIO_IMR);
}
-static void gpio_ack_irq(u32 irq)
+static void gpio_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 gpio = irq_to_gpio(irq);
_clear_gpio_irqstatus(&mxc_gpio_ports[gpio / 32], gpio & 0x1f);
}
-static void gpio_mask_irq(u32 irq)
+static void gpio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 gpio = irq_to_gpio(irq);
_set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 0);
}
-static void gpio_unmask_irq(u32 irq)
+static void gpio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 gpio = irq_to_gpio(irq);
_set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1);
}
static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset);
-static int gpio_set_irq_type(u32 irq, u32 type)
+static int gpio_set_irq_type(struct irq_desc *desc, u32 type)
{
+ unsigned int irq = desc->irq;
u32 gpio = irq_to_gpio(irq);
struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32];
u32 bit, val;
diff -u -p a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -91,14 +91,16 @@ EXPORT_SYMBOL(mxc_set_irq_fiq);
#endif /* CONFIG_FIQ */
/* Disable interrupt number "irq" in the AVIC */
-static void mxc_mask_irq(unsigned int irq)
+static void mxc_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(irq, avic_base + AVIC_INTDISNUM);
}
/* Enable interrupt number "irq" in the AVIC */
-static void mxc_unmask_irq(unsigned int irq)
+static void mxc_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__raw_writel(irq, avic_base + AVIC_INTENNUM);
}
diff -u -p a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -51,8 +51,9 @@ void __iomem *tzic_base; /* Used as irq
*
* @param irq interrupt source number
*/
-static void tzic_mask_irq(unsigned int irq)
+static void tzic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int index, off;
index = irq >> 5;
@@ -65,8 +66,9 @@ static void tzic_mask_irq(unsigned int i
*
* @param irq interrupt source number
*/
-static void tzic_unmask_irq(unsigned int irq)
+static void tzic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int index, off;
index = irq >> 5;
@@ -85,8 +87,9 @@ static unsigned int wakeup_intr[4];
*
* @return This function returns 0 on success.
*/
-static int tzic_set_wake_irq(unsigned int irq, unsigned int enable)
+static int tzic_set_wake_irq(struct irq_desc *desc, unsigned int enable)
{
+ unsigned int irq = desc->irq;
unsigned int index, off;
index = irq >> 5;
diff -u -p a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -871,8 +871,9 @@ bad:
return -EINVAL;
}
-static int gpio_irq_type(unsigned irq, unsigned type)
+static int gpio_irq_type(struct irq_desc *desc, unsigned type)
{
+ unsigned int irq = desc->irq;
struct gpio_bank *bank;
unsigned gpio;
int retval;
@@ -898,8 +899,8 @@ static int gpio_irq_type(unsigned irq, u
spin_lock_irqsave(&bank->lock, flags);
retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
if (retval == 0) {
- irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
- irq_desc[irq].status |= type;
+ desc->status &= ~IRQ_TYPE_SENSE_MASK;
+ desc->status |= type;
}
spin_unlock_irqrestore(&bank->lock, flags);
@@ -1163,8 +1164,9 @@ static void _reset_gpio(struct gpio_bank
}
/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
-static int gpio_wake_enable(unsigned int irq, unsigned int enable)
+static int gpio_wake_enable(struct irq_desc *desc, unsigned int enable)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq - IH_GPIO_BASE;
struct gpio_bank *bank;
int retval;
@@ -1266,7 +1268,7 @@ static void gpio_irq_handler(unsigned in
u32 retrigger = 0;
int unmasked = 0;
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
bank = get_irq_data(irq);
#ifdef CONFIG_ARCH_OMAP1
@@ -1318,7 +1320,7 @@ static void gpio_irq_handler(unsigned in
configured, we could unmask GPIO bank interrupt immediately */
if (!level_mask && !unmasked) {
unmasked = 1;
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
isr |= retrigger;
@@ -1353,28 +1355,31 @@ static void gpio_irq_handler(unsigned in
handler(s) are executed in order to avoid spurious bank
interrupt */
if (!unmasked)
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
-static void gpio_irq_shutdown(unsigned int irq)
+static void gpio_irq_shutdown(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq - IH_GPIO_BASE;
struct gpio_bank *bank = get_irq_chip_data(irq);
_reset_gpio(bank, gpio);
}
-static void gpio_ack_irq(unsigned int irq)
+static void gpio_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq - IH_GPIO_BASE;
struct gpio_bank *bank = get_irq_chip_data(irq);
_clear_gpio_irqstatus(bank, gpio);
}
-static void gpio_mask_irq(unsigned int irq)
+static void gpio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq - IH_GPIO_BASE;
struct gpio_bank *bank = get_irq_chip_data(irq);
@@ -1382,12 +1387,12 @@ static void gpio_mask_irq(unsigned int i
_set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
}
-static void gpio_unmask_irq(unsigned int irq)
+static void gpio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = irq - IH_GPIO_BASE;
struct gpio_bank *bank = get_irq_chip_data(irq);
unsigned int irq_mask = 1 << get_gpio_index(gpio);
- struct irq_desc *desc = irq_to_desc(irq);
u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
if (trigger)
@@ -1419,21 +1424,23 @@ static struct irq_chip gpio_irq_chip = {
/* MPUIO uses the always-on 32k clock */
-static void mpuio_ack_irq(unsigned int irq)
+static void mpuio_ack_irq(struct irq_desc *unused)
{
/* The ISR is reset automatically, so do nothing here. */
}
-static void mpuio_mask_irq(unsigned int irq)
+static void mpuio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
struct gpio_bank *bank = get_irq_chip_data(irq);
_set_gpio_irqenable(bank, gpio, 0);
}
-static void mpuio_unmask_irq(unsigned int irq)
+static void mpuio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
struct gpio_bank *bank = get_irq_chip_data(irq);
diff -u -p a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -233,19 +233,21 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
*
****************************************************************************/
-static void gpio_irq_ack(u32 irq)
+static void gpio_irq_ack(struct irq_desc *desc)
{
- int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
+ unsigned int irq = desc->irq;
+ int type = desc->status & IRQ_TYPE_SENSE_MASK;
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
int pin = irq_to_gpio(irq);
writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin));
}
}
-static void gpio_irq_mask(u32 irq)
+static void gpio_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq_to_gpio(irq);
- int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
+ int type = desc->status & IRQ_TYPE_SENSE_MASK;
u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
u32 u = readl(reg);
@@ -253,10 +255,11 @@ static void gpio_irq_mask(u32 irq)
writel(u, reg);
}
-static void gpio_irq_unmask(u32 irq)
+static void gpio_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq_to_gpio(irq);
- int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK;
+ int type = desc->status & IRQ_TYPE_SENSE_MASK;
u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ?
GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
u32 u = readl(reg);
@@ -264,10 +267,10 @@ static void gpio_irq_unmask(u32 irq)
writel(u, reg);
}
-static int gpio_irq_set_type(u32 irq, u32 type)
+static int gpio_irq_set_type(struct irq_desc *desc, u32 type)
{
+ unsigned int irq = desc->irq;
int pin = irq_to_gpio(irq);
- struct irq_desc *desc;
u32 u;
u = readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31));
@@ -277,8 +280,6 @@ static int gpio_irq_set_type(u32 irq, u3
return -EINVAL;
}
- desc = irq_desc + irq;
-
/*
* Set edge/level type.
*/
@@ -341,7 +342,7 @@ void orion_gpio_irq_handler(int pinoff)
for (pin = pinoff; pin < pinoff + 8; pin++) {
int irq = gpio_to_irq(pin);
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
if (!(cause & (1 << (pin & 31))))
continue;
diff -u -p a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -14,8 +14,9 @@
#include <linux/io.h>
#include <plat/irq.h>
-static void orion_irq_mask(u32 irq)
+static void orion_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *maskaddr = get_irq_chip_data(irq);
u32 mask;
@@ -24,8 +25,9 @@ static void orion_irq_mask(u32 irq)
writel(mask, maskaddr);
}
-static void orion_irq_unmask(u32 irq)
+static void orion_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *maskaddr = get_irq_chip_data(irq);
u32 mask;
diff -u -p a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -155,8 +155,9 @@ static inline void update_edge_detect(st
__raw_writel(gfer, c->regbase + GFER_OFFSET);
}
-static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
+static int pxa_gpio_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
struct pxa_gpio_chip *c;
int gpio = irq_to_gpio(irq);
unsigned long gpdr, mask = GPIO_bit(gpio);
@@ -227,16 +228,18 @@ static void pxa_gpio_demux_handler(unsig
} while (loop);
}
-static void pxa_ack_muxed_gpio(unsigned int irq)
+static void pxa_ack_muxed_gpio(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int gpio = irq_to_gpio(irq);
struct pxa_gpio_chip *c = gpio_to_chip(gpio);
__raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
}
-static void pxa_mask_muxed_gpio(unsigned int irq)
+static void pxa_mask_muxed_gpio(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int gpio = irq_to_gpio(irq);
struct pxa_gpio_chip *c = gpio_to_chip(gpio);
uint32_t grer, gfer;
@@ -249,8 +252,9 @@ static void pxa_mask_muxed_gpio(unsigned
__raw_writel(gfer, c->regbase + GFER_OFFSET);
}
-static void pxa_unmask_muxed_gpio(unsigned int irq)
+static void pxa_unmask_muxed_gpio(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int gpio = irq_to_gpio(irq);
struct pxa_gpio_chip *c = gpio_to_chip(gpio);
diff -u -p a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -34,8 +34,9 @@
#include <plat/irq.h>
static void
-s3c_irq_mask(unsigned int irqno)
+s3c_irq_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long mask;
irqno -= IRQ_EINT0;
@@ -46,8 +47,9 @@ s3c_irq_mask(unsigned int irqno)
}
static inline void
-s3c_irq_ack(unsigned int irqno)
+s3c_irq_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
__raw_writel(bitval, S3C2410_SRCPND);
@@ -55,8 +57,9 @@ s3c_irq_ack(unsigned int irqno)
}
static inline void
-s3c_irq_maskack(unsigned int irqno)
+s3c_irq_maskack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;
@@ -69,8 +72,9 @@ s3c_irq_maskack(unsigned int irqno)
static void
-s3c_irq_unmask(unsigned int irqno)
+s3c_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long mask;
if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23)
@@ -100,8 +104,9 @@ struct irq_chip s3c_irq_chip = {
};
static void
-s3c_irqext_mask(unsigned int irqno)
+s3c_irqext_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long mask;
irqno -= EXTINT_OFF;
@@ -112,8 +117,9 @@ s3c_irqext_mask(unsigned int irqno)
}
static void
-s3c_irqext_ack(unsigned int irqno)
+s3c_irqext_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long req;
unsigned long bit;
unsigned long mask;
@@ -131,16 +137,17 @@ s3c_irqext_ack(unsigned int irqno)
if (irqno <= IRQ_EINT7 ) {
if ((req & 0xf0) == 0)
- s3c_irq_ack(IRQ_EINT4t7);
+ s3c_irq_ack(irq_to_desc(IRQ_EINT4t7));
} else {
if ((req >> 8) == 0)
- s3c_irq_ack(IRQ_EINT8t23);
+ s3c_irq_ack(irq_to_desc(IRQ_EINT8t23));
}
}
static void
-s3c_irqext_unmask(unsigned int irqno)
+s3c_irqext_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
unsigned long mask;
irqno -= EXTINT_OFF;
@@ -151,8 +158,9 @@ s3c_irqext_unmask(unsigned int irqno)
}
int
-s3c_irqext_type(unsigned int irq, unsigned int type)
+s3c_irqext_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
void __iomem *extint_reg;
void __iomem *gpcon_reg;
unsigned long gpcon_offset, extint_offset;
@@ -261,20 +269,23 @@ static struct irq_chip s3c_irq_eint0t4 =
/* UART0 */
static void
-s3c_irq_uart0_mask(unsigned int irqno)
+s3c_irq_uart0_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_UART0, 7);
}
static void
-s3c_irq_uart0_unmask(unsigned int irqno)
+s3c_irq_uart0_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_UART0);
}
static void
-s3c_irq_uart0_ack(unsigned int irqno)
+s3c_irq_uart0_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_UART0, 7);
}
@@ -288,20 +299,23 @@ static struct irq_chip s3c_irq_uart0 = {
/* UART1 */
static void
-s3c_irq_uart1_mask(unsigned int irqno)
+s3c_irq_uart1_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_UART1, 7 << 3);
}
static void
-s3c_irq_uart1_unmask(unsigned int irqno)
+s3c_irq_uart1_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_UART1);
}
static void
-s3c_irq_uart1_ack(unsigned int irqno)
+s3c_irq_uart1_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_UART1, 7 << 3);
}
@@ -315,20 +329,23 @@ static struct irq_chip s3c_irq_uart1 = {
/* UART2 */
static void
-s3c_irq_uart2_mask(unsigned int irqno)
+s3c_irq_uart2_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_UART2, 7 << 6);
}
static void
-s3c_irq_uart2_unmask(unsigned int irqno)
+s3c_irq_uart2_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_UART2);
}
static void
-s3c_irq_uart2_ack(unsigned int irqno)
+s3c_irq_uart2_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_maskack(irqno, INTMSK_UART2, 7 << 6);
}
@@ -342,20 +359,23 @@ static struct irq_chip s3c_irq_uart2 = {
/* ADC and Touchscreen */
static void
-s3c_irq_adc_mask(unsigned int irqno)
+s3c_irq_adc_mask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_mask(irqno, INTMSK_ADCPARENT, 3 << 9);
}
static void
-s3c_irq_adc_unmask(unsigned int irqno)
+s3c_irq_adc_unmask(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_unmask(irqno, INTMSK_ADCPARENT);
}
static void
-s3c_irq_adc_ack(unsigned int irqno)
+s3c_irq_adc_ack(struct irq_desc *desc)
{
+ unsigned int irqno = desc->irq;
s3c_irqsub_ack(irqno, INTMSK_ADCPARENT, 3 << 9);
}
diff -u -p a/arch/arm/plat-s5pc1xx/irq-eint.c b/arch/arm/plat-s5pc1xx/irq-eint.c
--- a/arch/arm/plat-s5pc1xx/irq-eint.c
+++ b/arch/arm/plat-s5pc1xx/irq-eint.c
@@ -67,8 +67,9 @@ static inline int s3c_eint_to_bit(unsign
return bit;
}
-static inline void s3c_irq_eint_mask(unsigned int irq)
+static inline void s3c_irq_eint_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask;
u32 bank = s3c_get_bank(irq);
@@ -77,8 +78,9 @@ static inline void s3c_irq_eint_mask(uns
__raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank));
}
-static void s3c_irq_eint_unmask(unsigned int irq)
+static void s3c_irq_eint_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask;
u32 bank = s3c_get_bank(irq);
@@ -87,22 +89,24 @@ static void s3c_irq_eint_unmask(unsigned
__raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank));
}
-static inline void s3c_irq_eint_ack(unsigned int irq)
+static inline void s3c_irq_eint_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 bank = s3c_get_bank(irq);
__raw_writel(s3c_eint_to_bit(irq), S5PC1XX_WKUP_INT_PEND(bank));
}
-static void s3c_irq_eint_maskack(unsigned int irq)
+static void s3c_irq_eint_maskack(struct irq_desc *desc)
{
/* compiler should in-line these */
- s3c_irq_eint_mask(irq);
- s3c_irq_eint_ack(irq);
+ s3c_irq_eint_mask(desc);
+ s3c_irq_eint_ack(desc);
}
-static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
+static int s3c_irq_eint_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
u32 bank = s3c_get_bank(irq);
int real = s3c_get_eint(irq);
int gpio, shift, sfn;
@@ -211,28 +215,31 @@ static void s3c_irq_demux_eint16_31(unsi
/*
* Handle EINT0 ... EINT15 at VIC directly
*/
-static void s3c_irq_vic_eint_mask(unsigned int irq)
+static void s3c_irq_vic_eint_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *base = get_irq_chip_data(irq);
unsigned int real;
- s3c_irq_eint_mask(irq);
+ s3c_irq_eint_mask(desc);
real = s3c_get_eint(irq);
writel(1 << real, base + VIC_INT_ENABLE_CLEAR);
}
-static void s3c_irq_vic_eint_unmask(unsigned int irq)
+static void s3c_irq_vic_eint_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *base = get_irq_chip_data(irq);
unsigned int real;
- s3c_irq_eint_unmask(irq);
+ s3c_irq_eint_unmask(desc);
real = s3c_get_eint(irq);
writel(1 << real, base + VIC_INT_ENABLE);
}
-static inline void s3c_irq_vic_eint_ack(unsigned int irq)
+static inline void s3c_irq_vic_eint_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 bit;
u32 bank = s3c_get_bank(irq);
@@ -240,11 +247,11 @@ static inline void s3c_irq_vic_eint_ack(
__raw_writel(bit, S5PC1XX_WKUP_INT_PEND(bank));
}
-static void s3c_irq_vic_eint_maskack(unsigned int irq)
+static void s3c_irq_vic_eint_maskack(struct irq_desc *desc)
{
/* compiler should in-line these */
- s3c_irq_vic_eint_mask(irq);
- s3c_irq_vic_eint_ack(irq);
+ s3c_irq_vic_eint_mask(desc);
+ s3c_irq_vic_eint_ack(desc);
}
static struct irq_chip s3c_irq_vic_eint = {
diff -u -p a/arch/arm/plat-s5pc1xx/irq-gpio.c b/arch/arm/plat-s5pc1xx/irq-gpio.c
--- a/arch/arm/plat-s5pc1xx/irq-gpio.c
+++ b/arch/arm/plat-s5pc1xx/irq-gpio.c
@@ -140,8 +140,9 @@ static int s5pc1xx_get_offset(unsigned i
return irq - S3C_IRQ_GPIO(chip->base);
}
-static void s5pc1xx_gpioint_ack(unsigned int irq)
+static void s5pc1xx_gpioint_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int group, offset, pend_offset;
unsigned int value;
@@ -154,8 +155,9 @@ static void s5pc1xx_gpioint_ack(unsigned
__raw_writel(value, S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset);
}
-static void s5pc1xx_gpioint_mask(unsigned int irq)
+static void s5pc1xx_gpioint_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int group, offset, mask_offset;
unsigned int value;
@@ -168,8 +170,9 @@ static void s5pc1xx_gpioint_mask(unsigne
__raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset);
}
-static void s5pc1xx_gpioint_unmask(unsigned int irq)
+static void s5pc1xx_gpioint_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int group, offset, mask_offset;
unsigned int value;
@@ -182,14 +185,15 @@ static void s5pc1xx_gpioint_unmask(unsig
__raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset);
}
-static void s5pc1xx_gpioint_mask_ack(unsigned int irq)
+static void s5pc1xx_gpioint_mask_ack(struct irq_desc *desc)
{
- s5pc1xx_gpioint_mask(irq);
- s5pc1xx_gpioint_ack(irq);
+ s5pc1xx_gpioint_mask(desc);
+ s5pc1xx_gpioint_ack(desc);
}
-static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type)
+static int s5pc1xx_gpioint_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int group, offset, con_offset;
unsigned int value;
diff -u -p a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -39,8 +39,9 @@ static inline unsigned int s3c_irq_uart_
return irq & 3;
}
-static void s3c_irq_uart_mask(unsigned int irq)
+static void s3c_irq_uart_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
u32 reg;
@@ -50,8 +51,9 @@ static void s3c_irq_uart_mask(unsigned i
__raw_writel(reg, regs + S3C64XX_UINTM);
}
-static void s3c_irq_uart_maskack(unsigned int irq)
+static void s3c_irq_uart_maskack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
u32 reg;
@@ -62,8 +64,9 @@ static void s3c_irq_uart_maskack(unsigne
__raw_writel(1 << bit, regs + S3C64XX_UINTP);
}
-static void s3c_irq_uart_unmask(unsigned int irq)
+static void s3c_irq_uart_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
u32 reg;
@@ -73,8 +76,9 @@ static void s3c_irq_uart_unmask(unsigned
__raw_writel(reg, regs + S3C64XX_UINTM);
}
-static void s3c_irq_uart_ack(unsigned int irq)
+static void s3c_irq_uart_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
diff -u -p a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -29,8 +29,9 @@ static void s3c_irq_demux_vic_timer(unsi
/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-static void s3c_irq_timer_mask(unsigned int irq)
+static void s3c_irq_timer_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
reg &= 0x1f; /* mask out pending interrupts */
@@ -38,8 +39,9 @@ static void s3c_irq_timer_mask(unsigned
__raw_writel(reg, S3C64XX_TINT_CSTAT);
}
-static void s3c_irq_timer_unmask(unsigned int irq)
+static void s3c_irq_timer_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
reg &= 0x1f; /* mask out pending interrupts */
@@ -47,8 +49,9 @@ static void s3c_irq_timer_unmask(unsigne
__raw_writel(reg, S3C64XX_TINT_CSTAT);
}
-static void s3c_irq_timer_ack(unsigned int irq)
+static void s3c_irq_timer_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
reg &= 0x1f;
diff -u -p a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c
--- a/arch/arm/plat-stmp3xxx/irq.c
+++ b/arch/arm/plat-stmp3xxx/irq.c
@@ -34,7 +34,7 @@ void __init stmp3xxx_init_irq(struct irq
/* Disable all interrupts initially */
for (i = 0; i < NR_REAL_IRQS; i++) {
- chip->mask(i);
+ chip->mask(irq_to_desc(i));
set_irq_chip(i, chip);
set_irq_handler(i, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
diff -u -p a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c
--- a/arch/arm/plat-stmp3xxx/pinmux.c
+++ b/arch/arm/plat-stmp3xxx/pinmux.c
@@ -365,8 +365,9 @@ static int stmp3xxx_irq_to_gpio(int irq,
return -ENOENT;
}
-static int stmp3xxx_set_irqtype(unsigned irq, unsigned type)
+static int stmp3xxx_set_irqtype(struct irq_desc *desc, unsigned type)
{
+ unsigned int irq = desc->irq;
struct stmp3xxx_pinmux_bank *pm;
unsigned gpio;
int l, p;
@@ -398,8 +399,9 @@ static int stmp3xxx_set_irqtype(unsigned
return 0;
}
-static void stmp3xxx_pin_ack_irq(unsigned irq)
+static void stmp3xxx_pin_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 stat;
struct stmp3xxx_pinmux_bank *pm;
unsigned gpio;
@@ -409,8 +411,9 @@ static void stmp3xxx_pin_ack_irq(unsigne
stmp3xxx_clearl(stat, pm->irqstat);
}
-static void stmp3xxx_pin_mask_irq(unsigned irq)
+static void stmp3xxx_pin_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct stmp3xxx_pinmux_bank *pm;
unsigned gpio;
@@ -419,8 +422,9 @@ static void stmp3xxx_pin_mask_irq(unsign
stmp3xxx_clearl(1 << gpio, pm->pin2irq);
}
-static void stmp3xxx_pin_unmask_irq(unsigned irq)
+static void stmp3xxx_pin_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct stmp3xxx_pinmux_bank *pm;
unsigned gpio;
@@ -496,7 +500,7 @@ static void stmp3xxx_gpio_irq(u32 irq, s
while (stat) {
if (stat & 1)
irq_desc[gpio_irq].handle_irq(gpio_irq,
- &irq_desc[gpio_irq]);
+ irq_to_desc(gpio_irq));
gpio_irq++;
stat >>= 1;
}
diff -u -p a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
--- a/arch/avr32/mach-at32ap/extint.c
+++ b/arch/avr32/mach-at32ap/extint.c
@@ -60,35 +60,39 @@ struct eic {
static struct eic *nmi_eic;
static bool nmi_enabled;
-static void eic_ack_irq(unsigned int irq)
+static void eic_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct eic *eic = get_irq_chip_data(irq);
eic_writel(eic, ICR, 1 << (irq - eic->first_irq));
}
-static void eic_mask_irq(unsigned int irq)
+static void eic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct eic *eic = get_irq_chip_data(irq);
eic_writel(eic, IDR, 1 << (irq - eic->first_irq));
}
-static void eic_mask_ack_irq(unsigned int irq)
+static void eic_mask_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct eic *eic = get_irq_chip_data(irq);
eic_writel(eic, ICR, 1 << (irq - eic->first_irq));
eic_writel(eic, IDR, 1 << (irq - eic->first_irq));
}
-static void eic_unmask_irq(unsigned int irq)
+static void eic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct eic *eic = get_irq_chip_data(irq);
eic_writel(eic, IER, 1 << (irq - eic->first_irq));
}
-static int eic_set_irq_type(unsigned int irq, unsigned int flow_type)
+static int eic_set_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
struct eic *eic = get_irq_chip_data(irq);
- struct irq_desc *desc;
unsigned int i = irq - eic->first_irq;
u32 mode, edge, level;
int ret = 0;
@@ -97,8 +101,6 @@ static int eic_set_irq_type(unsigned int
if (flow_type == IRQ_TYPE_NONE)
flow_type = IRQ_TYPE_LEVEL_LOW;
- desc = &irq_desc[irq];
-
mode = eic_readl(eic, MODE);
edge = eic_readl(eic, EDGE);
level = eic_readl(eic, LEVEL);
diff -u -p a/arch/avr32/mach-at32ap/intc.c b/arch/avr32/mach-at32ap/intc.c
--- a/arch/avr32/mach-at32ap/intc.c
+++ b/arch/avr32/mach-at32ap/intc.c
@@ -69,7 +69,7 @@ asmlinkage void do_IRQ(int level, struct
irq_enter();
irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
desc->handle_irq(irq, desc);
/*
diff -u -p a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -249,23 +249,25 @@ static void gpio_set(struct gpio_chip *c
/* GPIO IRQ support */
-static void gpio_irq_mask(unsigned irq)
+static void gpio_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned gpio = irq_to_gpio(irq);
struct pio_device *pio = &pio_dev[gpio >> 5];
pio_writel(pio, IDR, 1 << (gpio & 0x1f));
}
-static void gpio_irq_unmask(unsigned irq)
+static void gpio_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned gpio = irq_to_gpio(irq);
struct pio_device *pio = &pio_dev[gpio >> 5];
pio_writel(pio, IER, 1 << (gpio & 0x1f));
}
-static int gpio_irq_type(unsigned irq, unsigned type)
+static int gpio_irq_type(struct irq_desc *unused, unsigned type)
{
if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
return -EINVAL;
@@ -301,7 +303,7 @@ static void gpio_irq_handler(unsigned ir
isr &= ~(1 << i);
i += gpio_irq;
- d = &irq_desc[i];
+ d = irq_to_desc(i);
d->handle_irq(i, d);
} while (isr);
diff -u -p a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -121,20 +121,22 @@ static void __init search_IAR(void)
* This is for core internal IRQs
*/
-static void bfin_ack_noop(unsigned int irq)
+static void bfin_ack_noop(struct irq_desc *unused)
{
/* Dummy function. */
}
-static void bfin_core_mask_irq(unsigned int irq)
+static void bfin_core_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
bfin_irq_flags &= ~(1 << irq);
if (!irqs_disabled_hw())
local_irq_enable_hw();
}
-static void bfin_core_unmask_irq(unsigned int irq)
+static void bfin_core_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
bfin_irq_flags |= 1 << irq;
/*
* If interrupts are enabled, IMASK must contain the same value
@@ -150,8 +152,9 @@ static void bfin_core_unmask_irq(unsigne
return;
}
-static void bfin_internal_mask_irq(unsigned int irq)
+static void bfin_internal_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
#ifdef CONFIG_BF53x
@@ -208,15 +211,16 @@ static void bfin_internal_unmask_irq(uns
}
#ifdef CONFIG_SMP
-static void bfin_internal_unmask_irq(unsigned int irq)
+static void bfin_internal_unmask_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
bfin_internal_unmask_irq_affinity(irq, desc->affinity);
}
-static int bfin_internal_set_affinity(unsigned int irq, const struct cpumask *mask)
+static int bfin_internal_set_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
- bfin_internal_mask_irq(irq);
+ unsigned int irq = desc->irq;
+ bfin_internal_mask_irq(desc);
bfin_internal_unmask_irq_affinity(irq, mask);
return 0;
@@ -224,8 +228,9 @@ static int bfin_internal_set_affinity(un
#endif
#ifdef CONFIG_PM
-int bfin_internal_set_wake(unsigned int irq, unsigned int state)
+int bfin_internal_set_wake(struct irq_desc *desc, unsigned int state)
{
+ unsigned int irq = desc->irq;
u32 bank, bit, wakeup = 0;
unsigned long flags;
bank = SIC_SYSIRQ(irq) / 32;
@@ -309,7 +314,7 @@ static void bfin_handle_irq(unsigned irq
__ipipe_handle_irq(irq, ®s);
ipipe_trace_irq_exit(irq);
#else /* !CONFIG_IPIPE */
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
desc->handle_irq(irq, desc);
#endif /* !CONFIG_IPIPE */
}
@@ -317,16 +322,18 @@ static void bfin_handle_irq(unsigned irq
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
static int error_int_mask;
-static void bfin_generic_error_mask_irq(unsigned int irq)
+static void bfin_generic_error_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR));
if (!error_int_mask)
- bfin_internal_mask_irq(IRQ_GENERIC_ERROR);
+ bfin_internal_mask_irq(irq_to_desc(IRQ_GENERIC_ERROR));
}
-static void bfin_generic_error_unmask_irq(unsigned int irq)
+static void bfin_generic_error_unmask_irq(struct irq_desc *desc)
{
- bfin_internal_unmask_irq(IRQ_GENERIC_ERROR);
+ unsigned int irq = desc->irq;
+ bfin_internal_unmask_irq(irq_to_desc(IRQ_GENERIC_ERROR));
error_int_mask |= 1L << (irq - IRQ_PPI_ERROR);
}
@@ -445,8 +452,9 @@ static void bfin_mac_status_ack_irq(unsi
}
}
-static void bfin_mac_status_mask_irq(unsigned int irq)
+static void bfin_mac_status_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mac_stat_int_mask &= ~(1L << (irq - IRQ_MAC_PHYINT));
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
switch (irq) {
@@ -458,13 +466,14 @@ static void bfin_mac_status_mask_irq(uns
}
#else
if (!mac_stat_int_mask)
- bfin_internal_mask_irq(IRQ_MAC_ERROR);
+ bfin_internal_mask_irq(irq_to_desc(IRQ_MAC_ERROR));
#endif
bfin_mac_status_ack_irq(irq);
}
-static void bfin_mac_status_unmask_irq(unsigned int irq)
+static void bfin_mac_status_unmask_irq(struct irq_desc *desc)
{
+unsigned int irq = desc->irq;
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
switch (irq) {
case IRQ_MAC_PHYINT:
@@ -475,18 +484,18 @@ static void bfin_mac_status_unmask_irq(u
}
#else
if (!mac_stat_int_mask)
- bfin_internal_unmask_irq(IRQ_MAC_ERROR);
+ bfin_internal_unmask_irq(irq_to_desc(IRQ_MAC_ERROR));
#endif
mac_stat_int_mask |= 1L << (irq - IRQ_MAC_PHYINT);
}
#ifdef CONFIG_PM
-int bfin_mac_status_set_wake(unsigned int irq, unsigned int state)
+int bfin_mac_status_set_wake(struct irq_desc *unused, unsigned int state)
{
#ifdef BF537_GENERIC_ERROR_INT_DEMUX
- return bfin_internal_set_wake(IRQ_GENERIC_ERROR, state);
+ return bfin_internal_set_wake(irq_to_desc(IRQ_GENERIC_ERROR), state);
#else
- return bfin_internal_set_wake(IRQ_MAC_ERROR, state);
+ return bfin_internal_set_wake(irq_to_desc(IRQ_MAC_ERROR), state);
#endif
}
#endif
@@ -536,7 +545,7 @@ static inline void bfin_set_irq_handler(
#ifdef CONFIG_IPIPE
_set_irq_handler(irq, handle_level_irq);
#else
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
/* May not call generic set_irq_handler() due to spinlock
recursion. */
desc->handle_irq = handle;
@@ -556,9 +565,9 @@ static void bfin_gpio_ack_irq(unsigned i
set_gpio_data(irq_to_gpio(irq), 0);
}
-static void bfin_gpio_mask_ack_irq(unsigned int irq)
+static void bfin_gpio_mask_ack_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_desc + irq;
+ unsigned int irq = desc->irq;
u32 gpionr = irq_to_gpio(irq);
if (desc->handle_irq == handle_edge_irq)
@@ -567,39 +576,44 @@ static void bfin_gpio_mask_ack_irq(unsig
set_gpio_maska(gpionr, 0);
}
-static void bfin_gpio_mask_irq(unsigned int irq)
+static void bfin_gpio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_gpio_maska(irq_to_gpio(irq), 0);
}
-static void bfin_gpio_unmask_irq(unsigned int irq)
+static void bfin_gpio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_gpio_maska(irq_to_gpio(irq), 1);
}
-static unsigned int bfin_gpio_irq_startup(unsigned int irq)
+static unsigned int bfin_gpio_irq_startup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 gpionr = irq_to_gpio(irq);
if (__test_and_set_bit(gpionr, gpio_enabled))
bfin_gpio_irq_prepare(gpionr);
- bfin_gpio_unmask_irq(irq);
+ bfin_gpio_unmask_irq(desc);
return 0;
}
-static void bfin_gpio_irq_shutdown(unsigned int irq)
+static void bfin_gpio_irq_shutdown(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 gpionr = irq_to_gpio(irq);
- bfin_gpio_mask_irq(irq);
+ bfin_gpio_mask_irq(desc);
__clear_bit(gpionr, gpio_enabled);
bfin_gpio_irq_free(gpionr);
}
-static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
+static int bfin_gpio_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int ret;
char buf[16];
u32 gpionr = irq_to_gpio(irq);
@@ -660,8 +674,9 @@ static int bfin_gpio_irq_type(unsigned i
}
#ifdef CONFIG_PM
-int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
+int bfin_gpio_set_wake(struct irq_desc *desc, unsigned int state)
{
+ unsigned int irq = desc->irq;
unsigned gpio = irq_to_gpio(irq);
if (state)
@@ -821,9 +836,9 @@ void init_pint_lut(void)
}
}
-static void bfin_gpio_ack_irq(unsigned int irq)
+static void bfin_gpio_ack_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_desc + irq;
+ unsigned int irq = desc->irq;
u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
u32 pintbit = PINT_BIT(pint_val);
u32 bank = PINT_2_BANK(pint_val);
@@ -838,9 +853,9 @@ static void bfin_gpio_ack_irq(unsigned i
}
-static void bfin_gpio_mask_ack_irq(unsigned int irq)
+static void bfin_gpio_mask_ack_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_desc + irq;
+ unsigned int irq = desc->irq;
u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
u32 pintbit = PINT_BIT(pint_val);
u32 bank = PINT_2_BANK(pint_val);
@@ -856,15 +871,17 @@ static void bfin_gpio_mask_ack_irq(unsig
pint[bank]->mask_clear = pintbit;
}
-static void bfin_gpio_mask_irq(unsigned int irq)
+static void bfin_gpio_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
pint[PINT_2_BANK(pint_val)]->mask_clear = PINT_BIT(pint_val);
}
-static void bfin_gpio_unmask_irq(unsigned int irq)
+static void bfin_gpio_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
u32 pintbit = PINT_BIT(pint_val);
u32 bank = PINT_2_BANK(pint_val);
@@ -873,8 +890,9 @@ static void bfin_gpio_unmask_irq(unsigne
pint[bank]->mask_set = pintbit;
}
-static unsigned int bfin_gpio_irq_startup(unsigned int irq)
+static unsigned int bfin_gpio_irq_startup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 gpionr = irq_to_gpio(irq);
u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
@@ -888,22 +906,24 @@ static unsigned int bfin_gpio_irq_startu
if (__test_and_set_bit(gpionr, gpio_enabled))
bfin_gpio_irq_prepare(gpionr);
- bfin_gpio_unmask_irq(irq);
+ bfin_gpio_unmask_irq(desc);
return 0;
}
-static void bfin_gpio_irq_shutdown(unsigned int irq)
+static void bfin_gpio_irq_shutdown(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 gpionr = irq_to_gpio(irq);
- bfin_gpio_mask_irq(irq);
+ bfin_gpio_mask_irq(desc);
__clear_bit(gpionr, gpio_enabled);
bfin_gpio_irq_free(gpionr);
}
-static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
+static int bfin_gpio_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
int ret;
char buf[16];
u32 gpionr = irq_to_gpio(irq);
@@ -965,8 +985,9 @@ static int bfin_gpio_irq_type(unsigned i
u32 pint_saved_masks[NR_PINT_SYS_IRQS];
u32 pint_wakeup_masks[NR_PINT_SYS_IRQS];
-int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
+int bfin_gpio_set_wake(struct irq_desc *desc, unsigned int state)
{
+ unsigned int irq = desc->irq;
u32 pint_irq;
u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
u32 bank = PINT_2_BANK(pint_val);
@@ -989,7 +1010,7 @@ int bfin_gpio_set_wake(unsigned int irq,
return -EINVAL;
}
- bfin_internal_set_wake(pint_irq, state);
+ bfin_internal_set_wake(irq_to_desc(pint_irq), state);
if (state)
pint_wakeup_masks[bank] |= pintbit;
diff -u -p a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c
--- a/arch/cris/arch-v10/kernel/irq.c
+++ b/arch/cris/arch-v10/kernel/irq.c
@@ -104,31 +104,33 @@ static void (*interrupt[NR_IRQS])(void)
IRQ31_interrupt
};
-static void enable_crisv10_irq(unsigned int irq);
+static void enable_crisv10_irq(struct irq_desc *desc);
-static unsigned int startup_crisv10_irq(unsigned int irq)
+static unsigned int startup_crisv10_irq(struct irq_desc *desc)
{
- enable_crisv10_irq(irq);
+ enable_crisv10_irq(desc);
return 0;
}
#define shutdown_crisv10_irq disable_crisv10_irq
-static void enable_crisv10_irq(unsigned int irq)
+static void enable_crisv10_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unmask_irq(irq);
}
-static void disable_crisv10_irq(unsigned int irq)
+static void disable_crisv10_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mask_irq(irq);
}
-static void ack_crisv10_irq(unsigned int irq)
+static void ack_crisv10_irq(struct irq_desc *unused)
{
}
-static void end_crisv10_irq(unsigned int irq)
+static void end_crisv10_irq(struct irq_desc *unused)
{
}
diff -u -p a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
--- a/arch/cris/arch-v32/kernel/irq.c
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -296,37 +296,42 @@ unmask_irq(int irq)
}
-static unsigned int startup_crisv32_irq(unsigned int irq)
+static unsigned int startup_crisv32_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unmask_irq(irq);
return 0;
}
-static void shutdown_crisv32_irq(unsigned int irq)
+static void shutdown_crisv32_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mask_irq(irq);
}
-static void enable_crisv32_irq(unsigned int irq)
+static void enable_crisv32_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unmask_irq(irq);
}
-static void disable_crisv32_irq(unsigned int irq)
+static void disable_crisv32_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mask_irq(irq);
}
-static void ack_crisv32_irq(unsigned int irq)
+static void ack_crisv32_irq(struct irq_desc *unused)
{
}
-static void end_crisv32_irq(unsigned int irq)
+static void end_crisv32_irq(struct irq_desc *unused)
{
}
-int set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
+int set_affinity_crisv32_irq(struct irq_desc *desc, const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
spin_lock_irqsave(&irq_lock, flags);
irq_allocations[irq - FIRST_IRQ].mask = *dest;
diff -u -p a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c
--- a/arch/frv/kernel/irq-mb93091.c
+++ b/arch/frv/kernel/irq-mb93091.c
@@ -36,8 +36,9 @@
/*
* on-motherboard FPGA PIC operations
*/
-static void frv_fpga_mask(unsigned int irq)
+static void frv_fpga_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t imr = __get_IMR();
imr |= 1 << (irq - IRQ_BASE_FPGA);
@@ -45,13 +46,15 @@ static void frv_fpga_mask(unsigned int i
__set_IMR(imr);
}
-static void frv_fpga_ack(unsigned int irq)
+static void frv_fpga_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
}
-static void frv_fpga_mask_ack(unsigned int irq)
+static void frv_fpga_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t imr = __get_IMR();
imr |= 1 << (irq - IRQ_BASE_FPGA);
@@ -60,8 +63,9 @@ static void frv_fpga_mask_ack(unsigned i
__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
}
-static void frv_fpga_unmask(unsigned int irq)
+static void frv_fpga_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t imr = __get_IMR();
imr &= ~(1 << (irq - IRQ_BASE_FPGA));
diff -u -p a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c
--- a/arch/frv/kernel/irq-mb93093.c
+++ b/arch/frv/kernel/irq-mb93093.c
@@ -35,21 +35,24 @@
/*
* off-CPU FPGA PIC operations
*/
-static void frv_fpga_mask(unsigned int irq)
+static void frv_fpga_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t imr = __get_IMR();
imr |= 1 << (irq - IRQ_BASE_FPGA);
__set_IMR(imr);
}
-static void frv_fpga_ack(unsigned int irq)
+static void frv_fpga_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
}
-static void frv_fpga_mask_ack(unsigned int irq)
+static void frv_fpga_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t imr = __get_IMR();
imr |= 1 << (irq - IRQ_BASE_FPGA);
@@ -58,8 +61,9 @@ static void frv_fpga_mask_ack(unsigned i
__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
}
-static void frv_fpga_unmask(unsigned int irq)
+static void frv_fpga_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint16_t imr = __get_IMR();
imr &= ~(1 << (irq - IRQ_BASE_FPGA));
diff -u -p a/arch/frv/kernel/irq-mb93493.c b/arch/frv/kernel/irq-mb93493.c
--- a/arch/frv/kernel/irq-mb93493.c
+++ b/arch/frv/kernel/irq-mb93493.c
@@ -45,8 +45,9 @@
* daughter board PIC operations
* - there is no way to ACK interrupts in the MB93493 chip
*/
-static void frv_mb93493_mask(unsigned int irq)
+static void frv_mb93493_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint32_t iqsr;
volatile void *piqsr;
@@ -60,12 +61,13 @@ static void frv_mb93493_mask(unsigned in
writel(iqsr, piqsr);
}
-static void frv_mb93493_ack(unsigned int irq)
+static void frv_mb93493_ack(struct irq_desc *unused)
{
}
-static void frv_mb93493_unmask(unsigned int irq)
+static void frv_mb93493_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
uint32_t iqsr;
volatile void *piqsr;
diff -u -p a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -96,31 +96,36 @@ int show_interrupts(struct seq_file *p,
/*
* on-CPU PIC operations
*/
-static void frv_cpupic_ack(unsigned int irqlevel)
+static void frv_cpupic_ack(struct irq_desc *desc)
{
+ unsigned int irqlevel = desc->irq;
__clr_RC(irqlevel);
__clr_IRL();
}
-static void frv_cpupic_mask(unsigned int irqlevel)
+static void frv_cpupic_mask(struct irq_desc *desc)
{
+ unsigned int irqlevel = desc->irq;
__set_MASK(irqlevel);
}
-static void frv_cpupic_mask_ack(unsigned int irqlevel)
+static void frv_cpupic_mask_ack(struct irq_desc *desc)
{
+ unsigned int irqlevel = desc->irq;
__set_MASK(irqlevel);
__clr_RC(irqlevel);
__clr_IRL();
}
-static void frv_cpupic_unmask(unsigned int irqlevel)
+static void frv_cpupic_unmask(struct irq_desc *desc)
{
+ unsigned int irqlevel = desc->irq;
__clr_MASK(irqlevel);
}
-static void frv_cpupic_end(unsigned int irqlevel)
+static void frv_cpupic_end(struct irq_desc *desc)
{
+ unsigned int irqlevel = desc->irq;
__clr_MASK(irqlevel);
}
diff -u -p a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -38,32 +38,36 @@ static inline int is_ext_irq(unsigned in
return (irq >= EXT_IRQ0 && irq <= (EXT_IRQ0 + EXT_IRQS));
}
-static void h8300_enable_irq(unsigned int irq)
+static void h8300_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (is_ext_irq(irq))
IER_REGS |= 1 << (irq - EXT_IRQ0);
}
-static void h8300_disable_irq(unsigned int irq)
+static void h8300_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (is_ext_irq(irq))
IER_REGS &= ~(1 << (irq - EXT_IRQ0));
}
-static void h8300_end_irq(unsigned int irq)
+static void h8300_end_irq(struct irq_desc *unused)
{
}
-static unsigned int h8300_startup_irq(unsigned int irq)
+static unsigned int h8300_startup_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (is_ext_irq(irq))
return h8300_enable_irq_pin(irq);
else
return 0;
}
-static void h8300_shutdown_irq(unsigned int irq)
+static void h8300_shutdown_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (is_ext_irq(irq))
h8300_disable_irq_pin(irq);
}
diff -u -p a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c
--- a/arch/ia64/hp/sim/hpsim_irq.c
+++ b/arch/ia64/hp/sim/hpsim_irq.c
@@ -11,18 +11,18 @@
#include <linux/irq.h>
static unsigned int
-hpsim_irq_startup (unsigned int irq)
+hpsim_irq_startup (struct irq_desc *unused)
{
return 0;
}
static void
-hpsim_irq_noop (unsigned int irq)
+hpsim_irq_noop (struct irq_desc *unused)
{
}
static int
-hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b)
+hpsim_set_affinity_noop(struct irq_desc *unused, const struct cpumask *b)
{
return 0;
}
@@ -45,7 +45,7 @@ hpsim_irq_init (void)
int i;
for (i = 0; i < NR_IRQS; ++i) {
- idesc = irq_desc + i;
+ idesc = irq_to_desc(i);
if (idesc->chip == &no_irq_chip)
idesc->chip = &irq_type_hp_sim;
}
diff -u -p a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -294,8 +294,9 @@ kexec_disable_iosapic(void)
#endif
static void
-mask_irq (unsigned int irq)
+mask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 low32;
int rte_index;
struct iosapic_rte_info *rte;
@@ -312,8 +313,9 @@ mask_irq (unsigned int irq)
}
static void
-unmask_irq (unsigned int irq)
+unmask_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 low32;
int rte_index;
struct iosapic_rte_info *rte;
@@ -330,8 +332,9 @@ unmask_irq (unsigned int irq)
static int
-iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
+iosapic_set_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
+unsigned int irq = desc->irq;
#ifdef CONFIG_SMP
u32 high32, low32;
int cpu, dest, rte_index;
@@ -386,23 +389,24 @@ iosapic_set_affinity(unsigned int irq, c
*/
static unsigned int
-iosapic_startup_level_irq (unsigned int irq)
+iosapic_startup_level_irq (struct irq_desc *desc)
{
- unmask_irq(irq);
+ unmask_irq(desc);
return 0;
}
static void
-iosapic_end_level_irq (unsigned int irq)
+iosapic_end_level_irq (struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ia64_vector vec = irq_to_vector(irq);
struct iosapic_rte_info *rte;
int do_unmask_irq = 0;
irq_complete_move(irq);
- if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) {
+ if (unlikely(desc->status & IRQ_MOVE_PENDING)) {
do_unmask_irq = 1;
- mask_irq(irq);
+ mask_irq(desc);
}
list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
@@ -410,7 +414,7 @@ iosapic_end_level_irq (unsigned int irq)
if (unlikely(do_unmask_irq)) {
move_masked_irq(irq);
- unmask_irq(irq);
+ unmask_irq(desc);
}
}
@@ -437,9 +441,9 @@ static struct irq_chip irq_type_iosapic_
*/
static unsigned int
-iosapic_startup_edge_irq (unsigned int irq)
+iosapic_startup_edge_irq (struct irq_desc *desc)
{
- unmask_irq(irq);
+ unmask_irq(desc);
/*
* IOSAPIC simply drops interrupts pended while the
* corresponding pin was masked, so we can't know if an
@@ -449,9 +453,9 @@ iosapic_startup_edge_irq (unsigned int i
}
static void
-iosapic_ack_edge_irq (unsigned int irq)
+iosapic_ack_edge_irq (struct irq_desc *idesc)
{
- struct irq_desc *idesc = irq_desc + irq;
+ unsigned int irq = idesc->irq;
irq_complete_move(irq);
move_native_irq(irq);
@@ -462,7 +466,7 @@ iosapic_ack_edge_irq (unsigned int irq)
*/
if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) ==
(IRQ_PENDING|IRQ_DISABLED))
- mask_irq(irq);
+ mask_irq(idesc);
}
#define iosapic_enable_edge_irq unmask_irq
@@ -648,7 +652,7 @@ register_intr (unsigned int gsi, int irq
irq_type = iosapic_get_irq_chip(trigger);
- idesc = irq_desc + irq;
+ idesc = irq_to_desc(irq);
if (irq_type != NULL && idesc->chip != irq_type) {
if (idesc->chip != &no_irq_chip)
printk(KERN_WARNING
@@ -858,7 +862,7 @@ iosapic_unregister_intr (unsigned int gs
if (--rte->refcnt > 0)
goto out;
- idesc = irq_desc + irq;
+ idesc = irq_to_desc(irq);
rte->refcnt = NO_REF_RTE;
/* Mask the interrupt */
diff -u -p a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -134,7 +134,7 @@ static void migrate_irqs(void)
int irq, new_cpu;
for (irq=0; irq < NR_IRQS; irq++) {
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
if (desc->status == IRQ_DISABLED)
continue;
@@ -162,10 +162,10 @@ static void migrate_irqs(void)
*/
if (desc->chip && desc->chip->disable &&
desc->chip->enable && desc->chip->set_affinity) {
- desc->chip->disable(irq);
- desc->chip->set_affinity(irq,
+ desc->chip->disable(desc);
+ desc->chip->set_affinity(desc,
cpumask_of(new_cpu));
- desc->chip->enable(irq);
+ desc->chip->enable(desc);
} else {
WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
!(desc->chip->enable) ||
diff -u -p a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -342,7 +342,7 @@ static irqreturn_t smp_irq_move_cleanup_
if (irq < 0)
continue;
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
cfg = irq_cfg + irq;
raw_spin_lock(&desc->lock);
if (!cfg->move_cleanup_count)
@@ -634,7 +634,7 @@ ia64_native_register_percpu_irq (ia64_ve
irq = vec;
BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
desc->status |= IRQ_PER_CPU;
desc->chip = &irq_type_ia64_lsapic;
if (action)
diff -u -p a/arch/ia64/kernel/irq_lsapic.c b/arch/ia64/kernel/irq_lsapic.c
--- a/arch/ia64/kernel/irq_lsapic.c
+++ b/arch/ia64/kernel/irq_lsapic.c
@@ -15,19 +15,20 @@
#include <linux/irq.h>
static unsigned int
-lsapic_noop_startup (unsigned int irq)
+lsapic_noop_startup (struct irq_desc *unused)
{
return 0;
}
static void
-lsapic_noop (unsigned int irq)
+lsapic_noop (struct irq_desc *unused)
{
/* nothing to do... */
}
-static int lsapic_retrigger(unsigned int irq)
+static int lsapic_retrigger(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
ia64_resend_irq(irq);
return 1;
diff -u -p a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -2129,7 +2129,7 @@ ia64_mca_late_init(void)
irq = local_vector_to_irq(cpe_vector);
if (irq > 0) {
cpe_poll_enabled = 0;
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
desc->status |= IRQ_PER_CPU;
setup_irq(irq, &mca_cpe_irqaction);
ia64_cpe_irq = irq;
diff -u -p a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -12,9 +12,10 @@
static struct irq_chip ia64_msi_chip;
#ifdef CONFIG_SMP
-static int ia64_set_msi_irq_affinity(unsigned int irq,
+static int ia64_set_msi_irq_affinity(struct irq_desc *desc,
const cpumask_t *cpu_mask)
{
+ unsigned int irq = desc->irq;
struct msi_msg msg;
u32 addr, data;
int cpu = first_cpu(*cpu_mask);
@@ -38,7 +39,7 @@ static int ia64_set_msi_irq_affinity(uns
msg.data = data;
write_msi_msg(irq, &msg);
- cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
+ cpumask_copy(desc->affinity, cpumask_of(cpu));
return 0;
}
@@ -84,15 +85,17 @@ void ia64_teardown_msi_irq(unsigned int
destroy_irq(irq);
}
-static void ia64_ack_msi_irq(unsigned int irq)
+static void ia64_ack_msi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq_complete_move(irq);
move_native_irq(irq);
ia64_eoi();
}
-static int ia64_msi_retrigger_irq(unsigned int irq)
+static int ia64_msi_retrigger_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int vector = irq_to_vector(irq);
ia64_resend_irq(vector);
@@ -132,8 +135,9 @@ void arch_teardown_msi_irq(unsigned int
#ifdef CONFIG_DMAR
#ifdef CONFIG_SMP
-static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
+static int dmar_msi_set_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
+ unsigned int irq = desc->irq;
struct irq_cfg *cfg = irq_cfg + irq;
struct msi_msg msg;
int cpu = cpumask_first(mask);
@@ -152,7 +156,7 @@ static int dmar_msi_set_affinity(unsigne
msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
dmar_msi_write(irq, &msg);
- cpumask_copy(irq_desc[irq].affinity, mask);
+ cpumask_copy(desc->affinity, mask);
return 0;
}
diff -u -p a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -689,16 +689,16 @@ int migrate_platform_irqs(unsigned int c
new_cpei_cpu = any_online_cpu(cpu_online_map);
mask = cpumask_of(new_cpei_cpu);
set_cpei_target_cpu(new_cpei_cpu);
- desc = irq_desc + ia64_cpe_irq;
+ desc = irq_to_desc(ia64_cpe_irq);
/*
* Switch for now, immediately, we need to do fake intr
* as other interrupts, but need to study CPEI behaviour with
* polling before making changes.
*/
if (desc) {
- desc->chip->disable(ia64_cpe_irq);
- desc->chip->set_affinity(ia64_cpe_irq, mask);
- desc->chip->enable(ia64_cpe_irq);
+ desc->chip->disable(desc);
+ desc->chip->set_affinity(desc, mask);
+ desc->chip->enable(desc);
printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
}
}
diff -u -p a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -77,31 +77,34 @@ u64 sn_intr_redirect(nasid_t local_nasid
return ret_stuff.status;
}
-static unsigned int sn_startup_irq(unsigned int irq)
+static unsigned int sn_startup_irq(struct irq_desc *unused)
{
return 0;
}
-static void sn_shutdown_irq(unsigned int irq)
+static void sn_shutdown_irq(struct irq_desc *unused)
{
}
extern void ia64_mca_register_cpev(int);
-static void sn_disable_irq(unsigned int irq)
+static void sn_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
ia64_mca_register_cpev(0);
}
-static void sn_enable_irq(unsigned int irq)
+static void sn_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
ia64_mca_register_cpev(irq);
}
-static void sn_ack_irq(unsigned int irq)
+static void sn_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u64 event_occurred, mask;
irq = irq & 0xff;
@@ -113,8 +116,9 @@ static void sn_ack_irq(unsigned int irq)
move_native_irq(irq);
}
-static void sn_end_irq(unsigned int irq)
+static void sn_end_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int ivec;
u64 event_occurred;
@@ -258,12 +262,12 @@ void sn_set_err_irq_affinity(unsigned in
#endif
static void
-sn_mask_irq(unsigned int irq)
+sn_mask_irq(struct irq_desc *unused)
{
}
static void
-sn_unmask_irq(unsigned int irq)
+sn_unmask_irq(struct irq_desc *unused)
{
}
diff -u -p a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -151,9 +151,10 @@ int sn_setup_msi_irq(struct pci_dev *pde
}
#ifdef CONFIG_SMP
-static int sn_set_msi_irq_affinity(unsigned int irq,
+static int sn_set_msi_irq_affinity(struct irq_desc *desc,
const struct cpumask *cpu_mask)
{
+ unsigned int irq = desc->irq;
struct msi_msg msg;
int slice;
nasid_t nasid;
@@ -205,20 +206,22 @@ static int sn_set_msi_irq_affinity(unsig
msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
write_msi_msg(irq, &msg);
- cpumask_copy(irq_desc[irq].affinity, cpu_mask);
+ cpumask_copy(desc->affinity, cpu_mask);
return 0;
}
#endif /* CONFIG_SMP */
-static void sn_ack_msi_irq(unsigned int irq)
+static void sn_ack_msi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
move_native_irq(irq);
ia64_eoi();
}
-static int sn_msi_retrigger_irq(unsigned int irq)
+static int sn_msi_retrigger_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int vector = irq;
ia64_resend_irq(vector);
diff -u -p a/arch/ia64/xen/irq_xen.c b/arch/ia64/xen/irq_xen.c
--- a/arch/ia64/xen/irq_xen.c
+++ b/arch/ia64/xen/irq_xen.c
@@ -223,7 +223,7 @@ __xen_register_percpu_irq(unsigned int c
* mark the interrupt for migrations and trigger it
* on cpu hotplug.
*/
- desc = irq_desc + irq;
+ desc = irq_to_desc(irq);
desc->status |= IRQ_PER_CPU;
}
}
diff -u -p a/arch/m32r/platforms/m32104ut/setup.c b/arch/m32r/platforms/m32104ut/setup.c
--- a/arch/m32r/platforms/m32104ut/setup.c
+++ b/arch/m32r/platforms/m32104ut/setup.c
@@ -21,8 +21,9 @@
icu_data_t icu_data[NR_IRQS];
-static void disable_m32104ut_irq(unsigned int irq)
+static void disable_m32104ut_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -30,8 +31,9 @@ static void disable_m32104ut_irq(unsigne
outl(data, port);
}
-static void enable_m32104ut_irq(unsigned int irq)
+static void enable_m32104ut_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -39,24 +41,25 @@ static void enable_m32104ut_irq(unsigned
outl(data, port);
}
-static void mask_and_ack_m32104ut(unsigned int irq)
+static void mask_and_ack_m32104ut(struct irq_desc *desc)
{
- disable_m32104ut_irq(irq);
+ disable_m32104ut_irq(desc);
}
-static void end_m32104ut_irq(unsigned int irq)
+static void end_m32104ut_irq(struct irq_desc *desc)
{
- enable_m32104ut_irq(irq);
+ enable_m32104ut_irq(desc);
}
-static unsigned int startup_m32104ut_irq(unsigned int irq)
+static unsigned int startup_m32104ut_irq(struct irq_desc *desc)
{
- enable_m32104ut_irq(irq);
+ enable_m32104ut_irq(desc);
return (0);
}
-static void shutdown_m32104ut_irq(unsigned int irq)
+static void shutdown_m32104ut_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -90,7 +93,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT0].action = 0;
irq_desc[M32R_IRQ_INT0].depth = 1;
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
- disable_m32104ut_irq(M32R_IRQ_INT0);
+ disable_m32104ut_irq(irq_to_desc(M32R_IRQ_INT0));
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
@@ -99,7 +102,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_m32104ut_irq(M32R_IRQ_MFT2);
+ disable_m32104ut_irq(irq_to_desc(M32R_IRQ_MFT2));
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
@@ -108,7 +111,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
- disable_m32104ut_irq(M32R_IRQ_SIO0_R);
+ disable_m32104ut_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -116,7 +119,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
- disable_m32104ut_irq(M32R_IRQ_SIO0_S);
+ disable_m32104ut_irq(irq_to_desc(M32R_IRQ_SIO0_S));
#endif /* CONFIG_SERIAL_M32R_SIO */
}
diff -u -p a/arch/m32r/platforms/m32700ut/setup.c b/arch/m32r/platforms/m32700ut/setup.c
--- a/arch/m32r/platforms/m32700ut/setup.c
+++ b/arch/m32r/platforms/m32700ut/setup.c
@@ -27,8 +27,9 @@
icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
-static void disable_m32700ut_irq(unsigned int irq)
+static void disable_m32700ut_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -36,8 +37,9 @@ static void disable_m32700ut_irq(unsigne
outl(data, port);
}
-static void enable_m32700ut_irq(unsigned int irq)
+static void enable_m32700ut_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -45,24 +47,25 @@ static void enable_m32700ut_irq(unsigned
outl(data, port);
}
-static void mask_and_ack_m32700ut(unsigned int irq)
+static void mask_and_ack_m32700ut(struct irq_desc *desc)
{
- disable_m32700ut_irq(irq);
+ disable_m32700ut_irq(desc);
}
-static void end_m32700ut_irq(unsigned int irq)
+static void end_m32700ut_irq(struct irq_desc *desc)
{
- enable_m32700ut_irq(irq);
+ enable_m32700ut_irq(desc);
}
-static unsigned int startup_m32700ut_irq(unsigned int irq)
+static unsigned int startup_m32700ut_irq(struct irq_desc *desc)
{
- enable_m32700ut_irq(irq);
+ enable_m32700ut_irq(desc);
return (0);
}
-static void shutdown_m32700ut_irq(unsigned int irq)
+static void shutdown_m32700ut_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -93,8 +96,9 @@ typedef struct {
static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
-static void disable_m32700ut_pld_irq(unsigned int irq)
+static void disable_m32700ut_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -105,8 +109,9 @@ static void disable_m32700ut_pld_irq(uns
outw(data, port);
}
-static void enable_m32700ut_pld_irq(unsigned int irq)
+static void enable_m32700ut_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -117,26 +122,27 @@ static void enable_m32700ut_pld_irq(unsi
outw(data, port);
}
-static void mask_and_ack_m32700ut_pld(unsigned int irq)
+static void mask_and_ack_m32700ut_pld(struct irq_desc *desc)
{
- disable_m32700ut_pld_irq(irq);
+ disable_m32700ut_pld_irq(desc);
// mask_and_ack_m32700ut(M32R_IRQ_INT1);
}
-static void end_m32700ut_pld_irq(unsigned int irq)
+static void end_m32700ut_pld_irq(struct irq_desc *desc)
{
- enable_m32700ut_pld_irq(irq);
- end_m32700ut_irq(M32R_IRQ_INT1);
+ enable_m32700ut_pld_irq(desc);
+ end_m32700ut_irq(irq_to_desc(M32R_IRQ_INT1));
}
-static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
+static unsigned int startup_m32700ut_pld_irq(struct irq_desc *desc)
{
- enable_m32700ut_pld_irq(irq);
+ enable_m32700ut_pld_irq(desc);
return (0);
}
-static void shutdown_m32700ut_pld_irq(unsigned int irq)
+static void shutdown_m32700ut_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
unsigned int pldirq;
@@ -166,8 +172,9 @@ static struct irq_chip m32700ut_pld_irq_
static pld_icu_data_t lanpld_icu_data[M32700UT_NUM_LAN_PLD_IRQ];
-static void disable_m32700ut_lanpld_irq(unsigned int irq)
+static void disable_m32700ut_lanpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -177,8 +184,9 @@ static void disable_m32700ut_lanpld_irq(
outw(data, port);
}
-static void enable_m32700ut_lanpld_irq(unsigned int irq)
+static void enable_m32700ut_lanpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -188,25 +196,26 @@ static void enable_m32700ut_lanpld_irq(u
outw(data, port);
}
-static void mask_and_ack_m32700ut_lanpld(unsigned int irq)
+static void mask_and_ack_m32700ut_lanpld(struct irq_desc *desc)
{
- disable_m32700ut_lanpld_irq(irq);
+ disable_m32700ut_lanpld_irq(desc);
}
-static void end_m32700ut_lanpld_irq(unsigned int irq)
+static void end_m32700ut_lanpld_irq(struct irq_desc *desc)
{
- enable_m32700ut_lanpld_irq(irq);
- end_m32700ut_irq(M32R_IRQ_INT0);
+ enable_m32700ut_lanpld_irq(desc);
+ end_m32700ut_irq(irq_to_desc(M32R_IRQ_INT0));
}
-static unsigned int startup_m32700ut_lanpld_irq(unsigned int irq)
+static unsigned int startup_m32700ut_lanpld_irq(struct irq_desc *desc)
{
- enable_m32700ut_lanpld_irq(irq);
+ enable_m32700ut_lanpld_irq(desc);
return (0);
}
-static void shutdown_m32700ut_lanpld_irq(unsigned int irq)
+static void shutdown_m32700ut_lanpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
unsigned int pldirq;
@@ -235,8 +244,9 @@ static struct irq_chip m32700ut_lanpld_i
static pld_icu_data_t lcdpld_icu_data[M32700UT_NUM_LCD_PLD_IRQ];
-static void disable_m32700ut_lcdpld_irq(unsigned int irq)
+static void disable_m32700ut_lcdpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -246,8 +256,9 @@ static void disable_m32700ut_lcdpld_irq(
outw(data, port);
}
-static void enable_m32700ut_lcdpld_irq(unsigned int irq)
+static void enable_m32700ut_lcdpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -257,25 +268,26 @@ static void enable_m32700ut_lcdpld_irq(u
outw(data, port);
}
-static void mask_and_ack_m32700ut_lcdpld(unsigned int irq)
+static void mask_and_ack_m32700ut_lcdpld(struct irq_desc *desc)
{
- disable_m32700ut_lcdpld_irq(irq);
+ disable_m32700ut_lcdpld_irq(desc);
}
-static void end_m32700ut_lcdpld_irq(unsigned int irq)
+static void end_m32700ut_lcdpld_irq(struct irq_desc *desc)
{
- enable_m32700ut_lcdpld_irq(irq);
- end_m32700ut_irq(M32R_IRQ_INT2);
+ enable_m32700ut_lcdpld_irq(desc);
+ end_m32700ut_irq(irq_to_desc(M32R_IRQ_INT2));
}
-static unsigned int startup_m32700ut_lcdpld_irq(unsigned int irq)
+static unsigned int startup_m32700ut_lcdpld_irq(struct irq_desc *desc)
{
- enable_m32700ut_lcdpld_irq(irq);
+ enable_m32700ut_lcdpld_irq(desc);
return (0);
}
-static void shutdown_m32700ut_lcdpld_irq(unsigned int irq)
+static void shutdown_m32700ut_lcdpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
unsigned int pldirq;
@@ -304,7 +316,7 @@ void __init init_IRQ(void)
irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
- disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
+ disable_m32700ut_lanpld_irq(irq_to_desc(M32700UT_LAN_IRQ_LAN));
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
@@ -313,7 +325,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_m32700ut_irq(M32R_IRQ_MFT2);
+ disable_m32700ut_irq(irq_to_desc(M32R_IRQ_MFT2));
/* SIO0 : receive */
irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
@@ -321,7 +333,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO0_R);
+ disable_m32700ut_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0 : send */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -329,7 +341,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO0_S);
+ disable_m32700ut_irq(irq_to_desc(M32R_IRQ_SIO0_S));
/* SIO1 : receive */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
@@ -337,7 +349,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO1_R);
+ disable_m32700ut_irq(irq_to_desc(M32R_IRQ_SIO1_R));
/* SIO1 : send */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
@@ -345,7 +357,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO1_S);
+ disable_m32700ut_irq(irq_to_desc(M32R_IRQ_SIO1_S));
/* DMA1 : */
irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
@@ -353,7 +365,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_DMA1].action = 0;
irq_desc[M32R_IRQ_DMA1].depth = 1;
icu_data[M32R_IRQ_DMA1].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_DMA1);
+ disable_m32700ut_irq(irq_to_desc(M32R_IRQ_DMA1));
#ifdef CONFIG_SERIAL_M32R_PLDSIO
/* INT#1: SIO0 Receive on PLD */
@@ -362,7 +374,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_SIO0_RCV));
/* INT#1: SIO0 Send on PLD */
irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
@@ -370,7 +382,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_SIO0_SND].action = 0;
irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_SIO0_SND));
#endif /* CONFIG_SERIAL_M32R_PLDSIO */
/* INT#1: CFC IREQ on PLD */
@@ -379,7 +391,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFIREQ].action = 0;
irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_CFIREQ));
/* INT#1: CFC Insert on PLD */
irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
@@ -387,7 +399,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_CFC_INSERT));
/* INT#1: CFC Eject on PLD */
irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
@@ -395,21 +407,21 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_CFC_EJECT));
/*
* INT0# is used for LAN, DIO
* We enable it here.
*/
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_m32700ut_irq(M32R_IRQ_INT0);
+ enable_m32700ut_irq(irq_to_desc(M32R_IRQ_INT0));
/*
* INT1# is used for UART, MMC, CF Controller in FPGA.
* We enable it here.
*/
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_m32700ut_irq(M32R_IRQ_INT1);
+ enable_m32700ut_irq(irq_to_desc(M32R_IRQ_INT1));
#if defined(CONFIG_USB)
outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
@@ -419,14 +431,14 @@ void __init init_IRQ(void)
irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
- disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
+ disable_m32700ut_lcdpld_irq(irq_to_desc(M32700UT_LCD_IRQ_USB_INT1));
#endif
/*
* INT2# is used for BAT, USB, AUDIO
* We enable it here.
*/
icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- enable_m32700ut_irq(M32R_IRQ_INT2);
+ enable_m32700ut_irq(irq_to_desc(M32R_IRQ_INT2));
#if defined(CONFIG_VIDEO_M32R_AR)
/*
@@ -437,7 +449,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT3].action = 0;
irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_m32700ut_irq(M32R_IRQ_INT3);
+ disable_m32700ut_irq(irq_to_desc(M32R_IRQ_INT3));
#endif /* CONFIG_VIDEO_M32R_AR */
}
diff -u -p a/arch/m32r/platforms/mappi/setup.c b/arch/m32r/platforms/mappi/setup.c
--- a/arch/m32r/platforms/mappi/setup.c
+++ b/arch/m32r/platforms/mappi/setup.c
@@ -20,8 +20,9 @@
icu_data_t icu_data[NR_IRQS];
-static void disable_mappi_irq(unsigned int irq)
+static void disable_mappi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -29,8 +30,9 @@ static void disable_mappi_irq(unsigned i
outl(data, port);
}
-static void enable_mappi_irq(unsigned int irq)
+static void enable_mappi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -38,25 +40,26 @@ static void enable_mappi_irq(unsigned in
outl(data, port);
}
-static void mask_and_ack_mappi(unsigned int irq)
+static void mask_and_ack_mappi(struct irq_desc *desc)
{
- disable_mappi_irq(irq);
+ disable_mappi_irq(desc);
}
-static void end_mappi_irq(unsigned int irq)
+static void end_mappi_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- enable_mappi_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ enable_mappi_irq(desc);
}
-static unsigned int startup_mappi_irq(unsigned int irq)
+static unsigned int startup_mappi_irq(struct irq_desc *desc)
{
- enable_mappi_irq(irq);
+ enable_mappi_irq(desc);
return (0);
}
-static void shutdown_mappi_irq(unsigned int irq)
+static void shutdown_mappi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -90,7 +93,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT0].action = NULL;
irq_desc[M32R_IRQ_INT0].depth = 1;
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- disable_mappi_irq(M32R_IRQ_INT0);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_INT0));
#endif /* CONFIG_M32R_NE2000 */
/* MFT2 : system timer */
@@ -99,7 +102,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = NULL;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi_irq(M32R_IRQ_MFT2);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_MFT2));
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
@@ -108,7 +111,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = NULL;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_R);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -116,7 +119,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = NULL;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_S);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO0_S));
/* SIO1_R : uart receive data */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
@@ -124,7 +127,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_R].action = NULL;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_R);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO1_R));
/* SIO1_S : uart send data */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
@@ -132,7 +135,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_S].action = NULL;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_S);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO1_S));
#endif /* CONFIG_SERIAL_M32R_SIO */
#if defined(CONFIG_M32R_PCC)
@@ -142,7 +145,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT1].action = NULL;
irq_desc[M32R_IRQ_INT1].depth = 1;
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
- disable_mappi_irq(M32R_IRQ_INT1);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_INT1));
/* INT2 : pccard1 interrupt */
irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
@@ -150,7 +153,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT2].action = NULL;
irq_desc[M32R_IRQ_INT2].depth = 1;
icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
- disable_mappi_irq(M32R_IRQ_INT2);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_INT2));
#endif /* CONFIG_M32RPCC */
}
diff -u -p a/arch/m32r/platforms/mappi2/setup.c b/arch/m32r/platforms/mappi2/setup.c
--- a/arch/m32r/platforms/mappi2/setup.c
+++ b/arch/m32r/platforms/mappi2/setup.c
@@ -20,8 +20,9 @@
icu_data_t icu_data[NR_IRQS];
-static void disable_mappi2_irq(unsigned int irq)
+static void disable_mappi2_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
if ((irq == 0) ||(irq >= NR_IRQS)) {
@@ -33,8 +34,9 @@ static void disable_mappi2_irq(unsigned
outl(data, port);
}
-static void enable_mappi2_irq(unsigned int irq)
+static void enable_mappi2_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
if ((irq == 0) ||(irq >= NR_IRQS)) {
@@ -46,24 +48,25 @@ static void enable_mappi2_irq(unsigned i
outl(data, port);
}
-static void mask_and_ack_mappi2(unsigned int irq)
+static void mask_and_ack_mappi2(struct irq_desc *desc)
{
- disable_mappi2_irq(irq);
+ disable_mappi2_irq(desc);
}
-static void end_mappi2_irq(unsigned int irq)
+static void end_mappi2_irq(struct irq_desc *desc)
{
- enable_mappi2_irq(irq);
+ enable_mappi2_irq(desc);
}
-static unsigned int startup_mappi2_irq(unsigned int irq)
+static unsigned int startup_mappi2_irq(struct irq_desc *desc)
{
- enable_mappi2_irq(irq);
+ enable_mappi2_irq(desc);
return (0);
}
-static void shutdown_mappi2_irq(unsigned int irq)
+static void shutdown_mappi2_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -90,7 +93,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT0].action = 0;
irq_desc[M32R_IRQ_INT0].depth = 1;
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi2_irq(M32R_IRQ_INT0);
+ disable_mappi2_irq(irq_to_desc(M32R_IRQ_INT0));
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
@@ -99,7 +102,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi2_irq(M32R_IRQ_MFT2);
+ disable_mappi2_irq(irq_to_desc(M32R_IRQ_MFT2));
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
@@ -108,7 +111,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO0_R);
+ disable_mappi2_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -116,14 +119,14 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO0_S);
+ disable_mappi2_irq(irq_to_desc(M32R_IRQ_SIO0_S));
/* SIO1_R : uart receive data */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO1_R);
+ disable_mappi2_irq(irq_to_desc(M32R_IRQ_SIO1_R));
/* SIO1_S : uart send data */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
@@ -131,7 +134,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO1_S);
+ disable_mappi2_irq(irq_to_desc(M32R_IRQ_SIO1_S));
#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
#if defined(CONFIG_USB)
@@ -141,7 +144,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT1].action = 0;
irq_desc[M32R_IRQ_INT1].depth = 1;
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
- disable_mappi2_irq(M32R_IRQ_INT1);
+ disable_mappi2_irq(irq_to_desc(M32R_IRQ_INT1));
#endif /* CONFIG_USB */
/* ICUCR40: CFC IREQ */
@@ -150,7 +153,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFIREQ].action = 0;
irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- disable_mappi2_irq(PLD_IRQ_CFIREQ);
+ disable_mappi2_irq(irq_to_desc(PLD_IRQ_CFIREQ));
#if defined(CONFIG_M32R_CFC)
/* ICUCR41: CFC Insert */
@@ -159,7 +162,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
- disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
+ disable_mappi2_irq(irq_to_desc(PLD_IRQ_CFC_INSERT));
/* ICUCR42: CFC Eject */
irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
@@ -167,7 +170,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
+ disable_mappi2_irq(irq_to_desc(PLD_IRQ_CFC_EJECT));
#endif /* CONFIG_MAPPI2_CFC */
}
diff -u -p a/arch/m32r/platforms/mappi3/setup.c b/arch/m32r/platforms/mappi3/setup.c
--- a/arch/m32r/platforms/mappi3/setup.c
+++ b/arch/m32r/platforms/mappi3/setup.c
@@ -20,8 +20,9 @@
icu_data_t icu_data[NR_IRQS];
-static void disable_mappi3_irq(unsigned int irq)
+static void disable_mappi3_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
if ((irq == 0) ||(irq >= NR_IRQS)) {
@@ -33,8 +34,9 @@ static void disable_mappi3_irq(unsigned
outl(data, port);
}
-static void enable_mappi3_irq(unsigned int irq)
+static void enable_mappi3_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
if ((irq == 0) ||(irq >= NR_IRQS)) {
@@ -46,24 +48,25 @@ static void enable_mappi3_irq(unsigned i
outl(data, port);
}
-static void mask_and_ack_mappi3(unsigned int irq)
+static void mask_and_ack_mappi3(struct irq_desc *desc)
{
- disable_mappi3_irq(irq);
+ disable_mappi3_irq(desc);
}
-static void end_mappi3_irq(unsigned int irq)
+static void end_mappi3_irq(struct irq_desc *desc)
{
- enable_mappi3_irq(irq);
+ enable_mappi3_irq(desc);
}
-static unsigned int startup_mappi3_irq(unsigned int irq)
+static unsigned int startup_mappi3_irq(struct irq_desc *desc)
{
- enable_mappi3_irq(irq);
+ enable_mappi3_irq(desc);
return (0);
}
-static void shutdown_mappi3_irq(unsigned int irq)
+static void shutdown_mappi3_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -90,7 +93,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT0].action = 0;
irq_desc[M32R_IRQ_INT0].depth = 1;
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi3_irq(M32R_IRQ_INT0);
+ disable_mappi3_irq(irq_to_desc(M32R_IRQ_INT0));
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
@@ -99,7 +102,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi3_irq(M32R_IRQ_MFT2);
+ disable_mappi3_irq(irq_to_desc(M32R_IRQ_MFT2));
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
@@ -108,7 +111,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO0_R);
+ disable_mappi3_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -116,14 +119,14 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO0_S);
+ disable_mappi3_irq(irq_to_desc(M32R_IRQ_SIO0_S));
/* SIO1_R : uart receive data */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO1_R);
+ disable_mappi3_irq(irq_to_desc(M32R_IRQ_SIO1_R));
/* SIO1_S : uart send data */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
@@ -131,7 +134,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO1_S);
+ disable_mappi3_irq(irq_to_desc(M32R_IRQ_SIO1_S));
#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
#if defined(CONFIG_USB)
@@ -141,7 +144,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT1].action = 0;
irq_desc[M32R_IRQ_INT1].depth = 1;
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
- disable_mappi3_irq(M32R_IRQ_INT1);
+ disable_mappi3_irq(irq_to_desc(M32R_IRQ_INT1));
#endif /* CONFIG_USB */
/* CFC IREQ */
@@ -150,7 +153,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFIREQ].action = 0;
irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- disable_mappi3_irq(PLD_IRQ_CFIREQ);
+ disable_mappi3_irq(irq_to_desc(PLD_IRQ_CFIREQ));
#if defined(CONFIG_M32R_CFC)
/* ICUCR41: CFC Insert & eject */
@@ -159,7 +162,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
- disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
+ disable_mappi3_irq(irq_to_desc(PLD_IRQ_CFC_INSERT));
#endif /* CONFIG_M32R_CFC */
@@ -169,7 +172,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_IDEIREQ].action = 0;
irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi3_irq(PLD_IRQ_IDEIREQ);
+ disable_mappi3_irq(irq_to_desc(PLD_IRQ_IDEIREQ));
}
diff -u -p a/arch/m32r/platforms/oaks32r/setup.c b/arch/m32r/platforms/oaks32r/setup.c
--- a/arch/m32r/platforms/oaks32r/setup.c
+++ b/arch/m32r/platforms/oaks32r/setup.c
@@ -19,8 +19,9 @@
icu_data_t icu_data[NR_IRQS];
-static void disable_oaks32r_irq(unsigned int irq)
+static void disable_oaks32r_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -28,8 +29,9 @@ static void disable_oaks32r_irq(unsigned
outl(data, port);
}
-static void enable_oaks32r_irq(unsigned int irq)
+static void enable_oaks32r_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -37,24 +39,25 @@ static void enable_oaks32r_irq(unsigned
outl(data, port);
}
-static void mask_and_ack_mappi(unsigned int irq)
+static void mask_and_ack_mappi(struct irq_desc *desc)
{
- disable_oaks32r_irq(irq);
+ disable_oaks32r_irq(desc);
}
-static void end_oaks32r_irq(unsigned int irq)
+static void end_oaks32r_irq(struct irq_desc *desc)
{
- enable_oaks32r_irq(irq);
+ enable_oaks32r_irq(desc);
}
-static unsigned int startup_oaks32r_irq(unsigned int irq)
+static unsigned int startup_oaks32r_irq(struct irq_desc *desc)
{
- enable_oaks32r_irq(irq);
+ enable_oaks32r_irq(desc);
return (0);
}
-static void shutdown_oaks32r_irq(unsigned int irq)
+static void shutdown_oaks32r_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -88,7 +91,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT3].action = 0;
irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_oaks32r_irq(M32R_IRQ_INT3);
+ disable_oaks32r_irq(irq_to_desc(M32R_IRQ_INT3));
#endif /* CONFIG_M32R_NE2000 */
/* MFT2 : system timer */
@@ -97,7 +100,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_oaks32r_irq(M32R_IRQ_MFT2);
+ disable_oaks32r_irq(irq_to_desc(M32R_IRQ_MFT2));
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
@@ -106,7 +109,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO0_R);
+ disable_oaks32r_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -114,7 +117,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO0_S);
+ disable_oaks32r_irq(irq_to_desc(M32R_IRQ_SIO0_S));
/* SIO1_R : uart receive data */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
@@ -122,7 +125,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO1_R);
+ disable_oaks32r_irq(irq_to_desc(M32R_IRQ_SIO1_R));
/* SIO1_S : uart send data */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
@@ -130,6 +133,6 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO1_S);
+ disable_oaks32r_irq(irq_to_desc(M32R_IRQ_SIO1_S));
#endif /* CONFIG_SERIAL_M32R_SIO */
}
diff -u -p a/arch/m32r/platforms/opsput/setup.c b/arch/m32r/platforms/opsput/setup.c
--- a/arch/m32r/platforms/opsput/setup.c
+++ b/arch/m32r/platforms/opsput/setup.c
@@ -28,8 +28,9 @@
icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ];
-static void disable_opsput_irq(unsigned int irq)
+static void disable_opsput_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -37,8 +38,9 @@ static void disable_opsput_irq(unsigned
outl(data, port);
}
-static void enable_opsput_irq(unsigned int irq)
+static void enable_opsput_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -46,24 +48,25 @@ static void enable_opsput_irq(unsigned i
outl(data, port);
}
-static void mask_and_ack_opsput(unsigned int irq)
+static void mask_and_ack_opsput(struct irq_desc *desc)
{
- disable_opsput_irq(irq);
+ disable_opsput_irq(desc);
}
-static void end_opsput_irq(unsigned int irq)
+static void end_opsput_irq(struct irq_desc *desc)
{
- enable_opsput_irq(irq);
+ enable_opsput_irq(desc);
}
-static unsigned int startup_opsput_irq(unsigned int irq)
+static unsigned int startup_opsput_irq(struct irq_desc *desc)
{
- enable_opsput_irq(irq);
+ enable_opsput_irq(desc);
return (0);
}
-static void shutdown_opsput_irq(unsigned int irq)
+static void shutdown_opsput_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -94,8 +97,9 @@ typedef struct {
static pld_icu_data_t pld_icu_data[OPSPUT_NUM_PLD_IRQ];
-static void disable_opsput_pld_irq(unsigned int irq)
+static void disable_opsput_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -106,8 +110,9 @@ static void disable_opsput_pld_irq(unsig
outw(data, port);
}
-static void enable_opsput_pld_irq(unsigned int irq)
+static void enable_opsput_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -118,26 +123,27 @@ static void enable_opsput_pld_irq(unsign
outw(data, port);
}
-static void mask_and_ack_opsput_pld(unsigned int irq)
+static void mask_and_ack_opsput_pld(struct irq_desc *desc)
{
- disable_opsput_pld_irq(irq);
+ disable_opsput_pld_irq(desc);
// mask_and_ack_opsput(M32R_IRQ_INT1);
}
-static void end_opsput_pld_irq(unsigned int irq)
+static void end_opsput_pld_irq(struct irq_desc *desc)
{
- enable_opsput_pld_irq(irq);
- end_opsput_irq(M32R_IRQ_INT1);
+ enable_opsput_pld_irq(desc);
+ end_opsput_irq(irq_to_desc(M32R_IRQ_INT1));
}
-static unsigned int startup_opsput_pld_irq(unsigned int irq)
+static unsigned int startup_opsput_pld_irq(struct irq_desc *desc)
{
- enable_opsput_pld_irq(irq);
+ enable_opsput_pld_irq(desc);
return (0);
}
-static void shutdown_opsput_pld_irq(unsigned int irq)
+static void shutdown_opsput_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
unsigned int pldirq;
@@ -167,8 +173,9 @@ static struct irq_chip opsput_pld_irq_ty
static pld_icu_data_t lanpld_icu_data[OPSPUT_NUM_LAN_PLD_IRQ];
-static void disable_opsput_lanpld_irq(unsigned int irq)
+static void disable_opsput_lanpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -178,8 +185,9 @@ static void disable_opsput_lanpld_irq(un
outw(data, port);
}
-static void enable_opsput_lanpld_irq(unsigned int irq)
+static void enable_opsput_lanpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -189,25 +197,26 @@ static void enable_opsput_lanpld_irq(uns
outw(data, port);
}
-static void mask_and_ack_opsput_lanpld(unsigned int irq)
+static void mask_and_ack_opsput_lanpld(struct irq_desc *desc)
{
- disable_opsput_lanpld_irq(irq);
+ disable_opsput_lanpld_irq(desc);
}
-static void end_opsput_lanpld_irq(unsigned int irq)
+static void end_opsput_lanpld_irq(struct irq_desc *desc)
{
- enable_opsput_lanpld_irq(irq);
- end_opsput_irq(M32R_IRQ_INT0);
+ enable_opsput_lanpld_irq(desc);
+ end_opsput_irq(irq_to_desc(M32R_IRQ_INT0));
}
-static unsigned int startup_opsput_lanpld_irq(unsigned int irq)
+static unsigned int startup_opsput_lanpld_irq(struct irq_desc *desc)
{
- enable_opsput_lanpld_irq(irq);
+ enable_opsput_lanpld_irq(desc);
return (0);
}
-static void shutdown_opsput_lanpld_irq(unsigned int irq)
+static void shutdown_opsput_lanpld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
unsigned int pldirq;
@@ -266,7 +275,7 @@ static void mask_and_ack_opsput_lcdpld(u
static void end_opsput_lcdpld_irq(unsigned int irq)
{
enable_opsput_lcdpld_irq(irq);
- end_opsput_irq(M32R_IRQ_INT2);
+ end_opsput_irq(irq_to_desc(M32R_IRQ_INT2));
}
static unsigned int startup_opsput_lcdpld_irq(unsigned int irq)
@@ -305,7 +314,7 @@ void __init init_IRQ(void)
irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
- disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
+ disable_opsput_lanpld_irq(irq_to_desc(OPSPUT_LAN_IRQ_LAN));
#endif /* CONFIG_SMC91X */
/* MFT2 : system timer */
@@ -314,7 +323,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_opsput_irq(M32R_IRQ_MFT2);
+ disable_opsput_irq(irq_to_desc(M32R_IRQ_MFT2));
/* SIO0 : receive */
irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
@@ -322,7 +331,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO0_R);
+ disable_opsput_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0 : send */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -330,7 +339,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO0_S);
+ disable_opsput_irq(irq_to_desc(M32R_IRQ_SIO0_S));
/* SIO1 : receive */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
@@ -338,7 +347,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO1_R);
+ disable_opsput_irq(irq_to_desc(M32R_IRQ_SIO1_R));
/* SIO1 : send */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
@@ -346,7 +355,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO1_S);
+ disable_opsput_irq(irq_to_desc(M32R_IRQ_SIO1_S));
/* DMA1 : */
irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
@@ -354,7 +363,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_DMA1].action = 0;
irq_desc[M32R_IRQ_DMA1].depth = 1;
icu_data[M32R_IRQ_DMA1].icucr = 0;
- disable_opsput_irq(M32R_IRQ_DMA1);
+ disable_opsput_irq(irq_to_desc(M32R_IRQ_DMA1));
#ifdef CONFIG_SERIAL_M32R_PLDSIO
/* INT#1: SIO0 Receive on PLD */
@@ -363,7 +372,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
+ disable_opsput_pld_irq(irq_to_desc(PLD_IRQ_SIO0_RCV));
/* INT#1: SIO0 Send on PLD */
irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
@@ -371,7 +380,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_SIO0_SND].action = 0;
irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
+ disable_opsput_pld_irq(irq_to_desc(PLD_IRQ_SIO0_SND));
#endif /* CONFIG_SERIAL_M32R_PLDSIO */
/* INT#1: CFC IREQ on PLD */
@@ -380,7 +389,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFIREQ].action = 0;
irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
+ disable_opsput_pld_irq(irq_to_desc(PLD_IRQ_CFIREQ));
/* INT#1: CFC Insert on PLD */
irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
@@ -388,7 +397,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
- disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
+ disable_opsput_pld_irq(irq_to_desc(PLD_IRQ_CFC_INSERT));
/* INT#1: CFC Eject on PLD */
irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
@@ -396,21 +405,21 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
- disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
+ disable_opsput_pld_irq(irq_to_desc(PLD_IRQ_CFC_EJECT));
/*
* INT0# is used for LAN, DIO
* We enable it here.
*/
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_opsput_irq(M32R_IRQ_INT0);
+ enable_opsput_irq(irq_to_desc(M32R_IRQ_INT0));
/*
* INT1# is used for UART, MMC, CF Controller in FPGA.
* We enable it here.
*/
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_opsput_irq(M32R_IRQ_INT1);
+ enable_opsput_irq(irq_to_desc(M32R_IRQ_INT1));
#if defined(CONFIG_USB)
outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
@@ -427,7 +436,7 @@ void __init init_IRQ(void)
* We enable it here.
*/
icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- enable_opsput_irq(M32R_IRQ_INT2);
+ enable_opsput_irq(irq_to_desc(M32R_IRQ_INT2));
#if defined(CONFIG_VIDEO_M32R_AR)
/*
@@ -438,7 +447,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_INT3].action = 0;
irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_opsput_irq(M32R_IRQ_INT3);
+ disable_opsput_irq(irq_to_desc(M32R_IRQ_INT3));
#endif /* CONFIG_VIDEO_M32R_AR */
}
diff -u -p a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c
--- a/arch/m32r/platforms/usrv/setup.c
+++ b/arch/m32r/platforms/usrv/setup.c
@@ -19,8 +19,9 @@
icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
-static void disable_mappi_irq(unsigned int irq)
+static void disable_mappi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -28,8 +29,9 @@ static void disable_mappi_irq(unsigned i
outl(data, port);
}
-static void enable_mappi_irq(unsigned int irq)
+static void enable_mappi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
port = irq2port(irq);
@@ -37,24 +39,25 @@ static void enable_mappi_irq(unsigned in
outl(data, port);
}
-static void mask_and_ack_mappi(unsigned int irq)
+static void mask_and_ack_mappi(struct irq_desc *desc)
{
- disable_mappi_irq(irq);
+ disable_mappi_irq(desc);
}
-static void end_mappi_irq(unsigned int irq)
+static void end_mappi_irq(struct irq_desc *desc)
{
- enable_mappi_irq(irq);
+ enable_mappi_irq(desc);
}
-static unsigned int startup_mappi_irq(unsigned int irq)
+static unsigned int startup_mappi_irq(struct irq_desc *desc)
{
- enable_mappi_irq(irq);
+ enable_mappi_irq(desc);
return 0;
}
-static void shutdown_mappi_irq(unsigned int irq)
+static void shutdown_mappi_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
port = irq2port(irq);
@@ -85,8 +88,9 @@ typedef struct {
static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
-static void disable_m32700ut_pld_irq(unsigned int irq)
+static void disable_m32700ut_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -96,8 +100,9 @@ static void disable_m32700ut_pld_irq(uns
outw(data, port);
}
-static void enable_m32700ut_pld_irq(unsigned int irq)
+static void enable_m32700ut_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port, data;
unsigned int pldirq;
@@ -107,25 +112,26 @@ static void enable_m32700ut_pld_irq(unsi
outw(data, port);
}
-static void mask_and_ack_m32700ut_pld(unsigned int irq)
+static void mask_and_ack_m32700ut_pld(struct irq_desc *desc)
{
- disable_m32700ut_pld_irq(irq);
+ disable_m32700ut_pld_irq(desc);
}
-static void end_m32700ut_pld_irq(unsigned int irq)
+static void end_m32700ut_pld_irq(struct irq_desc *desc)
{
- enable_m32700ut_pld_irq(irq);
- end_mappi_irq(M32R_IRQ_INT1);
+ enable_m32700ut_pld_irq(desc);
+ end_mappi_irq(irq_to_desc(M32R_IRQ_INT1));
}
-static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
+static unsigned int startup_m32700ut_pld_irq(struct irq_desc *desc)
{
- enable_m32700ut_pld_irq(irq);
+ enable_m32700ut_pld_irq(desc);
return 0;
}
-static void shutdown_m32700ut_pld_irq(unsigned int irq)
+static void shutdown_m32700ut_pld_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long port;
unsigned int pldirq;
@@ -161,7 +167,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi_irq(M32R_IRQ_MFT2);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_MFT2));
#if defined(CONFIG_SERIAL_M32R_SIO)
/* SIO0_R : uart receive data */
@@ -170,7 +176,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_R);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO0_R));
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
@@ -178,7 +184,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_S);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO0_S));
/* SIO1_R : uart receive data */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
@@ -186,7 +192,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_R);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO1_R));
/* SIO1_S : uart send data */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
@@ -194,7 +200,7 @@ void __init init_IRQ(void)
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_S);
+ disable_mappi_irq(irq_to_desc(M32R_IRQ_SIO1_S));
#endif /* CONFIG_SERIAL_M32R_SIO */
/* INT#67-#71: CFC#0 IREQ on PLD */
@@ -205,7 +211,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
= PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_CF0 + i));
}
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
@@ -216,7 +222,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
= PLD_ICUCR_ISMOD03; /* 'H' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_UART0);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_UART0));
/* INT#77: 16552D#1 IREQ on PLD */
irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
@@ -225,7 +231,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
= PLD_ICUCR_ISMOD03; /* 'H' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_UART1);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_UART1));
#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
@@ -236,7 +242,7 @@ void __init init_IRQ(void)
irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */
pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
= PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_SNDINT);
+ disable_m32700ut_pld_irq(irq_to_desc(PLD_IRQ_SNDINT));
#endif /* CONFIG_IDC_AK4524 || CONFIG_IDC_AK4524_MODULE */
/*
@@ -244,5 +250,5 @@ void __init init_IRQ(void)
* We enable it here.
*/
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD11;
- enable_mappi_irq(M32R_IRQ_INT1);
+ enable_mappi_irq(irq_to_desc(M32R_IRQ_INT1));
}
diff -u -p a/arch/m68knommu/platform/5249/intc2.c b/arch/m68knommu/platform/5249/intc2.c
--- a/arch/m68knommu/platform/5249/intc2.c
+++ b/arch/m68knommu/platform/5249/intc2.c
@@ -17,24 +17,27 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
-static void intc2_irq_gpio_mask(unsigned int irq)
+static void intc2_irq_gpio_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 imr;
imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
imr &= ~(0x1 << (irq - MCFINTC2_GPIOIRQ0));
writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
}
-static void intc2_irq_gpio_unmask(unsigned int irq)
+static void intc2_irq_gpio_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 imr;
imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
imr |= (0x1 << (irq - MCFINTC2_GPIOIRQ0));
writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
}
-static void intc2_irq_gpio_ack(unsigned int irq)
+static void intc2_irq_gpio_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(0x1 << (irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR);
}
diff -u -p a/arch/m68knommu/platform/5272/intc.c b/arch/m68knommu/platform/5272/intc.c
--- a/arch/m68knommu/platform/5272/intc.c
+++ b/arch/m68knommu/platform/5272/intc.c
@@ -68,8 +68,9 @@ static struct irqmap intc_irqmap[MCFINT_
/*MCF_IRQ_SWTO*/ { .icr = MCFSIM_ICR4, .index = 16, .ack = 0, },
};
-static void intc_irq_mask(unsigned int irq)
+static void intc_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
u32 v;
irq -= MCFINT_VECBASE;
@@ -78,8 +79,9 @@ static void intc_irq_mask(unsigned int i
}
}
-static void intc_irq_unmask(unsigned int irq)
+static void intc_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
u32 v;
irq -= MCFINT_VECBASE;
@@ -88,8 +90,9 @@ static void intc_irq_unmask(unsigned int
}
}
-static void intc_irq_ack(unsigned int irq)
+static void intc_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* Only external interrupts are acked */
if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
irq -= MCFINT_VECBASE;
@@ -101,8 +104,9 @@ static void intc_irq_ack(unsigned int ir
}
}
-static int intc_irq_set_type(unsigned int irq, unsigned int type)
+static int intc_irq_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
/* set the edge type for external interrupts */
u32 pitr;
diff -u -p a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -135,13 +135,15 @@ void process_int(int vec, struct pt_regs
}
}
-static void intc_irq_unmask(unsigned int irq)
+static void intc_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
IMR &= ~(1<<irq);
}
-static void intc_irq_mask(unsigned int irq)
+static void intc_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
IMR |= (1<<irq);
}
diff -u -p a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68knommu/platform/68360/ints.c
@@ -37,18 +37,21 @@ extern void *_ramvec[];
/* The number of spurious interrupts */
volatile unsigned int num_spurious;
-static void intc_irq_unmask(unsigned int irq)
+static void intc_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pquicc->intr_cimr |= (1 << irq);
}
-static void intc_irq_mask(unsigned int irq)
+static void intc_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pquicc->intr_cimr &= ~(1 << irq);
}
-static void intc_irq_ack(unsigned int irq)
+static void intc_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pquicc->intr_cisr = (1 << irq);
}
diff -u -p a/arch/m68knommu/platform/coldfire/intc-2.c b/arch/m68knommu/platform/coldfire/intc-2.c
--- a/arch/m68knommu/platform/coldfire/intc-2.c
+++ b/arch/m68knommu/platform/coldfire/intc-2.c
@@ -25,8 +25,9 @@
*/
static u8 intc_intpri = 0x36;
-static void intc_irq_mask(unsigned int irq)
+static void intc_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 128)) {
unsigned long imraddr;
u32 val, imrbit;
@@ -51,8 +52,9 @@ static void intc_irq_mask(unsigned int i
}
}
-static void intc_irq_unmask(unsigned int irq)
+static void intc_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 128)) {
unsigned long intaddr, imraddr, icraddr;
u32 val, imrbit;
@@ -85,8 +87,9 @@ static void intc_irq_unmask(unsigned int
}
}
-static void intc_irq_ack(unsigned int irq)
+static void intc_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* only on eport */
if (irq >= MCFGPIO_IRQ_VECBASE ||
irq < (MCFGPIO_IRQ_VECBASE + MCFGPIO_IRQ_MAX)) {
@@ -96,8 +99,9 @@ static void intc_irq_ack(unsigned int ir
}
}
-static int intc_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int intc_irq_set_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
unsigned shift;
u16 eppar;
diff -u -p a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c
--- a/arch/m68knommu/platform/coldfire/intc-simr.c
+++ b/arch/m68knommu/platform/coldfire/intc-simr.c
@@ -18,8 +18,9 @@
#include <asm/mcfsim.h>
#include <asm/traps.h>
-static void intc_irq_mask(unsigned int irq)
+static void intc_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq >= MCFINT_VECBASE) {
if (irq < MCFINT_VECBASE + 64)
__raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
@@ -37,8 +38,9 @@ static void intc_irq_mask(unsigned int i
}
}
-static void intc_irq_unmask(unsigned int irq)
+static void intc_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq >= MCFINT_VECBASE) {
if (irq < MCFINT_VECBASE + 64)
__raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
@@ -56,8 +58,9 @@ static void intc_irq_unmask(unsigned int
}
}
-static void intc_irq_ack(unsigned int irq)
+static void intc_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* only on eport */
if (irq >= MCFGPIO_IRQ_VECBASE ||
irq < (MCFGPIO_IRQ_VECBASE + MCFGPIO_IRQ_MAX)) {
@@ -67,8 +70,9 @@ static void intc_irq_ack(unsigned int ir
}
}
-static int intc_irq_set_type(unsigned int irq, unsigned int type)
+static int intc_irq_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
unsigned shift;
u16 eppar;
@@ -132,7 +136,7 @@ void __init init_IRQ(void)
for (irq = 0; (irq < NR_IRQS); irq++) {
set_irq_chip_and_handler(irq, &intc_irq_chip, handle_level_irq);
- intc_irq_set_type(irq, 0);
+ intc_irq_set_type(irq_to_desc(irq), 0);
}
}
diff -u -p a/arch/m68knommu/platform/coldfire/intc.c b/arch/m68knommu/platform/coldfire/intc.c
--- a/arch/m68knommu/platform/coldfire/intc.c
+++ b/arch/m68knommu/platform/coldfire/intc.c
@@ -111,8 +111,9 @@ void mcf_autovector(int irq)
#endif
}
-static void intc_irq_mask(unsigned int irq)
+static void intc_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (mcf_irq2imr[irq])
mcf_setimr(mcf_irq2imr[irq]);
@@ -145,8 +146,9 @@ static void intc_irq_unmask(unsigned int
#endif
}
-static void intc_irq_ack(unsigned int irq)
+static void intc_irq_ack(struct irq_desc *desc)
{
+unsigned int irq = desc->irq;
#if defined MCFINTC2_GPIOIRQ0
if (irq >= MCFINTC2_GPIOIRQ0 && irq <= MCFINTC2_GPIOIRQ7) {
u32 gpiointclear = __raw_readl(MCFSIM2_GPIOINTCLEAR);
@@ -157,8 +159,9 @@ static void intc_irq_ack(unsigned int ir
#endif
}
-static int intc_irq_set_type(unsigned int irq, unsigned int type)
+static int intc_irq_set_type(struct irq_desc *desc, unsigned int type)
{
+unsigned int irq = desc->irq;
#if defined MCFINTC2_GPIOIRQ0
u32 gpiointenable;
@@ -198,7 +201,7 @@ void __init init_IRQ(void)
for (irq = 0; (irq < NR_IRQS); irq++) {
set_irq_chip_and_handler(irq, &intc_irq_chip, handle_level_irq);
- intc_irq_set_type(irq, 0);
+ intc_irq_set_type(irq_to_desc(irq), 0);
}
}
diff -u -p a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -40,8 +40,9 @@ unsigned int nr_irq;
#define MER_ME (1<<0)
#define MER_HIE (1<<1)
-static void intc_enable_or_unmask(unsigned int irq)
+static void intc_enable_or_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask = 1 << irq;
pr_debug("enable_or_unmask: %d\n", irq);
out_be32(INTC_BASE + SIE, mask);
@@ -50,38 +51,42 @@ static void intc_enable_or_unmask(unsign
* ack function since the handle_level_irq function
* acks the irq before calling the interrupt handler
*/
- if (irq_desc[irq].status & IRQ_LEVEL)
+ if (desc->status & IRQ_LEVEL)
out_be32(INTC_BASE + IAR, mask);
}
-static void intc_disable_or_mask(unsigned int irq)
+static void intc_disable_or_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pr_debug("disable: %d\n", irq);
out_be32(INTC_BASE + CIE, 1 << irq);
}
-static void intc_ack(unsigned int irq)
+static void intc_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pr_debug("ack: %d\n", irq);
out_be32(INTC_BASE + IAR, 1 << irq);
}
-static void intc_mask_ack(unsigned int irq)
+static void intc_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask = 1 << irq;
pr_debug("disable_and_ack: %d\n", irq);
out_be32(INTC_BASE + CIE, mask);
out_be32(INTC_BASE + IAR, mask);
}
-static void intc_end(unsigned int irq)
+static void intc_end(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask = 1 << irq;
pr_debug("end: %d\n", irq);
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
out_be32(INTC_BASE + SIE, mask);
/* ack level sensitive intr */
- if (irq_desc[irq].status & IRQ_LEVEL)
+ if (desc->status & IRQ_LEVEL)
out_be32(INTC_BASE + IAR, mask);
}
}
diff -u -p a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c
--- a/arch/mips/alchemy/common/irq.c
+++ b/arch/mips/alchemy/common/irq.c
@@ -37,7 +37,7 @@
#include <asm/mach-pb1x00/pb1000.h>
#endif
-static int au1x_ic_settype(unsigned int irq, unsigned int flow_type);
+static int au1x_ic_settype(struct irq_desc *desc, unsigned int flow_type);
/* NOTE on interrupt priorities: The original writers of this code said:
*
@@ -300,16 +300,18 @@ void restore_au1xxx_intctl(void)
#endif /* CONFIG_PM */
-static void au1x_ic0_unmask(unsigned int irq_nr)
+static void au1x_ic0_unmask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
au_writel(1 << bit, IC0_MASKSET);
au_writel(1 << bit, IC0_WAKESET);
au_sync();
}
-static void au1x_ic1_unmask(unsigned int irq_nr)
+static void au1x_ic1_unmask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
au_writel(1 << bit, IC1_MASKSET);
au_writel(1 << bit, IC1_WAKESET);
@@ -324,24 +326,27 @@ static void au1x_ic1_unmask(unsigned int
au_sync();
}
-static void au1x_ic0_mask(unsigned int irq_nr)
+static void au1x_ic0_mask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
au_writel(1 << bit, IC0_MASKCLR);
au_writel(1 << bit, IC0_WAKECLR);
au_sync();
}
-static void au1x_ic1_mask(unsigned int irq_nr)
+static void au1x_ic1_mask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
au_writel(1 << bit, IC1_MASKCLR);
au_writel(1 << bit, IC1_WAKECLR);
au_sync();
}
-static void au1x_ic0_ack(unsigned int irq_nr)
+static void au1x_ic0_ack(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
/*
@@ -353,8 +358,9 @@ static void au1x_ic0_ack(unsigned int ir
au_sync();
}
-static void au1x_ic1_ack(unsigned int irq_nr)
+static void au1x_ic1_ack(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
/*
@@ -366,8 +372,9 @@ static void au1x_ic1_ack(unsigned int ir
au_sync();
}
-static void au1x_ic0_maskack(unsigned int irq_nr)
+static void au1x_ic0_maskack(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
au_writel(1 << bit, IC0_WAKECLR);
@@ -377,8 +384,9 @@ static void au1x_ic0_maskack(unsigned in
au_sync();
}
-static void au1x_ic1_maskack(unsigned int irq_nr)
+static void au1x_ic1_maskack(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE;
au_writel(1 << bit, IC1_WAKECLR);
@@ -388,8 +396,9 @@ static void au1x_ic1_maskack(unsigned in
au_sync();
}
-static int au1x_ic1_setwake(unsigned int irq, unsigned int on)
+static int au1x_ic1_setwake(struct irq_desc *desc, unsigned int on)
{
+ unsigned int irq = desc->irq;
int bit = irq - AU1000_INTC1_INT_BASE;
unsigned long wakemsk, flags;
@@ -435,8 +444,9 @@ static struct irq_chip au1x_ic1_chip = {
.set_wake = au1x_ic1_setwake,
};
-static int au1x_ic_settype(unsigned int irq, unsigned int flow_type)
+static int au1x_ic_settype(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
struct irq_chip *chip;
unsigned long icr[6];
unsigned int bit, ic;
@@ -586,11 +596,11 @@ static void __init au1000_init_irq(struc
*/
for (i = AU1000_INTC0_INT_BASE;
(i < AU1000_INTC0_INT_BASE + 32); i++)
- au1x_ic_settype(i, IRQ_TYPE_NONE);
+ au1x_ic_settype(irq_to_desc(i), IRQ_TYPE_NONE);
for (i = AU1000_INTC1_INT_BASE;
(i < AU1000_INTC1_INT_BASE + 32); i++)
- au1x_ic_settype(i, IRQ_TYPE_NONE);
+ au1x_ic_settype(irq_to_desc(i), IRQ_TYPE_NONE);
/*
* Initialize IC0, which is fixed per processor.
@@ -608,7 +618,7 @@ static void __init au1000_init_irq(struc
au_writel(1 << bit, IC0_ASSIGNSET);
}
- au1x_ic_settype(irq_nr, map->im_type);
+ au1x_ic_settype(irq_to_desc(irq_nr), map->im_type);
++map;
}
diff -u -p a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c
--- a/arch/mips/alchemy/devboards/bcsr.c
+++ b/arch/mips/alchemy/devboards/bcsr.c
@@ -96,16 +96,18 @@ static void bcsr_csc_handler(unsigned in
* CPLD generates tons of spurious interrupts (at least on my DB1200).
* -- mlau
*/
-static void bcsr_irq_mask(unsigned int irq_nr)
+static void bcsr_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned short v = 1 << (irq_nr - bcsr_csc_base);
__raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
__raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
wmb();
}
-static void bcsr_irq_maskack(unsigned int irq_nr)
+static void bcsr_irq_maskack(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned short v = 1 << (irq_nr - bcsr_csc_base);
__raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
__raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
@@ -113,8 +115,9 @@ static void bcsr_irq_maskack(unsigned in
wmb();
}
-static void bcsr_irq_unmask(unsigned int irq_nr)
+static void bcsr_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned short v = 1 << (irq_nr - bcsr_csc_base);
__raw_writew(v, bcsr_virt + BCSR_REG_INTSET);
__raw_writew(v, bcsr_virt + BCSR_REG_MASKSET);
diff -u -p a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c
--- a/arch/mips/ar7/irq.c
+++ b/arch/mips/ar7/irq.c
@@ -48,36 +48,42 @@
static int ar7_irq_base;
-static void ar7_unmask_irq(unsigned int irq)
+static void ar7_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << ((irq - ar7_irq_base) % 32),
REG(ESR_OFFSET(irq - ar7_irq_base)));
}
-static void ar7_mask_irq(unsigned int irq)
+static void ar7_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << ((irq - ar7_irq_base) % 32),
REG(ECR_OFFSET(irq - ar7_irq_base)));
}
-static void ar7_ack_irq(unsigned int irq)
+static void ar7_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << ((irq - ar7_irq_base) % 32),
REG(CR_OFFSET(irq - ar7_irq_base)));
}
-static void ar7_unmask_sec_irq(unsigned int irq)
+static void ar7_unmask_sec_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET));
}
-static void ar7_mask_sec_irq(unsigned int irq)
+static void ar7_mask_sec_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET));
}
-static void ar7_ack_sec_irq(unsigned int irq)
+static void ar7_ack_sec_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writel(1 << (irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET));
}
diff -u -p a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -75,8 +75,9 @@ asmlinkage void plat_irq_dispatch(void)
* internal IRQs operations: only mask/unmask on PERF irq mask
* register.
*/
-static inline void bcm63xx_internal_irq_mask(unsigned int irq)
+static inline void bcm63xx_internal_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask;
irq -= IRQ_INTERNAL_BASE;
@@ -85,8 +86,9 @@ static inline void bcm63xx_internal_irq_
bcm_perf_writel(mask, PERF_IRQMASK_REG);
}
-static void bcm63xx_internal_irq_unmask(unsigned int irq)
+static void bcm63xx_internal_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask;
irq -= IRQ_INTERNAL_BASE;
@@ -95,9 +97,9 @@ static void bcm63xx_internal_irq_unmask(
bcm_perf_writel(mask, PERF_IRQMASK_REG);
}
-static unsigned int bcm63xx_internal_irq_startup(unsigned int irq)
+static unsigned int bcm63xx_internal_irq_startup(struct irq_desc *desc)
{
- bcm63xx_internal_irq_unmask(irq);
+ bcm63xx_internal_irq_unmask(desc);
return 0;
}
@@ -105,8 +107,9 @@ static unsigned int bcm63xx_internal_irq
* external IRQs operations: mask/unmask and clear on PERF external
* irq control register.
*/
-static void bcm63xx_external_irq_mask(unsigned int irq)
+static void bcm63xx_external_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= IRQ_EXT_BASE;
@@ -115,8 +118,9 @@ static void bcm63xx_external_irq_mask(un
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
}
-static void bcm63xx_external_irq_unmask(unsigned int irq)
+static void bcm63xx_external_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= IRQ_EXT_BASE;
@@ -125,8 +129,9 @@ static void bcm63xx_external_irq_unmask(
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
}
-static void bcm63xx_external_irq_clear(unsigned int irq)
+static void bcm63xx_external_irq_clear(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= IRQ_EXT_BASE;
@@ -135,26 +140,28 @@ static void bcm63xx_external_irq_clear(u
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
}
-static unsigned int bcm63xx_external_irq_startup(unsigned int irq)
+static unsigned int bcm63xx_external_irq_startup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_c0_status(0x100 << (irq - IRQ_MIPS_BASE));
irq_enable_hazard();
- bcm63xx_external_irq_unmask(irq);
+ bcm63xx_external_irq_unmask(desc);
return 0;
}
-static void bcm63xx_external_irq_shutdown(unsigned int irq)
+static void bcm63xx_external_irq_shutdown(struct irq_desc *desc)
{
- bcm63xx_external_irq_mask(irq);
+ unsigned int irq = desc->irq;
+ bcm63xx_external_irq_mask(desc);
clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE));
irq_disable_hazard();
}
-static int bcm63xx_external_irq_set_type(unsigned int irq,
+static int bcm63xx_external_irq_set_type(struct irq_desc *desc,
unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
u32 reg;
- struct irq_desc *desc = irq_desc + irq;
irq -= IRQ_EXT_BASE;
diff -u -p a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -25,8 +25,9 @@ static int octeon_coreid_for_cpu(int cpu
#endif
}
-static void octeon_irq_core_ack(unsigned int irq)
+static void octeon_irq_core_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = irq - OCTEON_IRQ_SW0;
/*
* We don't need to disable IRQs to make these atomic since
@@ -39,9 +40,9 @@ static void octeon_irq_core_ack(unsigned
clear_c0_cause(0x100 << bit);
}
-static void octeon_irq_core_eoi(unsigned int irq)
+static void octeon_irq_core_eoi(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_desc + irq;
+ unsigned int irq = desc->irq;
unsigned int bit = irq - OCTEON_IRQ_SW0;
/*
* If an IRQ is being processed while we are disabling it the
@@ -58,8 +59,9 @@ static void octeon_irq_core_eoi(unsigned
set_c0_status(0x100 << bit);
}
-static void octeon_irq_core_enable(unsigned int irq)
+static void octeon_irq_core_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
unsigned int bit = irq - OCTEON_IRQ_SW0;
@@ -85,8 +87,9 @@ static void octeon_irq_core_disable_loca
local_irq_restore(flags);
}
-static void octeon_irq_core_disable(unsigned int irq)
+static void octeon_irq_core_disable(struct irq_desc *desc)
{
+unsigned int irq = desc->irq;
#ifdef CONFIG_SMP
on_each_cpu((void (*)(void *)) octeon_irq_core_disable_local,
(void *) (long) irq, 1);
@@ -104,7 +107,7 @@ static struct irq_chip octeon_irq_chip_c
};
-static void octeon_irq_ciu0_ack(unsigned int irq)
+static void octeon_irq_ciu0_ack(struct irq_desc *unused)
{
/*
* In order to avoid any locking accessing the CIU, we
@@ -120,7 +123,7 @@ static void octeon_irq_ciu0_ack(unsigned
clear_c0_status(0x100 << 2);
}
-static void octeon_irq_ciu0_eoi(unsigned int irq)
+static void octeon_irq_ciu0_eoi(struct irq_desc *unused)
{
/*
* Enable all CIU interrupts again. We don't need to disable
@@ -130,8 +133,9 @@ static void octeon_irq_ciu0_eoi(unsigned
set_c0_status(0x100 << 2);
}
-static void octeon_irq_ciu0_enable(unsigned int irq)
+static void octeon_irq_ciu0_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int coreid = cvmx_get_core_num();
unsigned long flags;
uint64_t en0;
@@ -145,8 +149,9 @@ static void octeon_irq_ciu0_enable(unsig
raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags);
}
-static void octeon_irq_ciu0_disable(unsigned int irq)
+static void octeon_irq_ciu0_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */
unsigned long flags;
uint64_t en0;
@@ -170,8 +175,9 @@ static void octeon_irq_ciu0_disable(unsi
* Enable the irq on the current core for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu0_enable_v2(unsigned int irq)
+static void octeon_irq_ciu0_enable_v2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int index = cvmx_get_core_num() * 2;
u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0);
@@ -182,8 +188,9 @@ static void octeon_irq_ciu0_enable_v2(un
* Disable the irq on the current core for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu0_ack_v2(unsigned int irq)
+static void octeon_irq_ciu0_ack_v2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int index = cvmx_get_core_num() * 2;
u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0);
@@ -201,25 +208,27 @@ static void octeon_irq_ciu0_timer_ack(un
cvmx_write_csr(CVMX_CIU_INTX_SUM0(index), mask);
}
-static void octeon_irq_ciu0_timer_ack_v1(unsigned int irq)
+static void octeon_irq_ciu0_timer_ack_v1(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
octeon_irq_ciu0_timer_ack(irq);
- octeon_irq_ciu0_ack(irq);
+ octeon_irq_ciu0_ack(desc);
}
-static void octeon_irq_ciu0_timer_ack_v2(unsigned int irq)
+static void octeon_irq_ciu0_timer_ack_v2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
octeon_irq_ciu0_timer_ack(irq);
- octeon_irq_ciu0_ack_v2(irq);
+ octeon_irq_ciu0_ack_v2(desc);
}
/*
* Enable the irq on the current core for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu0_eoi_v2(unsigned int irq)
+static void octeon_irq_ciu0_eoi_v2(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_desc + irq;
+ unsigned int irq = desc->irq;
int index = cvmx_get_core_num() * 2;
u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0);
@@ -231,8 +240,9 @@ static void octeon_irq_ciu0_eoi_v2(unsig
* Disable the irq on the all cores for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu0_disable_all_v2(unsigned int irq)
+static void octeon_irq_ciu0_disable_all_v2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0);
int index;
int cpu;
@@ -243,8 +253,9 @@ static void octeon_irq_ciu0_disable_all_
}
#ifdef CONFIG_SMP
-static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest)
+static int octeon_irq_ciu0_set_affinity(struct irq_desc *desc, const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
int cpu;
unsigned long flags;
int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */
@@ -274,9 +285,10 @@ static int octeon_irq_ciu0_set_affinity(
* Set affinity for the irq for chips that have the EN*_W1{S,C}
* registers.
*/
-static int octeon_irq_ciu0_set_affinity_v2(unsigned int irq,
+static int octeon_irq_ciu0_set_affinity_v2(struct irq_desc *desc,
const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
int cpu;
int index;
u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0);
@@ -339,7 +351,7 @@ static struct irq_chip octeon_irq_chip_c
};
-static void octeon_irq_ciu1_ack(unsigned int irq)
+static void octeon_irq_ciu1_ack(struct irq_desc *unused)
{
/*
* In order to avoid any locking accessing the CIU, we
@@ -353,7 +365,7 @@ static void octeon_irq_ciu1_ack(unsigned
clear_c0_status(0x100 << 3);
}
-static void octeon_irq_ciu1_eoi(unsigned int irq)
+static void octeon_irq_ciu1_eoi(struct irq_desc *unused)
{
/*
* Enable all CIU interrupts again. We don't need to disable
@@ -363,8 +375,9 @@ static void octeon_irq_ciu1_eoi(unsigned
set_c0_status(0x100 << 3);
}
-static void octeon_irq_ciu1_enable(unsigned int irq)
+static void octeon_irq_ciu1_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int coreid = cvmx_get_core_num();
unsigned long flags;
uint64_t en1;
@@ -378,8 +391,9 @@ static void octeon_irq_ciu1_enable(unsig
raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
}
-static void octeon_irq_ciu1_disable(unsigned int irq)
+static void octeon_irq_ciu1_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */
unsigned long flags;
uint64_t en1;
@@ -403,8 +417,9 @@ static void octeon_irq_ciu1_disable(unsi
* Enable the irq on the current core for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu1_enable_v2(unsigned int irq)
+static void octeon_irq_ciu1_enable_v2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int index = cvmx_get_core_num() * 2 + 1;
u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0);
@@ -415,8 +430,9 @@ static void octeon_irq_ciu1_enable_v2(un
* Disable the irq on the current core for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu1_ack_v2(unsigned int irq)
+static void octeon_irq_ciu1_ack_v2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int index = cvmx_get_core_num() * 2 + 1;
u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0);
@@ -427,9 +443,9 @@ static void octeon_irq_ciu1_ack_v2(unsig
* Enable the irq on the current core for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu1_eoi_v2(unsigned int irq)
+static void octeon_irq_ciu1_eoi_v2(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_desc + irq;
+ unsigned int irq = desc->irq;
int index = cvmx_get_core_num() * 2 + 1;
u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0);
@@ -441,8 +457,9 @@ static void octeon_irq_ciu1_eoi_v2(unsig
* Disable the irq on the all cores for chips that have the EN*_W1{S,C}
* registers.
*/
-static void octeon_irq_ciu1_disable_all_v2(unsigned int irq)
+static void octeon_irq_ciu1_disable_all_v2(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0);
int index;
int cpu;
@@ -453,9 +470,10 @@ static void octeon_irq_ciu1_disable_all_
}
#ifdef CONFIG_SMP
-static int octeon_irq_ciu1_set_affinity(unsigned int irq,
+static int octeon_irq_ciu1_set_affinity(struct irq_desc *desc,
const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
int cpu;
unsigned long flags;
int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */
@@ -486,9 +504,10 @@ static int octeon_irq_ciu1_set_affinity(
* Set affinity for the irq for chips that have the EN*_W1{S,C}
* registers.
*/
-static int octeon_irq_ciu1_set_affinity_v2(unsigned int irq,
+static int octeon_irq_ciu1_set_affinity_v2(struct irq_desc *desc,
const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
int cpu;
int index;
u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0);
@@ -532,8 +551,9 @@ static struct irq_chip octeon_irq_chip_c
static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock);
-static void octeon_irq_msi_ack(unsigned int irq)
+static void octeon_irq_msi_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) {
/* These chips have PCI */
cvmx_write_csr(CVMX_NPI_NPI_MSI_RCV,
@@ -548,13 +568,14 @@ static void octeon_irq_msi_ack(unsigned
}
}
-static void octeon_irq_msi_eoi(unsigned int irq)
+static void octeon_irq_msi_eoi(struct irq_desc *unused)
{
/* Nothing needed */
}
-static void octeon_irq_msi_enable(unsigned int irq)
+static void octeon_irq_msi_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) {
/*
* Octeon PCI doesn't have the ability to mask/unmask
@@ -581,8 +602,9 @@ static void octeon_irq_msi_enable(unsign
}
}
-static void octeon_irq_msi_disable(unsigned int irq)
+static void octeon_irq_msi_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) {
/* See comment in enable */
} else {
@@ -752,7 +774,7 @@ void fixup_irqs(void)
if (is_irq_enabled_on_cpu(irq, smp_processor_id())) {
/* ciu irq migrates to next cpu */
octeon_irq_chip_ciu0.disable(irq);
- octeon_irq_ciu0_set_affinity(irq, &cpu_online_map);
+ octeon_irq_ciu0_set_affinity(irq_to_desc(irq), &cpu_online_map);
}
}
@@ -764,7 +786,7 @@ void fixup_irqs(void)
if (is_irq_enabled_on_cpu(irq, smp_processor_id())) {
/* ciu irq migrates to next cpu */
octeon_irq_chip_ciu0.disable(irq);
- octeon_irq_ciu0_set_affinity(irq, &cpu_online_map);
+ octeon_irq_ciu0_set_affinity(irq_to_desc(irq), &cpu_online_map);
}
}
@@ -772,7 +794,7 @@ void fixup_irqs(void)
if (is_irq_enabled_on_cpu(irq, smp_processor_id())) {
/* ciu irq migrates to next cpu */
octeon_irq_chip_ciu1.disable(irq);
- octeon_irq_ciu1_set_affinity(irq, &cpu_online_map);
+ octeon_irq_ciu1_set_affinity(irq_to_desc(irq), &cpu_online_map);
}
}
}
diff -u -p a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -21,8 +21,9 @@
static int ioasic_irq_base;
-static inline void unmask_ioasic_irq(unsigned int irq)
+static inline void unmask_ioasic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 simr;
simr = ioasic_read(IO_REG_SIMR);
@@ -30,8 +31,9 @@ static inline void unmask_ioasic_irq(uns
ioasic_write(IO_REG_SIMR, simr);
}
-static inline void mask_ioasic_irq(unsigned int irq)
+static inline void mask_ioasic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 simr;
simr = ioasic_read(IO_REG_SIMR);
@@ -47,16 +49,16 @@ static inline void clear_ioasic_irq(unsi
ioasic_write(IO_REG_SIR, sir);
}
-static inline void ack_ioasic_irq(unsigned int irq)
+static inline void ack_ioasic_irq(struct irq_desc *desc)
{
- mask_ioasic_irq(irq);
+ mask_ioasic_irq(desc);
fast_iob();
}
static inline void end_ioasic_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- unmask_ioasic_irq(irq);
+ unmask_ioasic_irq(irq_to_desc(irq));
}
static struct irq_chip ioasic_irq_type = {
@@ -74,8 +76,9 @@ static struct irq_chip ioasic_irq_type =
#define ack_ioasic_dma_irq ack_ioasic_irq
-static inline void end_ioasic_dma_irq(unsigned int irq)
+static inline void end_ioasic_dma_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
clear_ioasic_irq(irq);
fast_iob();
end_ioasic_irq(irq);
diff -u -p a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -31,8 +31,9 @@ u32 cached_kn02_csr;
static int kn02_irq_base;
-static inline void unmask_kn02_irq(unsigned int irq)
+static inline void unmask_kn02_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
KN02_CSR);
@@ -40,8 +41,9 @@ static inline void unmask_kn02_irq(unsig
*csr = cached_kn02_csr;
}
-static inline void mask_kn02_irq(unsigned int irq)
+static inline void mask_kn02_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
KN02_CSR);
@@ -49,9 +51,9 @@ static inline void mask_kn02_irq(unsigne
*csr = cached_kn02_csr;
}
-static void ack_kn02_irq(unsigned int irq)
+static void ack_kn02_irq(struct irq_desc *desc)
{
- mask_kn02_irq(irq);
+ mask_kn02_irq(desc);
iob();
}
diff -u -p a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -34,8 +34,9 @@
#include <asm/emma/emma2rh.h>
-static void emma2rh_irq_enable(unsigned int irq)
+static void emma2rh_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
@@ -49,8 +50,9 @@ static void emma2rh_irq_enable(unsigned
emma2rh_out32(reg_index, reg_value | reg_bitmask);
}
-static void emma2rh_irq_disable(unsigned int irq)
+static void emma2rh_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
@@ -82,8 +84,9 @@ void emma2rh_irq_init(void)
handle_level_irq, "level");
}
-static void emma2rh_sw_irq_enable(unsigned int irq)
+static void emma2rh_sw_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= EMMA2RH_SW_IRQ_BASE;
@@ -93,8 +96,9 @@ static void emma2rh_sw_irq_enable(unsign
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
-static void emma2rh_sw_irq_disable(unsigned int irq)
+static void emma2rh_sw_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= EMMA2RH_SW_IRQ_BASE;
@@ -122,8 +126,9 @@ void emma2rh_sw_irq_init(void)
handle_level_irq, "level");
}
-static void emma2rh_gpio_irq_enable(unsigned int irq)
+static void emma2rh_gpio_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= EMMA2RH_GPIO_IRQ_BASE;
@@ -133,8 +138,9 @@ static void emma2rh_gpio_irq_enable(unsi
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
-static void emma2rh_gpio_irq_disable(unsigned int irq)
+static void emma2rh_gpio_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= EMMA2RH_GPIO_IRQ_BASE;
@@ -144,14 +150,16 @@ static void emma2rh_gpio_irq_disable(uns
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
-static void emma2rh_gpio_irq_ack(unsigned int irq)
+static void emma2rh_gpio_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= EMMA2RH_GPIO_IRQ_BASE;
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
}
-static void emma2rh_gpio_irq_mask_ack(unsigned int irq)
+static void emma2rh_gpio_irq_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 reg;
irq -= EMMA2RH_GPIO_IRQ_BASE;
diff -u -p a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -22,8 +22,9 @@
static DEFINE_RAW_SPINLOCK(r4030_lock);
-static void enable_r4030_irq(unsigned int irq)
+static void enable_r4030_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq - JAZZ_IRQ_START);
unsigned long flags;
@@ -33,8 +34,9 @@ static void enable_r4030_irq(unsigned in
raw_spin_unlock_irqrestore(&r4030_lock, flags);
}
-void disable_r4030_irq(unsigned int irq)
+void disable_r4030_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START));
unsigned long flags;
diff -u -p a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -30,9 +30,9 @@
static int i8259A_auto_eoi = -1;
DEFINE_RAW_SPINLOCK(i8259A_lock);
-static void disable_8259A_irq(unsigned int irq);
-static void enable_8259A_irq(unsigned int irq);
-static void mask_and_ack_8259A(unsigned int irq);
+static void disable_8259A_irq(struct irq_desc *desc);
+static void enable_8259A_irq(struct irq_desc *desc);
+static void mask_and_ack_8259A(struct irq_desc *desc);
static void init_8259A(int auto_eoi);
static struct irq_chip i8259A_chip = {
@@ -58,8 +58,9 @@ static unsigned int cached_irq_mask = 0x
#define cached_master_mask (cached_irq_mask)
#define cached_slave_mask (cached_irq_mask >> 8)
-static void disable_8259A_irq(unsigned int irq)
+static void disable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
unsigned long flags;
@@ -74,8 +75,9 @@ static void disable_8259A_irq(unsigned i
raw_spin_unlock_irqrestore(&i8259A_lock, flags);
}
-static void enable_8259A_irq(unsigned int irq)
+static void enable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
unsigned long flags;
@@ -144,8 +146,9 @@ static inline int i8259A_irq_real(unsign
* first, _then_ send the EOI, and the order of EOI
* to the two 8259s is important!
*/
-static void mask_and_ack_8259A(unsigned int irq)
+static void mask_and_ack_8259A(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irqmask;
unsigned long flags;
diff -u -p a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -88,16 +88,18 @@ unsigned int gic_get_int(void)
return i;
}
-static unsigned int gic_irq_startup(unsigned int irq)
+static unsigned int gic_irq_startup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= _irqbase;
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
GIC_SET_INTR_MASK(irq);
return 0;
}
-static void gic_irq_ack(unsigned int irq)
+static void gic_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= _irqbase;
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
GIC_CLR_INTR_MASK(irq);
@@ -106,15 +108,17 @@ static void gic_irq_ack(unsigned int irq
GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
}
-static void gic_mask_irq(unsigned int irq)
+static void gic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= _irqbase;
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
GIC_CLR_INTR_MASK(irq);
}
-static void gic_unmask_irq(unsigned int irq)
+static void gic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
irq -= _irqbase;
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
GIC_SET_INTR_MASK(irq);
@@ -124,8 +128,9 @@ static void gic_unmask_irq(unsigned int
static DEFINE_SPINLOCK(gic_lock);
-static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
+static int gic_set_affinity(struct irq_desc *desc, const struct cpumask *cpumask)
{
+ unsigned int irq = desc->irq;
cpumask_t tmp = CPU_MASK_NONE;
unsigned long flags;
int i;
@@ -148,7 +153,7 @@ static int gic_set_affinity(unsigned int
set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
}
- cpumask_copy(irq_desc[irq].affinity, cpumask);
+ cpumask_copy(desc->affinity, cpumask);
spin_unlock_irqrestore(&gic_lock, flags);
return 0;
diff -u -p a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c
--- a/arch/mips/kernel/irq-gt641xx.c
+++ b/arch/mips/kernel/irq-gt641xx.c
@@ -29,8 +29,9 @@
static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock);
-static void ack_gt641xx_irq(unsigned int irq)
+static void ack_gt641xx_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
u32 cause;
@@ -41,8 +42,9 @@ static void ack_gt641xx_irq(unsigned int
raw_spin_unlock_irqrestore(>641xx_irq_lock, flags);
}
-static void mask_gt641xx_irq(unsigned int irq)
+static void mask_gt641xx_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
u32 mask;
@@ -53,8 +55,9 @@ static void mask_gt641xx_irq(unsigned in
raw_spin_unlock_irqrestore(>641xx_irq_lock, flags);
}
-static void mask_ack_gt641xx_irq(unsigned int irq)
+static void mask_ack_gt641xx_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
u32 cause, mask;
@@ -69,8 +72,9 @@ static void mask_ack_gt641xx_irq(unsigne
raw_spin_unlock_irqrestore(>641xx_irq_lock, flags);
}
-static void unmask_gt641xx_irq(unsigned int irq)
+static void unmask_gt641xx_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
u32 mask;
diff -u -p a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -28,8 +28,9 @@ static unsigned long _icctrl_msc;
static unsigned int irq_base;
/* mask off an interrupt */
-static inline void mask_msc_irq(unsigned int irq)
+static inline void mask_msc_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq < (irq_base + 32))
MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base));
else
@@ -37,8 +38,9 @@ static inline void mask_msc_irq(unsigned
}
/* unmask an interrupt */
-static inline void unmask_msc_irq(unsigned int irq)
+static inline void unmask_msc_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
if (irq < (irq_base + 32))
MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base));
else
@@ -48,9 +50,10 @@ static inline void unmask_msc_irq(unsign
/*
* Masks and ACKs an IRQ
*/
-static void level_mask_and_ack_msc_irq(unsigned int irq)
+static void level_mask_and_ack_msc_irq(struct irq_desc *desc)
{
- mask_msc_irq(irq);
+ unsigned int irq = desc->irq;
+ mask_msc_irq(desc);
if (!cpu_has_veic)
MSCIC_WRITE(MSC01_IC_EOI, 0);
/* This actually needs to be a call into platform code */
@@ -60,9 +63,10 @@ static void level_mask_and_ack_msc_irq(u
/*
* Masks and ACKs an IRQ
*/
-static void edge_mask_and_ack_msc_irq(unsigned int irq)
+static void edge_mask_and_ack_msc_irq(struct irq_desc *desc)
{
- mask_msc_irq(irq);
+ unsigned int irq = desc->irq;
+ mask_msc_irq(desc);
if (!cpu_has_veic)
MSCIC_WRITE(MSC01_IC_EOI, 0);
else {
@@ -77,10 +81,10 @@ static void edge_mask_and_ack_msc_irq(un
/*
* End IRQ processing
*/
-static void end_msc_irq(unsigned int irq)
+static void end_msc_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- unmask_msc_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ unmask_msc_irq(desc);
}
/*
diff -u -p a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -17,13 +17,15 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
-static inline void unmask_rm7k_irq(unsigned int irq)
+static inline void unmask_rm7k_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE));
}
-static inline void mask_rm7k_irq(unsigned int irq)
+static inline void mask_rm7k_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
clear_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE));
}
diff -u -p a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -18,13 +18,15 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
-static inline void unmask_rm9k_irq(unsigned int irq)
+static inline void unmask_rm9k_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE));
}
-static inline void mask_rm9k_irq(unsigned int irq)
+static inline void mask_rm9k_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
clear_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE));
}
@@ -33,7 +35,7 @@ static inline void rm9k_cpu_irq_enable(u
unsigned long flags;
local_irq_save(flags);
- unmask_rm9k_irq(irq);
+ unmask_rm9k_irq(irq_to_desc(irq));
local_irq_restore(flags);
}
@@ -47,8 +49,9 @@ static void local_rm9k_perfcounter_irq_s
rm9k_cpu_irq_enable(irq);
}
-static unsigned int rm9k_perfcounter_irq_startup(unsigned int irq)
+static unsigned int rm9k_perfcounter_irq_startup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
on_each_cpu(local_rm9k_perfcounter_irq_startup, (void *) irq, 1);
return 0;
@@ -60,12 +63,13 @@ static void local_rm9k_perfcounter_irq_s
unsigned long flags;
local_irq_save(flags);
- mask_rm9k_irq(irq);
+ mask_rm9k_irq(irq_to_desc(irq));
local_irq_restore(flags);
}
-static void rm9k_perfcounter_irq_shutdown(unsigned int irq)
+static void rm9k_perfcounter_irq_shutdown(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 1);
}
diff -u -p a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -36,14 +36,16 @@
#include <asm/mipsmtregs.h>
#include <asm/system.h>
-static inline void unmask_mips_irq(unsigned int irq)
+static inline void unmask_mips_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE));
irq_enable_hazard();
}
-static inline void mask_mips_irq(unsigned int irq)
+static inline void mask_mips_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE));
irq_disable_hazard();
}
@@ -64,13 +66,14 @@ static struct irq_chip mips_cpu_irq_cont
#define unmask_mips_mt_irq unmask_mips_irq
#define mask_mips_mt_irq mask_mips_irq
-static unsigned int mips_mt_cpu_irq_startup(unsigned int irq)
+static unsigned int mips_mt_cpu_irq_startup(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int vpflags = dvpe();
clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE));
evpe(vpflags);
- unmask_mips_mt_irq(irq);
+ unmask_mips_mt_irq(desc);
return 0;
}
@@ -79,12 +82,13 @@ static unsigned int mips_mt_cpu_irq_star
* While we ack the interrupt interrupts are disabled and thus we don't need
* to deal with concurrency issues. Same for mips_cpu_irq_end.
*/
-static void mips_mt_cpu_irq_ack(unsigned int irq)
+static void mips_mt_cpu_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int vpflags = dvpe();
clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE));
evpe(vpflags);
- mask_mips_mt_irq(irq);
+ mask_mips_mt_irq(desc);
}
static struct irq_chip mips_mt_cpu_irq_controller = {
diff -u -p a/arch/mips/kernel/irq_txx9.c b/arch/mips/kernel/irq_txx9.c
--- a/arch/mips/kernel/irq_txx9.c
+++ b/arch/mips/kernel/irq_txx9.c
@@ -62,8 +62,9 @@ static struct {
unsigned char mode;
} txx9irq[TXx9_MAX_IR] __read_mostly;
-static void txx9_irq_unmask(unsigned int irq)
+static void txx9_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16 ) / 2];
int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8;
@@ -78,8 +79,9 @@ static void txx9_irq_unmask(unsigned int
#endif
}
-static inline void txx9_irq_mask(unsigned int irq)
+static inline void txx9_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16) / 2];
int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8;
@@ -98,18 +100,20 @@ static inline void txx9_irq_mask(unsigne
#endif
}
-static void txx9_irq_mask_ack(unsigned int irq)
+static void txx9_irq_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
- txx9_irq_mask(irq);
+ txx9_irq_mask(desc);
/* clear edge detection */
if (unlikely(TXx9_IRCR_EDGE(txx9irq[irq_nr].mode)))
__raw_writel(TXx9_IRSCR_EIClrE | irq_nr, &txx9_ircptr->scr);
}
-static int txx9_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int txx9_irq_set_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
u32 cr;
u32 __iomem *crp;
diff -u -p a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -32,14 +32,16 @@ static volatile int *lasat_int_status;
static volatile int *lasat_int_mask;
static volatile int lasat_int_mask_shift;
-void disable_lasat_irq(unsigned int irq_nr)
+void disable_lasat_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
irq_nr -= LASAT_IRQ_BASE;
*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
}
-void enable_lasat_irq(unsigned int irq_nr)
+void enable_lasat_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
irq_nr -= LASAT_IRQ_BASE;
*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
}
diff -u -p a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c
--- a/arch/mips/loongson/common/bonito-irq.c
+++ b/arch/mips/loongson/common/bonito-irq.c
@@ -16,14 +16,16 @@
#include <loongson.h>
-static inline void bonito_irq_enable(unsigned int irq)
+static inline void bonito_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
LOONGSON_INTENSET = (1 << (irq - LOONGSON_IRQ_BASE));
mmiowb();
}
-static inline void bonito_irq_disable(unsigned int irq)
+static inline void bonito_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
LOONGSON_INTENCLR = (1 << (irq - LOONGSON_IRQ_BASE));
mmiowb();
}
diff -u -p a/arch/mips/nxp/pnx833x/common/interrupts.c b/arch/mips/nxp/pnx833x/common/interrupts.c
--- a/arch/mips/nxp/pnx833x/common/interrupts.c
+++ b/arch/mips/nxp/pnx833x/common/interrupts.c
@@ -158,8 +158,9 @@ static int irqflags[PNX833X_PIC_NUM_IRQ]
static DEFINE_RAW_SPINLOCK(pnx833x_irq_lock);
-static unsigned int pnx833x_startup_pic_irq(unsigned int irq)
+static unsigned int pnx833x_startup_pic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
@@ -172,8 +173,9 @@ static unsigned int pnx833x_startup_pic_
return 0;
}
-static void pnx833x_shutdown_pic_irq(unsigned int irq)
+static void pnx833x_shutdown_pic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
@@ -185,8 +187,9 @@ static void pnx833x_shutdown_pic_irq(uns
raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
}
-static void pnx833x_enable_pic_irq(unsigned int irq)
+static void pnx833x_enable_pic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
@@ -199,8 +202,9 @@ static void pnx833x_enable_pic_irq(unsig
raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
}
-static void pnx833x_disable_pic_irq(unsigned int irq)
+static void pnx833x_disable_pic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
@@ -212,18 +216,19 @@ static void pnx833x_disable_pic_irq(unsi
raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
}
-static void pnx833x_ack_pic_irq(unsigned int irq)
+static void pnx833x_ack_pic_irq(struct irq_desc *unused)
{
}
-static void pnx833x_end_pic_irq(unsigned int irq)
+static void pnx833x_end_pic_irq(struct irq_desc *unused)
{
}
static DEFINE_RAW_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock);
-static unsigned int pnx833x_startup_gpio_irq(unsigned int irq)
+static unsigned int pnx833x_startup_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq - PNX833X_GPIO_IRQ_BASE;
unsigned long flags;
raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
@@ -232,8 +237,9 @@ static unsigned int pnx833x_startup_gpio
return 0;
}
-static void pnx833x_enable_gpio_irq(unsigned int irq)
+static void pnx833x_enable_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq - PNX833X_GPIO_IRQ_BASE;
unsigned long flags;
raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
@@ -241,8 +247,9 @@ static void pnx833x_enable_gpio_irq(unsi
raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
}
-static void pnx833x_disable_gpio_irq(unsigned int irq)
+static void pnx833x_disable_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq - PNX833X_GPIO_IRQ_BASE;
unsigned long flags;
raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
@@ -250,12 +257,13 @@ static void pnx833x_disable_gpio_irq(uns
raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
}
-static void pnx833x_ack_gpio_irq(unsigned int irq)
+static void pnx833x_ack_gpio_irq(struct irq_desc *unused)
{
}
-static void pnx833x_end_gpio_irq(unsigned int irq)
+static void pnx833x_end_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int pin = irq - PNX833X_GPIO_IRQ_BASE;
unsigned long flags;
raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
@@ -263,8 +271,9 @@ static void pnx833x_end_gpio_irq(unsigne
raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
}
-static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type)
+static int pnx833x_set_type_gpio_irq(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
int pin = irq - PNX833X_GPIO_IRQ_BASE;
int gpio_mode;
@@ -335,7 +344,7 @@ void __init arch_init_irq(void)
PNX833X_PIC_INT_PRIORITY = 0;
/* Setup GPIO IRQ dispatching */
- pnx833x_startup_pic_irq(PNX833X_PIC_GPIO_INT);
+ pnx833x_startup_pic_irq(irq_to_desc(PNX833X_PIC_GPIO_INT));
/* Enable PIC IRQs (HWIRQ2) */
if (cpu_has_vint)
diff -u -p a/arch/mips/nxp/pnx8550/common/int.c b/arch/mips/nxp/pnx8550/common/int.c
--- a/arch/mips/nxp/pnx8550/common/int.c
+++ b/arch/mips/nxp/pnx8550/common/int.c
@@ -115,8 +115,9 @@ static inline void unmask_gic_int(unsign
PNX8550_GIC_REQ(irq_nr) = (1<<26 | 1<<16) | (1<<28) | gic_prio[irq_nr];
}
-static inline void mask_irq(unsigned int irq_nr)
+static inline void mask_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
modify_cp0_intmask(1 << irq_nr, 0);
} else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
@@ -130,8 +131,9 @@ static inline void mask_irq(unsigned int
}
}
-static inline void unmask_irq(unsigned int irq_nr)
+static inline void unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
modify_cp0_intmask(0, 1 << irq_nr);
} else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
@@ -183,7 +185,7 @@ void __init arch_init_irq(void)
for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq);
- mask_irq(i); /* mask the irq just in case */
+ mask_irq(irq_to_desc(i)); /* mask the irq just in case */
}
/* init of GIC/IPC interrupts */
diff -u -p a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
@@ -24,8 +24,9 @@
* NOTE: We are only enabling support for VPE0 right now.
*/
-static inline void unmask_msp_cic_irq(unsigned int irq)
+static inline void unmask_msp_cic_irq(struct irq_desc *desc)
{
+unsigned int irq = desc->irq;
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
@@ -47,8 +48,9 @@ static inline void mask_msp_cic_irq(unsi
* While we ack the interrupt interrupts are disabled and thus we don't need
* to deal with concurrency issues. Same for msp_cic_irq_end.
*/
-static inline void ack_msp_cic_irq(unsigned int irq)
+static inline void ack_msp_cic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mask_msp_cic_irq(irq);
/*
diff -u -p a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
--- a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
@@ -21,8 +21,9 @@
#include <msp_slp_int.h>
#include <msp_regs.h>
-static inline void unmask_msp_slp_irq(unsigned int irq)
+static inline void unmask_msp_slp_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
@@ -30,8 +31,9 @@ static inline void unmask_msp_slp_irq(un
*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
}
-static inline void mask_msp_slp_irq(unsigned int irq)
+static inline void mask_msp_slp_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
@@ -43,8 +45,9 @@ static inline void mask_msp_slp_irq(unsi
* While we ack the interrupt interrupts are disabled and thus we don't need
* to deal with concurrency issues. Same for msp_slp_irq_end.
*/
-static inline void ack_msp_slp_irq(unsigned int irq)
+static inline void ack_msp_slp_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
diff -u -p a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c
--- a/arch/mips/powertv/asic/irq_asic.c
+++ b/arch/mips/powertv/asic/irq_asic.c
@@ -20,8 +20,9 @@
#include <asm/mach-powertv/asic_regs.h>
-static inline void unmask_asic_irq(unsigned int irq)
+static inline void unmask_asic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long enable_bit;
enable_bit = (1 << (irq & 0x1f));
@@ -44,8 +45,9 @@ static inline void unmask_asic_irq(unsig
}
}
-static inline void mask_asic_irq(unsigned int irq)
+static inline void mask_asic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long disable_mask;
disable_mask = ~(1 << (irq & 0x1f));
diff -u -p a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c
--- a/arch/mips/rb532/irq.c
+++ b/arch/mips/rb532/irq.c
@@ -112,8 +112,9 @@ static inline void ack_local_irq(unsigne
clear_c0_cause(ipnum);
}
-static void rb532_enable_irq(unsigned int irq_nr)
+static void rb532_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
int ip = irq_nr - GROUP0_IRQ_BASE;
unsigned int group, intr_bit;
volatile unsigned int *addr;
@@ -133,8 +134,9 @@ static void rb532_enable_irq(unsigned in
}
}
-static void rb532_disable_irq(unsigned int irq_nr)
+static void rb532_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
int ip = irq_nr - GROUP0_IRQ_BASE;
unsigned int group, intr_bit, mask;
volatile unsigned int *addr;
@@ -164,14 +166,16 @@ static void rb532_disable_irq(unsigned i
}
}
-static void rb532_mask_and_ack_irq(unsigned int irq_nr)
+static void rb532_mask_and_ack_irq(struct irq_desc *desc)
{
- rb532_disable_irq(irq_nr);
+ unsigned int irq_nr = desc->irq;
+ rb532_disable_irq(desc);
ack_local_irq(group_to_ip(irq_to_group(irq_nr)));
}
-static int rb532_set_type(unsigned int irq_nr, unsigned type)
+static int rb532_set_type(struct irq_desc *desc, unsigned type)
{
+ unsigned int irq_nr = desc->irq;
int gpio = irq_nr - GPIO_MAPPED_IRQ_BASE;
int group = irq_to_group(irq_nr);
diff -u -p a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -31,16 +31,18 @@ static char lc3msk_to_irqnr[256];
extern int ip22_eisa_init(void);
-static void enable_local0_irq(unsigned int irq)
+static void enable_local0_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* don't allow mappable interrupt to be enabled from setup_irq,
* we have our own way to do so */
if (irq != SGI_MAP_0_IRQ)
sgint->imask0 |= (1 << (irq - SGINT_LOCAL0));
}
-static void disable_local0_irq(unsigned int irq)
+static void disable_local0_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
}
@@ -52,16 +54,18 @@ static struct irq_chip ip22_local0_irq_t
.unmask = enable_local0_irq,
};
-static void enable_local1_irq(unsigned int irq)
+static void enable_local1_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* don't allow mappable interrupt to be enabled from setup_irq,
* we have our own way to do so */
if (irq != SGI_MAP_1_IRQ)
sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
}
-static void disable_local1_irq(unsigned int irq)
+static void disable_local1_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
}
@@ -73,14 +77,16 @@ static struct irq_chip ip22_local1_irq_t
.unmask = enable_local1_irq,
};
-static void enable_local2_irq(unsigned int irq)
+static void enable_local2_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
}
-static void disable_local2_irq(unsigned int irq)
+static void disable_local2_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
if (!sgint->cmeimask0)
sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
@@ -94,14 +100,16 @@ static struct irq_chip ip22_local2_irq_t
.unmask = enable_local2_irq,
};
-static void enable_local3_irq(unsigned int irq)
+static void enable_local3_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
}
-static void disable_local3_irq(unsigned int irq)
+static void disable_local3_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
if (!sgint->cmeimask1)
sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
diff -u -p a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -241,8 +241,9 @@ static int intr_disconnect_level(int cpu
}
/* Startup one of the (PCI ...) IRQs routes over a bridge. */
-static unsigned int startup_bridge_irq(unsigned int irq)
+static unsigned int startup_bridge_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct bridge_controller *bc;
bridgereg_t device;
bridge_t *bridge;
@@ -289,8 +290,9 @@ static unsigned int startup_bridge_irq(u
}
/* Shutdown one of the (PCI ...) IRQs routes over a bridge. */
-static void shutdown_bridge_irq(unsigned int irq)
+static void shutdown_bridge_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
bridge_t *bridge = bc->base;
int pin, swlevel;
@@ -310,8 +312,9 @@ static void shutdown_bridge_irq(unsigned
bridge->b_wid_tflush;
}
-static inline void enable_bridge_irq(unsigned int irq)
+static inline void enable_bridge_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cpuid_t cpu;
int swlevel;
@@ -319,8 +322,9 @@ static inline void enable_bridge_irq(uns
intr_connect_level(cpu, swlevel);
}
-static inline void disable_bridge_irq(unsigned int irq)
+static inline void disable_bridge_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cpuid_t cpu;
int swlevel;
diff -u -p a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -36,11 +36,11 @@
#include <asm/sn/sn0/hubio.h>
#include <asm/pci/bridge.h>
-static void enable_rt_irq(unsigned int irq)
+static void enable_rt_irq(struct irq_desc *unused)
{
}
-static void disable_rt_irq(unsigned int irq)
+static void disable_rt_irq(struct irq_desc *unused)
{
}
diff -u -p a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -131,16 +131,18 @@ static struct irqaction cpuerr_irq = {
static uint64_t crime_mask;
-static inline void crime_enable_irq(unsigned int irq)
+static inline void crime_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = irq - CRIME_IRQ_BASE;
crime_mask |= 1 << bit;
crime->imask = crime_mask;
}
-static inline void crime_disable_irq(unsigned int irq)
+static inline void crime_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = irq - CRIME_IRQ_BASE;
crime_mask &= ~(1 << bit);
@@ -148,15 +150,15 @@ static inline void crime_disable_irq(uns
flush_crime_bus();
}
-static void crime_level_mask_and_ack_irq(unsigned int irq)
+static void crime_level_mask_and_ack_irq(struct irq_desc *desc)
{
- crime_disable_irq(irq);
+ crime_disable_irq(desc);
}
-static void crime_level_end_irq(unsigned int irq)
+static void crime_level_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- crime_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ crime_enable_irq(desc);
}
static struct irq_chip crime_level_interrupt = {
@@ -168,8 +170,9 @@ static struct irq_chip crime_level_inter
.end = crime_level_end_irq,
};
-static void crime_edge_mask_and_ack_irq(unsigned int irq)
+static void crime_edge_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = irq - CRIME_IRQ_BASE;
uint64_t crime_int;
@@ -179,13 +182,13 @@ static void crime_edge_mask_and_ack_irq(
crime_int &= ~(1 << bit);
crime->hard_int = crime_int;
- crime_disable_irq(irq);
+ crime_disable_irq(desc);
}
-static void crime_edge_end_irq(unsigned int irq)
+static void crime_edge_end_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- crime_enable_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ crime_enable_irq(desc);
}
static struct irq_chip crime_edge_interrupt = {
@@ -205,16 +208,18 @@ static struct irq_chip crime_edge_interr
static unsigned long macepci_mask;
-static void enable_macepci_irq(unsigned int irq)
+static void enable_macepci_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
macepci_mask |= MACEPCI_CONTROL_INT(irq - MACEPCI_SCSI0_IRQ);
mace->pci.control = macepci_mask;
crime_mask |= 1 << (irq - CRIME_IRQ_BASE);
crime->imask = crime_mask;
}
-static void disable_macepci_irq(unsigned int irq)
+static void disable_macepci_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
crime_mask &= ~(1 << (irq - CRIME_IRQ_BASE));
crime->imask = crime_mask;
flush_crime_bus();
@@ -223,10 +228,10 @@ static void disable_macepci_irq(unsigned
flush_mace_bus();
}
-static void end_macepci_irq(unsigned int irq)
+static void end_macepci_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_macepci_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_macepci_irq(desc);
}
static struct irq_chip ip32_macepci_interrupt = {
@@ -277,8 +282,9 @@ static struct irq_chip ip32_macepci_inte
static unsigned long maceisa_mask;
-static void enable_maceisa_irq(unsigned int irq)
+static void enable_maceisa_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int crime_int = 0;
pr_debug("maceisa enable: %u\n", irq);
@@ -301,8 +307,9 @@ static void enable_maceisa_irq(unsigned
mace->perif.ctrl.imask = maceisa_mask;
}
-static void disable_maceisa_irq(unsigned int irq)
+static void disable_maceisa_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int crime_int = 0;
maceisa_mask &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ));
@@ -319,8 +326,9 @@ static void disable_maceisa_irq(unsigned
flush_mace_bus();
}
-static void mask_and_ack_maceisa_irq(unsigned int irq)
+static void mask_and_ack_maceisa_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mace_int;
/* edge triggered */
@@ -328,13 +336,13 @@ static void mask_and_ack_maceisa_irq(uns
mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ));
mace->perif.ctrl.istat = mace_int;
- disable_maceisa_irq(irq);
+ disable_maceisa_irq(desc);
}
-static void end_maceisa_irq(unsigned irq)
+static void end_maceisa_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- enable_maceisa_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ enable_maceisa_irq(desc);
}
static struct irq_chip ip32_maceisa_level_interrupt = {
@@ -359,16 +367,18 @@ static struct irq_chip ip32_maceisa_edge
* bits 0-3 and 7 in the CRIME register.
*/
-static void enable_mace_irq(unsigned int irq)
+static void enable_mace_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = irq - CRIME_IRQ_BASE;
crime_mask |= (1 << bit);
crime->imask = crime_mask;
}
-static void disable_mace_irq(unsigned int irq)
+static void disable_mace_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = irq - CRIME_IRQ_BASE;
crime_mask &= ~(1 << bit);
@@ -376,10 +386,10 @@ static void disable_mace_irq(unsigned in
flush_crime_bus();
}
-static void end_mace_irq(unsigned int irq)
+static void end_mace_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_mace_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_mace_irq(desc);
}
static struct irq_chip ip32_mace_interrupt = {
diff -u -p a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -46,12 +46,12 @@
*/
-static void end_bcm1480_irq(unsigned int irq);
-static void enable_bcm1480_irq(unsigned int irq);
-static void disable_bcm1480_irq(unsigned int irq);
-static void ack_bcm1480_irq(unsigned int irq);
+static void end_bcm1480_irq(struct irq_desc *desc);
+static void enable_bcm1480_irq(struct irq_desc *desc);
+static void disable_bcm1480_irq(struct irq_desc *desc);
+static void ack_bcm1480_irq(struct irq_desc *desc);
#ifdef CONFIG_SMP
-static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
+static int bcm1480_set_affinity(struct irq_desc *desc, const struct cpumask *mask);
#endif
#ifdef CONFIG_PCI
@@ -110,8 +110,9 @@ void bcm1480_unmask_irq(int cpu, int irq
}
#ifdef CONFIG_SMP
-static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
+static int bcm1480_set_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
+ unsigned int irq = desc->irq;
int i = 0, old_cpu, cpu, int_on, k;
u64 cur_ints;
unsigned long flags;
@@ -157,19 +158,22 @@ static int bcm1480_set_affinity(unsigned
/*****************************************************************************/
-static void disable_bcm1480_irq(unsigned int irq)
+static void disable_bcm1480_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
bcm1480_mask_irq(bcm1480_irq_owner[irq], irq);
}
-static void enable_bcm1480_irq(unsigned int irq)
+static void enable_bcm1480_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq);
}
-static void ack_bcm1480_irq(unsigned int irq)
+static void ack_bcm1480_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u64 pending;
unsigned int irq_dirty;
int k;
@@ -219,9 +223,10 @@ static void ack_bcm1480_irq(unsigned int
}
-static void end_bcm1480_irq(unsigned int irq)
+static void end_bcm1480_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+ unsigned int irq = desc->irq;
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq);
}
}
diff -u -p a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -45,12 +45,12 @@
*/
-static void end_sb1250_irq(unsigned int irq);
-static void enable_sb1250_irq(unsigned int irq);
-static void disable_sb1250_irq(unsigned int irq);
-static void ack_sb1250_irq(unsigned int irq);
+static void end_sb1250_irq(struct irq_desc *desc);
+static void enable_sb1250_irq(struct irq_desc *desc);
+static void disable_sb1250_irq(struct irq_desc *desc);
+static void ack_sb1250_irq(struct irq_desc *desc);
#ifdef CONFIG_SMP
-static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
+static int sb1250_set_affinity(struct irq_desc *desc, const struct cpumask *mask);
#endif
#ifdef CONFIG_SIBYTE_HAS_LDT
@@ -103,8 +103,9 @@ void sb1250_unmask_irq(int cpu, int irq)
}
#ifdef CONFIG_SMP
-static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
+static int sb1250_set_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
+ unsigned int irq = desc->irq;
int i = 0, old_cpu, cpu, int_on;
u64 cur_ints;
unsigned long flags;
@@ -145,19 +146,22 @@ static int sb1250_set_affinity(unsigned
/*****************************************************************************/
-static void disable_sb1250_irq(unsigned int irq)
+static void disable_sb1250_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sb1250_mask_irq(sb1250_irq_owner[irq], irq);
}
-static void enable_sb1250_irq(unsigned int irq)
+static void enable_sb1250_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
sb1250_unmask_irq(sb1250_irq_owner[irq], irq);
}
-static void ack_sb1250_irq(unsigned int irq)
+static void ack_sb1250_irq(struct irq_desc *desc)
{
+unsigned int irq = desc->irq;
#ifdef CONFIG_SIBYTE_HAS_LDT
u64 pending;
@@ -201,9 +205,10 @@ static void ack_sb1250_irq(unsigned int
}
-static void end_sb1250_irq(unsigned int irq)
+static void end_sb1250_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+ unsigned int irq = desc->irq;
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
sb1250_unmask_irq(sb1250_irq_owner[irq], irq);
}
}
diff -u -p a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -167,23 +167,25 @@ static u32 a20r_ack_hwint(void)
return status;
}
-static inline void unmask_a20r_irq(unsigned int irq)
+static inline void unmask_a20r_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
irq_enable_hazard();
}
-static inline void mask_a20r_irq(unsigned int irq)
+static inline void mask_a20r_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
irq_disable_hazard();
}
-static void end_a20r_irq(unsigned int irq)
+static void end_a20r_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+ if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
a20r_ack_hwint();
- unmask_a20r_irq(irq);
+ unmask_a20r_irq(desc);
}
}
diff -u -p a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -193,24 +193,26 @@ static struct pci_controller sni_control
.io_map_base = SNI_PORT_BASE
};
-static void enable_pcimt_irq(unsigned int irq)
+static void enable_pcimt_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
*(volatile u8 *) PCIMT_IRQSEL |= mask;
}
-void disable_pcimt_irq(unsigned int irq)
+void disable_pcimt_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2));
*(volatile u8 *) PCIMT_IRQSEL &= mask;
}
-static void end_pcimt_irq(unsigned int irq)
+static void end_pcimt_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_pcimt_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_pcimt_irq(desc);
}
static struct irq_chip pcimt_irq_type = {
diff -u -p a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -155,24 +155,26 @@ static struct pci_controller sni_pcit_co
.io_map_base = SNI_PORT_BASE
};
-static void enable_pcit_irq(unsigned int irq)
+static void enable_pcit_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
*(volatile u32 *)SNI_PCIT_INT_REG |= mask;
}
-void disable_pcit_irq(unsigned int irq)
+void disable_pcit_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
*(volatile u32 *)SNI_PCIT_INT_REG &= ~mask;
}
-void end_pcit_irq(unsigned int irq)
+void end_pcit_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_pcit_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_pcit_irq(desc);
}
static struct irq_chip pcit_irq_type = {
diff -u -p a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -154,8 +154,9 @@ static __iomem u8 *rm200_pic_slave;
#define cached_master_mask (rm200_cached_irq_mask)
#define cached_slave_mask (rm200_cached_irq_mask >> 8)
-static void sni_rm200_disable_8259A_irq(unsigned int irq)
+static void sni_rm200_disable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
unsigned long flags;
@@ -170,8 +171,9 @@ static void sni_rm200_disable_8259A_irq(
raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags);
}
-static void sni_rm200_enable_8259A_irq(unsigned int irq)
+static void sni_rm200_enable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask;
unsigned long flags;
@@ -209,8 +211,9 @@ static inline int sni_rm200_i8259A_irq_r
* first, _then_ send the EOI, and the order of EOI
* to the two 8259s is important!
*/
-void sni_rm200_mask_and_ack_8259A(unsigned int irq)
+void sni_rm200_mask_and_ack_8259A(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irqmask;
unsigned long flags;
@@ -428,24 +431,26 @@ void __init sni_rm200_i8259_irqs(void)
#define SNI_RM200_INT_START 24
#define SNI_RM200_INT_END 28
-static void enable_rm200_irq(unsigned int irq)
+static void enable_rm200_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
*(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask;
}
-void disable_rm200_irq(unsigned int irq)
+void disable_rm200_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
*(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask;
}
-void end_rm200_irq(unsigned int irq)
+void end_rm200_irq(struct irq_desc *desc)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_rm200_irq(irq);
+ if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_rm200_irq(desc);
}
static struct irq_chip rm200_irq_type = {
diff -u -p a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c
--- a/arch/mips/txx9/generic/irq_tx4939.c
+++ b/arch/mips/txx9/generic/irq_tx4939.c
@@ -49,8 +49,9 @@ static struct {
unsigned char mode;
} tx4939irq[TX4939_NUM_IR] __read_mostly;
-static void tx4939_irq_unmask(unsigned int irq)
+static void tx4939_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
u32 __iomem *lvlp;
int ofs;
@@ -67,8 +68,9 @@ static void tx4939_irq_unmask(unsigned i
lvlp);
}
-static inline void tx4939_irq_mask(unsigned int irq)
+static inline void tx4939_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
u32 __iomem *lvlp;
int ofs;
@@ -86,11 +88,12 @@ static inline void tx4939_irq_mask(unsig
mmiowb();
}
-static void tx4939_irq_mask_ack(unsigned int irq)
+static void tx4939_irq_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
- tx4939_irq_mask(irq);
+ tx4939_irq_mask(desc);
if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) {
irq_nr--;
/* clear edge detection */
@@ -100,8 +103,9 @@ static void tx4939_irq_mask_ack(unsigned
}
}
-static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int tx4939_irq_set_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
unsigned int irq_nr = irq - TXX9_IRQ_BASE;
u32 cr;
u32 __iomem *crp;
diff -u -p a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c
--- a/arch/mips/txx9/jmr3927/irq.c
+++ b/arch/mips/txx9/jmr3927/irq.c
@@ -46,8 +46,9 @@
* CP0_STATUS is a thread's resource (saved/restored on context switch).
* So disable_irq/enable_irq MUST handle IOC/IRC registers.
*/
-static void mask_irq_ioc(unsigned int irq)
+static void mask_irq_ioc(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* 0: mask */
unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
@@ -56,8 +57,9 @@ static void mask_irq_ioc(unsigned int ir
/* flush write buffer */
(void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
}
-static void unmask_irq_ioc(unsigned int irq)
+static void unmask_irq_ioc(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* 0: mask */
unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
diff -u -p a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
--- a/arch/mips/txx9/rbtx4927/irq.c
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -116,8 +116,8 @@
#include <asm/txx9/generic.h>
#include <asm/txx9/rbtx4927.h>
-static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
-static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
+static void toshiba_rbtx4927_irq_ioc_enable(struct irq_desc *desc);
+static void toshiba_rbtx4927_irq_ioc_disable(struct irq_desc *desc);
#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
@@ -154,8 +154,9 @@ static void __init toshiba_rbtx4927_irq_
set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
}
-static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
+static void toshiba_rbtx4927_irq_ioc_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned char v;
v = readb(rbtx4927_imask_addr);
@@ -163,8 +164,9 @@ static void toshiba_rbtx4927_irq_ioc_ena
writeb(v, rbtx4927_imask_addr);
}
-static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
+static void toshiba_rbtx4927_irq_ioc_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned char v;
v = readb(rbtx4927_imask_addr);
diff -u -p a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
--- a/arch/mips/txx9/rbtx4938/irq.c
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -68,8 +68,8 @@
#include <asm/txx9/generic.h>
#include <asm/txx9/rbtx4938.h>
-static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
-static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
+static void toshiba_rbtx4938_irq_ioc_enable(struct irq_desc *desc);
+static void toshiba_rbtx4938_irq_ioc_disable(struct irq_desc *desc);
#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
@@ -105,8 +105,9 @@ toshiba_rbtx4938_irq_ioc_init(void)
}
static void
-toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
+toshiba_rbtx4938_irq_ioc_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned char v;
v = readb(rbtx4938_imask_addr);
@@ -116,8 +117,9 @@ toshiba_rbtx4938_irq_ioc_enable(unsigned
}
static void
-toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
+toshiba_rbtx4938_irq_ioc_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned char v;
v = readb(rbtx4938_imask_addr);
diff -u -p a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c
--- a/arch/mips/txx9/rbtx4939/irq.c
+++ b/arch/mips/txx9/rbtx4939/irq.c
@@ -18,15 +18,17 @@
* RBTX4939 IOC controller definition
*/
-static void rbtx4939_ioc_irq_unmask(unsigned int irq)
+static void rbtx4939_ioc_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int ioc_nr = irq - RBTX4939_IRQ_IOC;
writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr);
}
-static void rbtx4939_ioc_irq_mask(unsigned int irq)
+static void rbtx4939_ioc_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int ioc_nr = irq - RBTX4939_IRQ_IOC;
writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr);
diff -u -p a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -154,7 +154,7 @@ static inline uint16_t icu2_clear(uint8_
void vr41xx_enable_piuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + PIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(PIU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4111 ||
@@ -169,7 +169,7 @@ EXPORT_SYMBOL(vr41xx_enable_piuint);
void vr41xx_disable_piuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + PIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(PIU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4111 ||
@@ -184,7 +184,7 @@ EXPORT_SYMBOL(vr41xx_disable_piuint);
void vr41xx_enable_aiuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + AIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(AIU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4111 ||
@@ -199,7 +199,7 @@ EXPORT_SYMBOL(vr41xx_enable_aiuint);
void vr41xx_disable_aiuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + AIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(AIU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4111 ||
@@ -214,7 +214,7 @@ EXPORT_SYMBOL(vr41xx_disable_aiuint);
void vr41xx_enable_kiuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + KIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(KIU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4111 ||
@@ -229,7 +229,7 @@ EXPORT_SYMBOL(vr41xx_enable_kiuint);
void vr41xx_disable_kiuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + KIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(KIU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4111 ||
@@ -244,7 +244,7 @@ EXPORT_SYMBOL(vr41xx_disable_kiuint);
void vr41xx_enable_macint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + ETHERNET_IRQ;
+ struct irq_desc *desc = irq_to_desc(ETHERNET_IRQ);
unsigned long flags;
raw_spin_lock_irqsave(&desc->lock, flags);
@@ -256,7 +256,7 @@ EXPORT_SYMBOL(vr41xx_enable_macint);
void vr41xx_disable_macint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + ETHERNET_IRQ;
+ struct irq_desc *desc = irq_to_desc(ETHERNET_IRQ);
unsigned long flags;
raw_spin_lock_irqsave(&desc->lock, flags);
@@ -268,7 +268,7 @@ EXPORT_SYMBOL(vr41xx_disable_macint);
void vr41xx_enable_dsiuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + DSIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(DSIU_IRQ);
unsigned long flags;
raw_spin_lock_irqsave(&desc->lock, flags);
@@ -280,7 +280,7 @@ EXPORT_SYMBOL(vr41xx_enable_dsiuint);
void vr41xx_disable_dsiuint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + DSIU_IRQ;
+ struct irq_desc *desc = irq_to_desc(DSIU_IRQ);
unsigned long flags;
raw_spin_lock_irqsave(&desc->lock, flags);
@@ -292,7 +292,7 @@ EXPORT_SYMBOL(vr41xx_disable_dsiuint);
void vr41xx_enable_firint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + FIR_IRQ;
+ struct irq_desc *desc = irq_to_desc(FIR_IRQ);
unsigned long flags;
raw_spin_lock_irqsave(&desc->lock, flags);
@@ -304,7 +304,7 @@ EXPORT_SYMBOL(vr41xx_enable_firint);
void vr41xx_disable_firint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + FIR_IRQ;
+ struct irq_desc *desc = irq_to_desc(FIR_IRQ);
unsigned long flags;
raw_spin_lock_irqsave(&desc->lock, flags);
@@ -316,7 +316,7 @@ EXPORT_SYMBOL(vr41xx_disable_firint);
void vr41xx_enable_pciint(void)
{
- struct irq_desc *desc = irq_desc + PCI_IRQ;
+ struct irq_desc *desc = irq_to_desc(PCI_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -332,7 +332,7 @@ EXPORT_SYMBOL(vr41xx_enable_pciint);
void vr41xx_disable_pciint(void)
{
- struct irq_desc *desc = irq_desc + PCI_IRQ;
+ struct irq_desc *desc = irq_to_desc(PCI_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -348,7 +348,7 @@ EXPORT_SYMBOL(vr41xx_disable_pciint);
void vr41xx_enable_scuint(void)
{
- struct irq_desc *desc = irq_desc + SCU_IRQ;
+ struct irq_desc *desc = irq_to_desc(SCU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -364,7 +364,7 @@ EXPORT_SYMBOL(vr41xx_enable_scuint);
void vr41xx_disable_scuint(void)
{
- struct irq_desc *desc = irq_desc + SCU_IRQ;
+ struct irq_desc *desc = irq_to_desc(SCU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -380,7 +380,7 @@ EXPORT_SYMBOL(vr41xx_disable_scuint);
void vr41xx_enable_csiint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + CSI_IRQ;
+ struct irq_desc *desc = irq_to_desc(CSI_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -396,7 +396,7 @@ EXPORT_SYMBOL(vr41xx_enable_csiint);
void vr41xx_disable_csiint(uint16_t mask)
{
- struct irq_desc *desc = irq_desc + CSI_IRQ;
+ struct irq_desc *desc = irq_to_desc(CSI_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -412,7 +412,7 @@ EXPORT_SYMBOL(vr41xx_disable_csiint);
void vr41xx_enable_bcuint(void)
{
- struct irq_desc *desc = irq_desc + BCU_IRQ;
+ struct irq_desc *desc = irq_to_desc(BCU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -428,7 +428,7 @@ EXPORT_SYMBOL(vr41xx_enable_bcuint);
void vr41xx_disable_bcuint(void)
{
- struct irq_desc *desc = irq_desc + BCU_IRQ;
+ struct irq_desc *desc = irq_to_desc(BCU_IRQ);
unsigned long flags;
if (current_cpu_type() == CPU_VR4122 ||
@@ -442,13 +442,15 @@ void vr41xx_disable_bcuint(void)
EXPORT_SYMBOL(vr41xx_disable_bcuint);
-static void disable_sysint1_irq(unsigned int irq)
+static void disable_sysint1_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
}
-static void enable_sysint1_irq(unsigned int irq)
+static void enable_sysint1_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
}
@@ -460,13 +462,15 @@ static struct irq_chip sysint1_irq_type
.unmask = enable_sysint1_irq,
};
-static void disable_sysint2_irq(unsigned int irq)
+static void disable_sysint2_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
}
-static void enable_sysint2_irq(unsigned int irq)
+static void enable_sysint2_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
}
@@ -480,7 +484,7 @@ static struct irq_chip sysint2_irq_type
static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
{
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
uint16_t intassign0, intassign1;
unsigned int pin;
@@ -540,7 +544,7 @@ static inline int set_sysint1_assign(uns
static inline int set_sysint2_assign(unsigned int irq, unsigned char assign)
{
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
uint16_t intassign2, intassign3;
unsigned int pin;
diff -u -p a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -72,12 +72,12 @@ static void irq_dispatch(unsigned int ir
if (cascade->get_irq != NULL) {
unsigned int source_irq = irq;
int ret;
- desc = irq_desc + source_irq;
+ desc = irq_to_desc(source_irq);
if (desc->chip->mask_ack)
- desc->chip->mask_ack(source_irq);
+ desc->chip->mask_ack(desc);
else {
- desc->chip->mask(source_irq);
- desc->chip->ack(source_irq);
+ desc->chip->mask(desc);
+ desc->chip->ack(desc);
}
ret = cascade->get_irq(irq);
irq = ret;
@@ -86,7 +86,7 @@ static void irq_dispatch(unsigned int ir
else
irq_dispatch(irq);
if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
- desc->chip->unmask(source_irq);
+ desc->chip->unmask(desc);
} else
do_IRQ(irq);
}
diff -u -p a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -22,36 +22,41 @@ atomic_t irq_err_count;
/*
* MN10300 interrupt controller operations
*/
-static void mn10300_cpupic_ack(unsigned int irq)
+static void mn10300_cpupic_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u16 tmp;
*(volatile u8 *) &GxICR(irq) = GxICR_DETECT;
tmp = GxICR(irq);
}
-static void mn10300_cpupic_mask(unsigned int irq)
+static void mn10300_cpupic_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u16 tmp = GxICR(irq);
GxICR(irq) = (tmp & GxICR_LEVEL);
tmp = GxICR(irq);
}
-static void mn10300_cpupic_mask_ack(unsigned int irq)
+static void mn10300_cpupic_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u16 tmp = GxICR(irq);
GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
tmp = GxICR(irq);
}
-static void mn10300_cpupic_unmask(unsigned int irq)
+static void mn10300_cpupic_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u16 tmp = GxICR(irq);
GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
tmp = GxICR(irq);
}
-static void mn10300_cpupic_unmask_clear(unsigned int irq)
+static void mn10300_cpupic_unmask_clear(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
/* the MN10300 PIC latches its interrupt request bit, even after the
* device has ceased to assert its interrupt line and the interrupt
* channel has been disabled in the PIC, so for level-triggered
diff -u -p a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -325,14 +325,15 @@ struct mn10300_serial_port *mn10300_seri
* note that we can't just leave the line enabled as the baud rate timer *also*
* generates interrupts
*/
-static void mn10300_serial_mask_ack(unsigned int irq)
+static void mn10300_serial_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u16 tmp;
GxICR(irq) = GxICR_LEVEL_6;
tmp = GxICR(irq); /* flush write buffer */
}
-static void mn10300_serial_nop(unsigned int irq)
+static void mn10300_serial_nop(struct irq_desc *unused)
{
}
@@ -862,7 +863,7 @@ static int mn10300_serial_startup(struct
if (request_irq(port->tm_irq, mn10300_serial_interrupt,
IRQF_DISABLED, port->tm_name, port) < 0)
goto error3;
- mn10300_serial_mask_ack(port->tm_irq);
+ mn10300_serial_mask_ack(irq_to_desc(port->tm_irq));
return 0;
diff -u -p a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -52,8 +52,9 @@ static volatile unsigned long cpu_eiem =
*/
static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
-static void cpu_disable_irq(unsigned int irq)
+static void cpu_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long eirr_bit = EIEM_MASK(irq);
cpu_eiem &= ~eirr_bit;
@@ -63,8 +64,9 @@ static void cpu_disable_irq(unsigned int
* then gets disabled */
}
-static void cpu_enable_irq(unsigned int irq)
+static void cpu_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long eirr_bit = EIEM_MASK(irq);
cpu_eiem |= eirr_bit;
@@ -75,17 +77,18 @@ static void cpu_enable_irq(unsigned int
smp_send_all_nop();
}
-static unsigned int cpu_startup_irq(unsigned int irq)
+static unsigned int cpu_startup_irq(struct irq_desc *desc)
{
- cpu_enable_irq(irq);
+ cpu_enable_irq(desc);
return 0;
}
void no_ack_irq(unsigned int irq) { }
void no_end_irq(unsigned int irq) { }
-void cpu_ack_irq(unsigned int irq)
+void cpu_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask = EIEM_MASK(irq);
int cpu = smp_processor_id();
@@ -99,8 +102,9 @@ void cpu_ack_irq(unsigned int irq)
mtctl(mask, 23);
}
-void cpu_end_irq(unsigned int irq)
+void cpu_end_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long mask = EIEM_MASK(irq);
int cpu = smp_processor_id();
@@ -130,15 +134,16 @@ int cpu_check_affinity(unsigned int irq,
return cpu_dest;
}
-static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
+static int cpu_set_affinity_irq(struct irq_desc *desc, const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
int cpu_dest;
cpu_dest = cpu_check_affinity(irq, dest);
if (cpu_dest < 0)
return -1;
- cpumask_copy(irq_desc[irq].affinity, dest);
+ cpumask_copy(desc->affinity, dest);
return 0;
}
diff -u -p a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -376,10 +376,10 @@ void default_machine_crash_shutdown(stru
struct irq_desc *desc = irq_to_desc(i);
if (desc->status & IRQ_INPROGRESS)
- desc->chip->eoi(i);
+ desc->chip->eoi(desc);
if (!(desc->status & IRQ_DISABLED))
- desc->chip->disable(i);
+ desc->chip->disable(desc);
}
/*
diff -u -p a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -309,7 +309,7 @@ void fixup_irqs(cpumask_t map)
mask = map;
}
if (desc->chip->set_affinity)
- desc->chip->set_affinity(irq, &mask);
+ desc->chip->set_affinity(desc, &mask);
else if (desc->action && !(warned++))
printk("Cannot set affinity for irq %i\n", irq);
}
diff -u -p a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
--- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -59,8 +59,9 @@ irq_to_pic_bit(unsigned int irq)
}
static void
-cpld_mask_irq(unsigned int irq)
+cpld_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
@@ -69,8 +70,9 @@ cpld_mask_irq(unsigned int irq)
}
static void
-cpld_unmask_irq(unsigned int irq)
+cpld_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
diff -u -p a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
--- a/arch/powerpc/platforms/52xx/media5200.c
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -49,8 +49,9 @@ struct media5200_irq {
};
struct media5200_irq media5200_irq;
-static void media5200_irq_unmask(unsigned int virq)
+static void media5200_irq_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
u32 val;
@@ -61,8 +62,9 @@ static void media5200_irq_unmask(unsigne
spin_unlock_irqrestore(&media5200_irq.lock, flags);
}
-static void media5200_irq_mask(unsigned int virq)
+static void media5200_irq_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
u32 val;
@@ -87,7 +89,7 @@ void media5200_irq_cascade(unsigned int
/* Mask off the cascaded IRQ */
raw_spin_lock(&desc->lock);
- desc->chip->mask(virq);
+ desc->chip->mask(irq_to_desc(virq));
raw_spin_unlock(&desc->lock);
/* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs
@@ -105,9 +107,9 @@ void media5200_irq_cascade(unsigned int
/* Processing done; can reenable the cascade now */
raw_spin_lock(&desc->lock);
- desc->chip->ack(virq);
+ desc->chip->ack(irq_to_desc(virq));
if (!(desc->status & IRQ_DISABLED))
- desc->chip->unmask(virq);
+ desc->chip->unmask(irq_to_desc(virq));
raw_spin_unlock(&desc->lock);
}
diff -u -p a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -133,8 +133,9 @@ DEFINE_MUTEX(mpc52xx_gpt_list_mutex);
* Cascaded interrupt controller hooks
*/
-static void mpc52xx_gpt_irq_unmask(unsigned int virq)
+static void mpc52xx_gpt_irq_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
unsigned long flags;
@@ -143,8 +144,9 @@ static void mpc52xx_gpt_irq_unmask(unsig
spin_unlock_irqrestore(&gpt->lock, flags);
}
-static void mpc52xx_gpt_irq_mask(unsigned int virq)
+static void mpc52xx_gpt_irq_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
unsigned long flags;
@@ -153,15 +155,17 @@ static void mpc52xx_gpt_irq_mask(unsigne
spin_unlock_irqrestore(&gpt->lock, flags);
}
-static void mpc52xx_gpt_irq_ack(unsigned int virq)
+static void mpc52xx_gpt_irq_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);
}
-static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc52xx_gpt_irq_set_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int virq = desc->irq;
struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
unsigned long flags;
u32 reg;
diff -u -p a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -155,8 +155,9 @@ static inline void io_be_clrbit(u32 __io
/*
* IRQ[0-3] interrupt irq_chip
*/
-static void mpc52xx_extirq_mask(unsigned int virq)
+static void mpc52xx_extirq_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -166,8 +167,9 @@ static void mpc52xx_extirq_mask(unsigned
io_be_clrbit(&intr->ctrl, 11 - l2irq);
}
-static void mpc52xx_extirq_unmask(unsigned int virq)
+static void mpc52xx_extirq_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -177,8 +179,9 @@ static void mpc52xx_extirq_unmask(unsign
io_be_setbit(&intr->ctrl, 11 - l2irq);
}
-static void mpc52xx_extirq_ack(unsigned int virq)
+static void mpc52xx_extirq_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -188,8 +191,9 @@ static void mpc52xx_extirq_ack(unsigned
io_be_setbit(&intr->ctrl, 27-l2irq);
}
-static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc52xx_extirq_set_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int virq = desc->irq;
u32 ctrl_reg, type;
int irq;
int l2irq;
@@ -230,13 +234,14 @@ static struct irq_chip mpc52xx_extirq_ir
/*
* Main interrupt irq_chip
*/
-static int mpc52xx_null_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc52xx_null_set_type(struct irq_desc *unused, unsigned int flow_type)
{
return 0; /* Do nothing so that the sense mask will get updated */
}
-static void mpc52xx_main_mask(unsigned int virq)
+static void mpc52xx_main_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -246,8 +251,9 @@ static void mpc52xx_main_mask(unsigned i
io_be_setbit(&intr->main_mask, 16 - l2irq);
}
-static void mpc52xx_main_unmask(unsigned int virq)
+static void mpc52xx_main_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -268,8 +274,9 @@ static struct irq_chip mpc52xx_main_irqc
/*
* Peripherals interrupt irq_chip
*/
-static void mpc52xx_periph_mask(unsigned int virq)
+static void mpc52xx_periph_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -279,8 +286,9 @@ static void mpc52xx_periph_mask(unsigned
io_be_setbit(&intr->per_mask, 31 - l2irq);
}
-static void mpc52xx_periph_unmask(unsigned int virq)
+static void mpc52xx_periph_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -301,8 +309,9 @@ static struct irq_chip mpc52xx_periph_ir
/*
* SDMA interrupt irq_chip
*/
-static void mpc52xx_sdma_mask(unsigned int virq)
+static void mpc52xx_sdma_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -312,8 +321,9 @@ static void mpc52xx_sdma_mask(unsigned i
io_be_setbit(&sdma->IntMask, l2irq);
}
-static void mpc52xx_sdma_unmask(unsigned int virq)
+static void mpc52xx_sdma_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
@@ -323,8 +333,9 @@ static void mpc52xx_sdma_unmask(unsigned
io_be_clrbit(&sdma->IntMask, l2irq);
}
-static void mpc52xx_sdma_ack(unsigned int virq)
+static void mpc52xx_sdma_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq;
int l2irq;
diff -u -p a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -38,8 +38,9 @@ struct pq2ads_pci_pic {
#define NUM_IRQS 32
-static void pq2ads_pci_mask_irq(unsigned int virq)
+static void pq2ads_pci_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
int irq = NUM_IRQS - virq_to_hw(virq) - 1;
@@ -54,8 +55,9 @@ static void pq2ads_pci_mask_irq(unsigned
}
}
-static void pq2ads_pci_unmask_irq(unsigned int virq)
+static void pq2ads_pci_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
int irq = NUM_IRQS - virq_to_hw(virq) - 1;
diff -u -p a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -61,7 +61,7 @@ static void cpm2_cascade(unsigned int ir
while ((cascade_irq = cpm2_get_irq()) >= 0)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
static void __init ksi8560_pic_init(void)
diff -u -p a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -55,7 +55,7 @@ static void cpm2_cascade(unsigned int ir
while ((cascade_irq = cpm2_get_irq()) >= 0)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
#endif /* CONFIG_CPM2 */
diff -u -p a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -52,7 +52,7 @@ static void mpc85xx_8259_cascade(unsigne
if (cascade_irq != NO_IRQ) {
generic_handle_irq(cascade_irq);
}
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
#endif /* CONFIG_PPC_I8259 */
diff -u -p a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -46,7 +46,7 @@ static void cpm2_cascade(unsigned int ir
while ((cascade_irq = cpm2_get_irq()) >= 0)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
#endif /* CONFIG_CPM2 */
diff -u -p a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -103,12 +103,13 @@ void socrates_fpga_pic_cascade(unsigned
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
-static void socrates_fpga_pic_ack(unsigned int virq)
+static void socrates_fpga_pic_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq, irq_line;
uint32_t mask;
@@ -124,8 +125,9 @@ static void socrates_fpga_pic_ack(unsign
raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
}
-static void socrates_fpga_pic_mask(unsigned int virq)
+static void socrates_fpga_pic_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq;
int irq_line;
@@ -142,8 +144,9 @@ static void socrates_fpga_pic_mask(unsig
raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
}
-static void socrates_fpga_pic_mask_ack(unsigned int virq)
+static void socrates_fpga_pic_mask_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq;
int irq_line;
@@ -161,8 +164,9 @@ static void socrates_fpga_pic_mask_ack(u
raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
}
-static void socrates_fpga_pic_unmask(unsigned int virq)
+static void socrates_fpga_pic_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq;
int irq_line;
@@ -179,8 +183,9 @@ static void socrates_fpga_pic_unmask(uns
raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
}
-static void socrates_fpga_pic_eoi(unsigned int virq)
+static void socrates_fpga_pic_eoi(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq;
int irq_line;
@@ -197,9 +202,10 @@ static void socrates_fpga_pic_eoi(unsign
raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
}
-static int socrates_fpga_pic_set_type(unsigned int virq,
+static int socrates_fpga_pic_set_type(struct irq_desc *desc,
unsigned int flow_type)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq;
int polarity;
diff -u -p a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -51,7 +51,7 @@ static void cpm2_cascade(unsigned int ir
while ((cascade_irq = cpm2_get_irq()) >= 0)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
#endif /* CONFIG_CPM2 */
diff -u -p a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -49,7 +49,7 @@ static void cpm2_cascade(unsigned int ir
while ((cascade_irq = cpm2_get_irq()) >= 0)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
#endif /* CONFIG_CPM2 */
diff -u -p a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -106,12 +106,13 @@ void gef_pic_cascade(unsigned int irq, s
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
-static void gef_pic_mask(unsigned int virq)
+static void gef_pic_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq;
u32 mask;
@@ -125,16 +126,17 @@ static void gef_pic_mask(unsigned int vi
raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
}
-static void gef_pic_mask_ack(unsigned int virq)
+static void gef_pic_mask_ack(struct irq_desc *desc)
{
/* Don't think we actually have to do anything to ack an interrupt,
* we just need to clear down the devices interrupt and it will go away
*/
- gef_pic_mask(virq);
+ gef_pic_mask(desc);
}
-static void gef_pic_unmask(unsigned int virq)
+static void gef_pic_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int hwirq;
u32 mask;
diff -u -p a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
--- a/arch/powerpc/platforms/86xx/pic.c
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -22,7 +22,7 @@ static void mpc86xx_8259_cascade(unsigne
unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
#endif /* CONFIG_PPC_I8259 */
diff -u -p a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -225,9 +225,9 @@ static void cpm_cascade(unsigned int irq
struct irq_desc *cdesc = irq_to_desc(cascade_irq);
generic_handle_irq(cascade_irq);
- cdesc->chip->eoi(cascade_irq);
+ cdesc->chip->eoi(cdesc);
}
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
/* Initialize the internal interrupt controllers. The number of
diff -u -p a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -144,7 +144,7 @@ static void axon_msi_cascade(unsigned in
msic->read_offset &= MSIC_FIFO_SIZE_MASK;
}
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
static struct axon_msic *find_msi_translator(struct pci_dev *dev)
diff -u -p a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -61,8 +61,9 @@ static inline void beatic_update_irq_mas
panic("Failed to set mask IRQ!");
}
-static void beatic_mask_irq(unsigned int irq_plug)
+static void beatic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq_plug = desc->irq;
unsigned long flags;
raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
@@ -71,8 +72,9 @@ static void beatic_mask_irq(unsigned int
raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
}
-static void beatic_unmask_irq(unsigned int irq_plug)
+static void beatic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq_plug = desc->irq;
unsigned long flags;
raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
@@ -91,8 +93,9 @@ static void beatic_ack_irq(unsigned int
raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
}
-static void beatic_end_irq(unsigned int irq_plug)
+static void beatic_end_irq(struct irq_desc *desc)
{
+ unsigned int irq_plug = desc->irq;
s64 err;
unsigned long flags;
diff -u -p a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -72,15 +72,15 @@ static irq_hw_number_t iic_pending_to_hw
return (node << IIC_IRQ_NODE_SHIFT) | (class << 4) | unit;
}
-static void iic_mask(unsigned int irq)
+static void iic_mask(struct irq_desc *unused)
{
}
-static void iic_unmask(unsigned int irq)
+static void iic_unmask(struct irq_desc *unused)
{
}
-static void iic_eoi(unsigned int irq)
+static void iic_eoi(struct irq_desc *unused)
{
struct iic *iic = &__get_cpu_var(cpu_iic);
out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
@@ -95,7 +95,7 @@ static struct irq_chip iic_chip = {
};
-static void iic_ioexc_eoi(unsigned int irq)
+static void iic_ioexc_eoi(struct irq_desc *unused)
{
}
@@ -128,7 +128,7 @@ static void iic_ioexc_cascade(unsigned i
if (ack)
out_be64(&node_iic->iic_is, ack);
}
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
@@ -275,7 +275,7 @@ static void handle_iic_irq(unsigned int
desc->status &= ~IRQ_INPROGRESS;
out_eoi:
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
raw_spin_unlock(&desc->lock);
}
diff -u -p a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -182,7 +182,7 @@ static void cell_mpic_cascade(unsigned i
virq = mpic_get_one_irq(mpic);
if (virq != NO_IRQ)
generic_handle_irq(virq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
static void __init mpic_init_IRQ(void)
diff -u -p a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -79,30 +79,33 @@ static void __iomem *spider_get_irq_conf
return pic->regs + TIR_CFGA + 8 * src;
}
-static void spider_unmask_irq(unsigned int virq)
+static void spider_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct spider_pic *pic = spider_virq_to_pic(virq);
void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
out_be32(cfg, in_be32(cfg) | 0x30000000u);
}
-static void spider_mask_irq(unsigned int virq)
+static void spider_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct spider_pic *pic = spider_virq_to_pic(virq);
void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
out_be32(cfg, in_be32(cfg) & ~0x30000000u);
}
-static void spider_ack_irq(unsigned int virq)
+static void spider_ack_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct spider_pic *pic = spider_virq_to_pic(virq);
unsigned int src = irq_map[virq].hwirq;
/* Reset edge detection logic if necessary
*/
- if (irq_to_desc(virq)->status & IRQ_LEVEL)
+ if (desc->status & IRQ_LEVEL)
return;
/* Only interrupts 47 to 50 can be set to edge */
@@ -113,13 +116,13 @@ static void spider_ack_irq(unsigned int
out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf));
}
-static int spider_set_irq_type(unsigned int virq, unsigned int type)
+static int spider_set_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int virq = desc->irq;
unsigned int sense = type & IRQ_TYPE_SENSE_MASK;
struct spider_pic *pic = spider_virq_to_pic(virq);
unsigned int hw = irq_map[virq].hwirq;
void __iomem *cfg = spider_get_irq_config(pic, hw);
- struct irq_desc *desc = irq_to_desc(virq);
u32 old_mask;
u32 ic;
@@ -217,7 +220,7 @@ static void spider_irq_cascade(unsigned
virq = irq_linear_revmap(pic->host, cs);
if (virq != NO_IRQ)
generic_handle_irq(virq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
/* For hooking up the cascace we have a problem. Our device-tree is
diff -u -p a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -369,7 +369,7 @@ static void chrp_8259_cascade(unsigned i
unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
/*
diff -u -p a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
--- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
@@ -46,8 +46,9 @@
*
*/
-static void flipper_pic_mask_and_ack(unsigned int virq)
+static void flipper_pic_mask_and_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
u32 mask = 1 << irq;
@@ -57,8 +58,9 @@ static void flipper_pic_mask_and_ack(uns
out_be32(io_base + FLIPPER_ICR, mask);
}
-static void flipper_pic_ack(unsigned int virq)
+static void flipper_pic_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
@@ -66,16 +68,18 @@ static void flipper_pic_ack(unsigned int
out_be32(io_base + FLIPPER_ICR, 1 << irq);
}
-static void flipper_pic_mask(unsigned int virq)
+static void flipper_pic_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
clrbits32(io_base + FLIPPER_IMR, 1 << irq);
}
-static void flipper_pic_unmask(unsigned int virq)
+static void flipper_pic_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
diff -u -p a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -41,8 +41,9 @@
*
*/
-static void hlwd_pic_mask_and_ack(unsigned int virq)
+static void hlwd_pic_mask_and_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
u32 mask = 1 << irq;
@@ -51,24 +52,27 @@ static void hlwd_pic_mask_and_ack(unsign
out_be32(io_base + HW_BROADWAY_ICR, mask);
}
-static void hlwd_pic_ack(unsigned int virq)
+static void hlwd_pic_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
out_be32(io_base + HW_BROADWAY_ICR, 1 << irq);
}
-static void hlwd_pic_mask(unsigned int virq)
+static void hlwd_pic_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq);
}
-static void hlwd_pic_unmask(unsigned int virq)
+static void hlwd_pic_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void __iomem *io_base = get_irq_chip_data(virq);
@@ -133,7 +137,7 @@ static void hlwd_pic_irq_cascade(unsigne
unsigned int virq;
raw_spin_lock(&desc->lock);
- desc->chip->mask(cascade_virq); /* IRQ_LEVEL */
+ desc->chip->mask(irq_to_desc(cascade_virq)); /* IRQ_LEVEL */
raw_spin_unlock(&desc->lock);
virq = __hlwd_pic_get_irq(irq_host);
@@ -143,9 +147,9 @@ static void hlwd_pic_irq_cascade(unsigne
pr_err("spurious interrupt!\n");
raw_spin_lock(&desc->lock);
- desc->chip->ack(cascade_virq); /* IRQ_LEVEL */
+ desc->chip->ack(irq_to_desc(cascade_virq)); /* IRQ_LEVEL */
if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
- desc->chip->unmask(cascade_virq);
+ desc->chip->unmask(irq_to_desc(cascade_virq));
raw_spin_unlock(&desc->lock);
}
diff -u -p a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -167,8 +167,9 @@ static void pci_event_handler(struct HvL
* This will be called by device drivers (via enable_IRQ)
* to enable INTA in the bridge interrupt status register.
*/
-static void iseries_enable_IRQ(unsigned int irq)
+static void iseries_enable_IRQ(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 bus, dev_id, function, mask;
const u32 sub_bus = 0;
unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
@@ -184,8 +185,9 @@ static void iseries_enable_IRQ(unsigned
}
/* This is called by iseries_activate_IRQs */
-static unsigned int iseries_startup_IRQ(unsigned int irq)
+static unsigned int iseries_startup_IRQ(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 bus, dev_id, function, mask;
const u32 sub_bus = 0;
unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
@@ -200,7 +202,7 @@ static unsigned int iseries_startup_IRQ(
/* Unmask bridge interrupts in the FISR */
mask = 0x01010000 << function;
HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask);
- iseries_enable_IRQ(irq);
+ iseries_enable_IRQ(desc);
return 0;
}
@@ -218,15 +220,16 @@ void __init iSeries_activate_IRQs()
if (desc && desc->chip && desc->chip->startup) {
raw_spin_lock_irqsave(&desc->lock, flags);
- desc->chip->startup(irq);
+ desc->chip->startup(desc);
raw_spin_unlock_irqrestore(&desc->lock, flags);
}
}
}
/* this is not called anywhere currently */
-static void iseries_shutdown_IRQ(unsigned int irq)
+static void iseries_shutdown_IRQ(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 bus, dev_id, function, mask;
const u32 sub_bus = 0;
unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
@@ -248,8 +251,9 @@ static void iseries_shutdown_IRQ(unsigne
* This will be called by device drivers (via disable_IRQ)
* to disable INTA in the bridge interrupt status register.
*/
-static void iseries_disable_IRQ(unsigned int irq)
+static void iseries_disable_IRQ(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 bus, dev_id, function, mask;
const u32 sub_bus = 0;
unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
@@ -264,8 +268,9 @@ static void iseries_disable_IRQ(unsigned
HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask);
}
-static void iseries_end_IRQ(unsigned int irq)
+static void iseries_end_IRQ(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
diff -u -p a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -78,8 +78,9 @@ static void __pmac_retrigger(unsigned in
}
}
-static void pmac_mask_and_ack_irq(unsigned int virq)
+static void pmac_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned int src = irq_map[virq].hwirq;
unsigned long bit = 1UL << (src & 0x1f);
int i = src >> 5;
@@ -100,8 +101,9 @@ static void pmac_mask_and_ack_irq(unsign
raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
}
-static void pmac_ack_irq(unsigned int virq)
+static void pmac_ack_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned int src = irq_map[virq].hwirq;
unsigned long bit = 1UL << (src & 0x1f);
int i = src >> 5;
@@ -145,15 +147,16 @@ static void __pmac_set_irq_mask(unsigned
/* When an irq gets requested for the first client, if it's an
* edge interrupt, we clear any previous one on the controller
*/
-static unsigned int pmac_startup_irq(unsigned int virq)
+static unsigned int pmac_startup_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int src = irq_map[virq].hwirq;
unsigned long bit = 1UL << (src & 0x1f);
int i = src >> 5;
raw_spin_lock_irqsave(&pmac_pic_lock, flags);
- if ((irq_to_desc(virq)->status & IRQ_LEVEL) == 0)
+ if ((desc->status & IRQ_LEVEL) == 0)
out_le32(&pmac_irq_hw[i]->ack, bit);
__set_bit(src, ppc_cached_irq_mask);
__pmac_set_irq_mask(src, 0);
@@ -162,8 +165,9 @@ static unsigned int pmac_startup_irq(uns
return 0;
}
-static void pmac_mask_irq(unsigned int virq)
+static void pmac_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int src = irq_map[virq].hwirq;
@@ -173,8 +177,9 @@ static void pmac_mask_irq(unsigned int v
raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
}
-static void pmac_unmask_irq(unsigned int virq)
+static void pmac_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
unsigned int src = irq_map[virq].hwirq;
@@ -184,8 +189,9 @@ static void pmac_unmask_irq(unsigned int
raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
}
-static int pmac_retrigger(unsigned int virq)
+static int pmac_retrigger(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned long flags;
raw_spin_lock_irqsave(&pmac_pic_lock, flags);
@@ -437,7 +443,7 @@ static void pmac_u3_cascade(unsigned int
unsigned int cascade_irq = mpic_get_one_irq(mpic);
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
@@ -647,7 +653,7 @@ static int pmacpic_resume(struct sys_dev
mb();
for (i = 0; i < max_real_irqs; ++i)
if (test_bit(i, sleep_save_mask))
- pmac_unmask_irq(i);
+ pmac_unmask_irq(irq_to_desc(i));
return 0;
}
diff -u -p a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -99,8 +99,9 @@ static DEFINE_PER_CPU(struct ps3_private
* Sets ps3_bmp.mask and calls lv1_did_update_interrupt_mask().
*/
-static void ps3_chip_mask(unsigned int virq)
+static void ps3_chip_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct ps3_private *pd = get_irq_chip_data(virq);
unsigned long flags;
@@ -120,8 +121,9 @@ static void ps3_chip_mask(unsigned int v
* Clears ps3_bmp.mask and calls lv1_did_update_interrupt_mask().
*/
-static void ps3_chip_unmask(unsigned int virq)
+static void ps3_chip_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct ps3_private *pd = get_irq_chip_data(virq);
unsigned long flags;
@@ -141,8 +143,9 @@ static void ps3_chip_unmask(unsigned int
* Calls lv1_end_of_interrupt_ext().
*/
-static void ps3_chip_eoi(unsigned int virq)
+static void ps3_chip_eoi(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
const struct ps3_private *pd = get_irq_chip_data(virq);
lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, virq);
}
@@ -202,7 +205,7 @@ static int ps3_virq_setup(enum ps3_cpu_b
goto fail_set;
}
- ps3_chip_mask(*virq);
+ ps3_chip_mask(irq_to_desc(*virq));
return result;
@@ -296,7 +299,7 @@ int ps3_irq_plug_destroy(unsigned int vi
pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
__LINE__, pd->ppe_id, pd->thread_id, virq);
- ps3_chip_mask(virq);
+ ps3_chip_mask(irq_to_desc(virq));
result = lv1_disconnect_irq_plug_ext(pd->ppe_id, pd->thread_id, virq);
@@ -357,7 +360,7 @@ int ps3_event_receive_port_destroy(unsig
pr_debug(" -> %s:%d virq %u\n", __func__, __LINE__, virq);
- ps3_chip_mask(virq);
+ ps3_chip_mask(irq_to_desc(virq));
result = lv1_destruct_event_receive_port(virq_to_hw(virq));
@@ -492,7 +495,7 @@ int ps3_io_irq_destroy(unsigned int virq
int result;
unsigned long outlet = virq_to_hw(virq);
- ps3_chip_mask(virq);
+ ps3_chip_mask(irq_to_desc(virq));
/*
* lv1_destruct_io_irq_outlet() will destroy the IRQ plug,
@@ -553,7 +556,7 @@ int ps3_vuart_irq_destroy(unsigned int v
{
int result;
- ps3_chip_mask(virq);
+ ps3_chip_mask(irq_to_desc(virq));
result = lv1_deconfigure_virtual_uart_irq();
if (result) {
@@ -605,7 +608,7 @@ int ps3_spe_irq_destroy(unsigned int vir
{
int result;
- ps3_chip_mask(virq);
+ ps3_chip_mask(irq_to_desc(virq));
result = ps3_irq_plug_destroy(virq);
BUG_ON(result);
diff -u -p a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -118,7 +118,7 @@ static void pseries_8259_cascade(unsigne
unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
static void __init pseries_setup_i8259_cascade(void)
diff -u -p a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -194,8 +194,9 @@ static int get_irq_server(unsigned int v
#define get_irq_server(virq, cpumask, strict_check) (default_server)
#endif
-static void xics_unmask_irq(unsigned int virq)
+static void xics_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned int irq;
int call_status;
int server;
@@ -207,7 +208,7 @@ static void xics_unmask_irq(unsigned int
if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
return;
- server = get_irq_server(virq, *(irq_to_desc(virq)->affinity), 0);
+ server = get_irq_server(virq, *(desc->affinity), 0);
call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
DEFAULT_PRIORITY);
@@ -227,18 +228,19 @@ static void xics_unmask_irq(unsigned int
}
}
-static unsigned int xics_startup(unsigned int virq)
+static unsigned int xics_startup(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
/*
* The generic MSI code returns with the interrupt disabled on the
* card, using the MSI mask bits. Firmware doesn't appear to unmask
* at that level, so we do it here by hand.
*/
- if (irq_to_desc(virq)->msi_desc)
+ if (desc->msi_desc)
unmask_msi_irq(virq);
/* unmask it */
- xics_unmask_irq(virq);
+ xics_unmask_irq(desc);
return 0;
}
@@ -266,8 +268,9 @@ static void xics_mask_real_irq(unsigned
}
}
-static void xics_mask_irq(unsigned int virq)
+static void xics_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned int irq;
pr_devel("xics: mask virq %d\n", virq);
@@ -363,24 +366,27 @@ static unsigned char pop_cppr(void)
return os_cppr->stack[--os_cppr->index];
}
-static void xics_eoi_direct(unsigned int virq)
+static void xics_eoi_direct(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned int irq = (unsigned int)irq_map[virq].hwirq;
iosync();
direct_xirr_info_set((pop_cppr() << 24) | irq);
}
-static void xics_eoi_lpar(unsigned int virq)
+static void xics_eoi_lpar(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
unsigned int irq = (unsigned int)irq_map[virq].hwirq;
iosync();
lpar_xirr_info_set((pop_cppr() << 24) | irq);
}
-static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
+static int xics_set_affinity(struct irq_desc *desc, const struct cpumask *cpumask)
{
+ unsigned int virq = desc->irq;
unsigned int irq;
int status;
int xics_status[2];
@@ -930,8 +936,8 @@ void xics_migrate_irqs_away(void)
virq, cpu);
/* Reset affinity to all cpus */
- cpumask_setall(irq_to_desc(virq)->affinity);
- desc->chip->set_affinity(virq, cpu_all_mask);
+ cpumask_setall(desc->affinity);
+ desc->chip->set_affinity(desc, cpu_all_mask);
unlock:
raw_spin_unlock_irqrestore(&desc->lock, flags);
}
diff -u -p a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -55,22 +55,25 @@ static cpic8xx_t __iomem *cpic_reg;
static struct irq_host *cpm_pic_host;
-static void cpm_mask_irq(unsigned int irq)
+static void cpm_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec));
}
-static void cpm_unmask_irq(unsigned int irq)
+static void cpm_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec));
}
-static void cpm_end_irq(unsigned int irq)
+static void cpm_end_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec));
diff -u -p a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -78,8 +78,9 @@ static const u_char irq_to_siubit[] = {
24, 25, 26, 27, 28, 29, 30, 31,
};
-static void cpm2_mask_irq(unsigned int virq)
+static void cpm2_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int bit, word;
unsigned int irq_nr = virq_to_hw(virq);
@@ -90,8 +91,9 @@ static void cpm2_mask_irq(unsigned int v
out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
}
-static void cpm2_unmask_irq(unsigned int virq)
+static void cpm2_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int bit, word;
unsigned int irq_nr = virq_to_hw(virq);
@@ -102,8 +104,9 @@ static void cpm2_unmask_irq(unsigned int
out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
}
-static void cpm2_ack(unsigned int virq)
+static void cpm2_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int bit, word;
unsigned int irq_nr = virq_to_hw(virq);
@@ -137,10 +140,10 @@ static void cpm2_end_irq(unsigned int vi
}
}
-static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int cpm2_set_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int virq = desc->irq;
unsigned int src = virq_to_hw(virq);
- struct irq_desc *desc = irq_to_desc(virq);
unsigned int vold, vnew, edibit;
/* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or
diff -u -p a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -39,7 +39,7 @@ static inline u32 fsl_msi_read(u32 __iom
* We do not need this actually. The MSIR register has been read once
* in the cascade interrupt. So, this MSI interrupt has been acked
*/
-static void fsl_msi_end_irq(unsigned int virq)
+static void fsl_msi_end_irq(struct irq_desc *unused)
{
}
@@ -176,10 +176,10 @@ static void fsl_msi_cascade(unsigned int
raw_spin_lock(&desc->lock);
if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
if (desc->chip->mask_ack)
- desc->chip->mask_ack(irq);
+ desc->chip->mask_ack(irq_to_desc(irq));
else {
- desc->chip->mask(irq);
- desc->chip->ack(irq);
+ desc->chip->mask(irq_to_desc(irq));
+ desc->chip->ack(irq_to_desc(irq));
}
}
@@ -217,11 +217,11 @@ static void fsl_msi_cascade(unsigned int
switch (msi_data->feature & FSL_PIC_IP_MASK) {
case FSL_PIC_IP_MPIC:
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
break;
case FSL_PIC_IP_IPIC:
if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
break;
}
unlock:
diff -u -p a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -78,8 +78,9 @@ unsigned int i8259_irq(void)
return irq;
}
-static void i8259_mask_and_ack_irq(unsigned int irq_nr)
+static void i8259_mask_and_ack_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned long flags;
raw_spin_lock_irqsave(&i8259_lock, flags);
@@ -104,8 +105,9 @@ static void i8259_set_irq_mask(int irq_n
outb(cached_21,0x21);
}
-static void i8259_mask_irq(unsigned int irq_nr)
+static void i8259_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned long flags;
pr_debug("i8259_mask_irq(%d)\n", irq_nr);
@@ -119,8 +121,9 @@ static void i8259_mask_irq(unsigned int
raw_spin_unlock_irqrestore(&i8259_lock, flags);
}
-static void i8259_unmask_irq(unsigned int irq_nr)
+static void i8259_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned long flags;
pr_debug("i8259_unmask_irq(%d)\n", irq_nr);
@@ -188,7 +191,7 @@ static int i8259_host_map(struct irq_hos
static void i8259_host_unmap(struct irq_host *h, unsigned int virq)
{
/* Make sure irq is masked in hardware */
- i8259_mask_irq(virq);
+ i8259_mask_irq(irq_to_desc(virq));
/* remove chip and handler */
set_irq_chip_and_handler(virq, NULL, NULL);
diff -u -p a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -523,8 +523,9 @@ static inline struct ipic * ipic_from_ir
#define ipic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
-static void ipic_unmask_irq(unsigned int virq)
+static void ipic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct ipic *ipic = ipic_from_irq(virq);
unsigned int src = ipic_irq_to_hw(virq);
unsigned long flags;
@@ -539,8 +540,9 @@ static void ipic_unmask_irq(unsigned int
raw_spin_unlock_irqrestore(&ipic_lock, flags);
}
-static void ipic_mask_irq(unsigned int virq)
+static void ipic_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct ipic *ipic = ipic_from_irq(virq);
unsigned int src = ipic_irq_to_hw(virq);
unsigned long flags;
@@ -559,8 +561,9 @@ static void ipic_mask_irq(unsigned int v
raw_spin_unlock_irqrestore(&ipic_lock, flags);
}
-static void ipic_ack_irq(unsigned int virq)
+static void ipic_ack_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct ipic *ipic = ipic_from_irq(virq);
unsigned int src = ipic_irq_to_hw(virq);
unsigned long flags;
@@ -578,8 +581,9 @@ static void ipic_ack_irq(unsigned int vi
raw_spin_unlock_irqrestore(&ipic_lock, flags);
}
-static void ipic_mask_irq_and_ack(unsigned int virq)
+static void ipic_mask_irq_and_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct ipic *ipic = ipic_from_irq(virq);
unsigned int src = ipic_irq_to_hw(virq);
unsigned long flags;
@@ -601,11 +605,11 @@ static void ipic_mask_irq_and_ack(unsign
raw_spin_unlock_irqrestore(&ipic_lock, flags);
}
-static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int ipic_set_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int virq = desc->irq;
struct ipic *ipic = ipic_from_irq(virq);
unsigned int src = ipic_irq_to_hw(virq);
- struct irq_desc *desc = irq_to_desc(virq);
unsigned int vold, vnew, edibit;
if (flow_type == IRQ_TYPE_NONE)
diff -u -p a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -25,8 +25,9 @@ static sysconf8xx_t __iomem *siu_reg;
int cpm_get_irq(struct pt_regs *regs);
-static void mpc8xx_unmask_irq(unsigned int virq)
+static void mpc8xx_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int bit, word;
unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
@@ -37,8 +38,9 @@ static void mpc8xx_unmask_irq(unsigned i
out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
}
-static void mpc8xx_mask_irq(unsigned int virq)
+static void mpc8xx_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int bit, word;
unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
@@ -49,8 +51,9 @@ static void mpc8xx_mask_irq(unsigned int
out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
}
-static void mpc8xx_ack(unsigned int virq)
+static void mpc8xx_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int bit;
unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
@@ -58,8 +61,9 @@ static void mpc8xx_ack(unsigned int virq
out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
}
-static void mpc8xx_end_irq(unsigned int virq)
+static void mpc8xx_end_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int bit, word;
unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
@@ -70,9 +74,9 @@ static void mpc8xx_end_irq(unsigned int
out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
}
-static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int mpc8xx_set_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
- struct irq_desc *desc = irq_to_desc(virq);
+ unsigned int virq = desc->irq;
desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
diff -u -p a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -663,8 +663,9 @@ static inline void mpic_eoi(struct mpic
*/
-void mpic_unmask_irq(unsigned int irq)
+void mpic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int loops = 100000;
struct mpic *mpic = mpic_from_irq(irq);
unsigned int src = mpic_irq_to_hw(irq);
@@ -683,8 +684,9 @@ void mpic_unmask_irq(unsigned int irq)
} while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
}
-void mpic_mask_irq(unsigned int irq)
+void mpic_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int loops = 100000;
struct mpic *mpic = mpic_from_irq(irq);
unsigned int src = mpic_irq_to_hw(irq);
@@ -704,8 +706,9 @@ void mpic_mask_irq(unsigned int irq)
} while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
}
-void mpic_end_irq(unsigned int irq)
+void mpic_end_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct mpic *mpic = mpic_from_irq(irq);
#ifdef DEBUG_IRQ
@@ -721,39 +724,43 @@ void mpic_end_irq(unsigned int irq)
#ifdef CONFIG_MPIC_U3_HT_IRQS
-static void mpic_unmask_ht_irq(unsigned int irq)
+static void mpic_unmask_ht_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct mpic *mpic = mpic_from_irq(irq);
unsigned int src = mpic_irq_to_hw(irq);
- mpic_unmask_irq(irq);
+ mpic_unmask_irq(desc);
- if (irq_to_desc(irq)->status & IRQ_LEVEL)
+ if (desc->status & IRQ_LEVEL)
mpic_ht_end_irq(mpic, src);
}
-static unsigned int mpic_startup_ht_irq(unsigned int irq)
+static unsigned int mpic_startup_ht_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct mpic *mpic = mpic_from_irq(irq);
unsigned int src = mpic_irq_to_hw(irq);
- mpic_unmask_irq(irq);
- mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
+ mpic_unmask_irq(desc);
+ mpic_startup_ht_interrupt(mpic, src, desc->status);
return 0;
}
-static void mpic_shutdown_ht_irq(unsigned int irq)
+static void mpic_shutdown_ht_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct mpic *mpic = mpic_from_irq(irq);
unsigned int src = mpic_irq_to_hw(irq);
- mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
- mpic_mask_irq(irq);
+ mpic_shutdown_ht_interrupt(mpic, src, desc->status);
+ mpic_mask_irq(desc);
}
-static void mpic_end_ht_irq(unsigned int irq)
+static void mpic_end_ht_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct mpic *mpic = mpic_from_irq(irq);
unsigned int src = mpic_irq_to_hw(irq);
@@ -765,7 +772,7 @@ static void mpic_end_ht_irq(unsigned int
* latched another edge interrupt coming in anyway
*/
- if (irq_to_desc(irq)->status & IRQ_LEVEL)
+ if (desc->status & IRQ_LEVEL)
mpic_ht_end_irq(mpic, src);
mpic_eoi(mpic);
}
@@ -773,8 +780,9 @@ static void mpic_end_ht_irq(unsigned int
#ifdef CONFIG_SMP
-static void mpic_unmask_ipi(unsigned int irq)
+static void mpic_unmask_ipi(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct mpic *mpic = mpic_from_ipi(irq);
unsigned int src = mpic_irq_to_hw(irq) - mpic->ipi_vecs[0];
@@ -782,13 +790,14 @@ static void mpic_unmask_ipi(unsigned int
mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK);
}
-static void mpic_mask_ipi(unsigned int irq)
+static void mpic_mask_ipi(struct irq_desc *unused)
{
/* NEVER disable an IPI... that's just plain wrong! */
}
-static void mpic_end_ipi(unsigned int irq)
+static void mpic_end_ipi(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct mpic *mpic = mpic_from_ipi(irq);
/*
@@ -845,11 +854,11 @@ static unsigned int mpic_type_to_vecpri(
}
}
-int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
+int mpic_set_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int virq = desc->irq;
struct mpic *mpic = mpic_from_irq(virq);
unsigned int src = mpic_irq_to_hw(virq);
- struct irq_desc *desc = irq_to_desc(virq);
unsigned int vecpri, vold, vnew;
DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
diff -u -p a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
--- a/arch/powerpc/sysdev/mpic.h
+++ b/arch/powerpc/sysdev/mpic.h
@@ -34,7 +34,7 @@ static inline int mpic_pasemi_msi_init(s
}
#endif
-extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
+extern int mpic_set_irq_type(struct irq_desc *desc, unsigned int flow_type);
extern void mpic_set_vector(unsigned int virq, unsigned int vector);
extern int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask);
diff -u -p a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -39,15 +39,17 @@
static struct mpic *msi_mpic;
-static void mpic_pasemi_msi_mask_irq(unsigned int irq)
+static void mpic_pasemi_msi_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pr_debug("mpic_pasemi_msi_mask_irq %d\n", irq);
mask_msi_irq(irq);
mpic_mask_irq(irq);
}
-static void mpic_pasemi_msi_unmask_irq(unsigned int irq)
+static void mpic_pasemi_msi_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
pr_debug("mpic_pasemi_msi_unmask_irq %d\n", irq);
mpic_unmask_irq(irq);
unmask_msi_irq(irq);
diff -u -p a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -23,14 +23,16 @@
/* A bit ugly, can we get this from the pci_dev somehow? */
static struct mpic *msi_mpic;
-static void mpic_u3msi_mask_irq(unsigned int irq)
+static void mpic_u3msi_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mask_msi_irq(irq);
mpic_mask_irq(irq);
}
-static void mpic_u3msi_unmask_irq(unsigned int irq)
+static void mpic_u3msi_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
mpic_unmask_irq(irq);
unmask_msi_irq(irq);
}
diff -u -p a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -76,8 +76,9 @@ static struct irq_host *mv64x60_irq_host
* mv64x60_chip_low functions
*/
-static void mv64x60_mask_low(unsigned int virq)
+static void mv64x60_mask_low(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
unsigned long flags;
@@ -89,8 +90,9 @@ static void mv64x60_mask_low(unsigned in
(void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO);
}
-static void mv64x60_unmask_low(unsigned int virq)
+static void mv64x60_unmask_low(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
unsigned long flags;
@@ -113,8 +115,9 @@ static struct irq_chip mv64x60_chip_low
* mv64x60_chip_high functions
*/
-static void mv64x60_mask_high(unsigned int virq)
+static void mv64x60_mask_high(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
unsigned long flags;
@@ -126,8 +129,9 @@ static void mv64x60_mask_high(unsigned i
(void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI);
}
-static void mv64x60_unmask_high(unsigned int virq)
+static void mv64x60_unmask_high(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
unsigned long flags;
@@ -150,8 +154,9 @@ static struct irq_chip mv64x60_chip_high
* mv64x60_chip_gpp functions
*/
-static void mv64x60_mask_gpp(unsigned int virq)
+static void mv64x60_mask_gpp(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
unsigned long flags;
@@ -163,8 +168,9 @@ static void mv64x60_mask_gpp(unsigned in
(void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK);
}
-static void mv64x60_mask_ack_gpp(unsigned int virq)
+static void mv64x60_mask_ack_gpp(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
unsigned long flags;
@@ -178,8 +184,9 @@ static void mv64x60_mask_ack_gpp(unsigne
(void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE);
}
-static void mv64x60_unmask_gpp(unsigned int virq)
+static void mv64x60_unmask_gpp(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
unsigned long flags;
diff -u -p a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -194,8 +194,9 @@ static inline struct qe_ic *qe_ic_from_i
#define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
-static void qe_ic_unmask_irq(unsigned int virq)
+static void qe_ic_unmask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct qe_ic *qe_ic = qe_ic_from_irq(virq);
unsigned int src = virq_to_hw(virq);
unsigned long flags;
@@ -210,8 +211,9 @@ static void qe_ic_unmask_irq(unsigned in
raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
}
-static void qe_ic_mask_irq(unsigned int virq)
+static void qe_ic_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct qe_ic *qe_ic = qe_ic_from_irq(virq);
unsigned int src = virq_to_hw(virq);
unsigned long flags;
diff -u -p a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -344,23 +344,27 @@ static inline unsigned int get_pci_sourc
* Linux descriptor level callbacks
*/
-static void tsi108_pci_irq_enable(u_int irq)
+static void tsi108_pci_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
tsi108_pci_int_unmask(irq);
}
-static void tsi108_pci_irq_disable(u_int irq)
+static void tsi108_pci_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
tsi108_pci_int_mask(irq);
}
-static void tsi108_pci_irq_ack(u_int irq)
+static void tsi108_pci_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
tsi108_pci_int_mask(irq);
}
-static void tsi108_pci_irq_end(u_int irq)
+static void tsi108_pci_irq_end(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
tsi108_pci_int_unmask(irq);
/* Enable interrupts from PCI block */
@@ -441,5 +445,5 @@ void tsi108_irq_cascade(unsigned int irq
unsigned int cascade_irq = get_pci_source();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
diff -u -p a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -55,9 +55,9 @@ struct uic {
struct irq_host *irqhost;
};
-static void uic_unmask_irq(unsigned int virq)
+static void uic_unmask_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(virq);
+ unsigned int virq = desc->irq;
struct uic *uic = get_irq_chip_data(virq);
unsigned int src = uic_irq_to_hw(virq);
unsigned long flags;
@@ -74,8 +74,9 @@ static void uic_unmask_irq(unsigned int
spin_unlock_irqrestore(&uic->lock, flags);
}
-static void uic_mask_irq(unsigned int virq)
+static void uic_mask_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct uic *uic = get_irq_chip_data(virq);
unsigned int src = uic_irq_to_hw(virq);
unsigned long flags;
@@ -88,8 +89,9 @@ static void uic_mask_irq(unsigned int vi
spin_unlock_irqrestore(&uic->lock, flags);
}
-static void uic_ack_irq(unsigned int virq)
+static void uic_ack_irq(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
struct uic *uic = get_irq_chip_data(virq);
unsigned int src = uic_irq_to_hw(virq);
unsigned long flags;
@@ -99,9 +101,9 @@ static void uic_ack_irq(unsigned int vir
spin_unlock_irqrestore(&uic->lock, flags);
}
-static void uic_mask_ack_irq(unsigned int virq)
+static void uic_mask_ack_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(virq);
+ unsigned int virq = desc->irq;
struct uic *uic = get_irq_chip_data(virq);
unsigned int src = uic_irq_to_hw(virq);
unsigned long flags;
@@ -125,18 +127,18 @@ static void uic_mask_ack_irq(unsigned in
spin_unlock_irqrestore(&uic->lock, flags);
}
-static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int uic_set_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int virq = desc->irq;
struct uic *uic = get_irq_chip_data(virq);
unsigned int src = uic_irq_to_hw(virq);
- struct irq_desc *desc = irq_to_desc(virq);
unsigned long flags;
int trigger, polarity;
u32 tr, pr, mask;
switch (flow_type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_NONE:
- uic_mask_irq(virq);
+ uic_mask_irq(desc);
return 0;
case IRQ_TYPE_EDGE_RISING:
@@ -227,9 +229,9 @@ void uic_irq_cascade(unsigned int virq,
raw_spin_lock(&desc->lock);
if (desc->status & IRQ_LEVEL)
- desc->chip->mask(virq);
+ desc->chip->mask(irq_to_desc(virq));
else
- desc->chip->mask_ack(virq);
+ desc->chip->mask_ack(irq_to_desc(virq));
raw_spin_unlock(&desc->lock);
msr = mfdcr(uic->dcrbase + UIC_MSR);
@@ -244,9 +246,9 @@ void uic_irq_cascade(unsigned int virq,
uic_irq_ret:
raw_spin_lock(&desc->lock);
if (desc->status & IRQ_LEVEL)
- desc->chip->ack(virq);
+ desc->chip->ack(irq_to_desc(virq));
if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
- desc->chip->unmask(virq);
+ desc->chip->unmask(irq_to_desc(virq));
raw_spin_unlock(&desc->lock);
}
diff -u -p a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -69,18 +69,17 @@ static unsigned char xilinx_intc_map_sen
*
* IRQ Chip common (across level and edge) operations
*/
-static void xilinx_intc_mask(unsigned int virq)
+static void xilinx_intc_mask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void * regs = get_irq_chip_data(virq);
pr_debug("mask: %d\n", irq);
out_be32(regs + XINTC_CIE, 1 << irq);
}
-static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type)
+static int xilinx_intc_set_type(struct irq_desc *desc, unsigned int flow_type)
{
- struct irq_desc *desc = irq_to_desc(virq);
-
desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
@@ -91,8 +90,9 @@ static int xilinx_intc_set_type(unsigned
/*
* IRQ Chip level operations
*/
-static void xilinx_intc_level_unmask(unsigned int virq)
+static void xilinx_intc_level_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void * regs = get_irq_chip_data(virq);
pr_debug("unmask: %d\n", irq);
@@ -116,16 +116,18 @@ static struct irq_chip xilinx_intc_level
/*
* IRQ Chip edge operations
*/
-static void xilinx_intc_edge_unmask(unsigned int virq)
+static void xilinx_intc_edge_unmask(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void *regs = get_irq_chip_data(virq);
pr_debug("unmask: %d\n", irq);
out_be32(regs + XINTC_SIE, 1 << irq);
}
-static void xilinx_intc_edge_ack(unsigned int virq)
+static void xilinx_intc_edge_ack(struct irq_desc *desc)
{
+ unsigned int virq = desc->irq;
int irq = virq_to_hw(virq);
void * regs = get_irq_chip_data(virq);
pr_debug("ack: %d\n", irq);
@@ -234,7 +236,7 @@ static void xilinx_i8259_cascade(unsigne
generic_handle_irq(cascade_irq);
/* Let xilinx_intc end the interrupt */
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
static void __init xilinx_i8259_setup_cascade(void)
diff -u -p a/arch/score/kernel/irq.c b/arch/score/kernel/irq.c
--- a/arch/score/kernel/irq.c
+++ b/arch/score/kernel/irq.c
@@ -52,8 +52,9 @@ asmlinkage void do_IRQ(int irq)
irq_exit();
}
-static void score_mask(unsigned int irq_nr)
+static void score_mask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int irq_source = 63 - irq_nr;
if (irq_source < 32)
@@ -64,8 +65,9 @@ static void score_mask(unsigned int irq_
(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
}
-static void score_unmask(unsigned int irq_nr)
+static void score_unmask(struct irq_desc *desc)
{
+ unsigned int irq_nr = desc->irq;
unsigned int irq_source = 63 - irq_nr;
if (irq_source < 32)
diff -u -p a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -55,8 +55,9 @@ static struct irqaction cayman_action_pc
.flags = IRQF_DISABLED,
};
-static void enable_cayman_irq(unsigned int irq)
+static void enable_cayman_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
unsigned long mask;
unsigned int reg;
@@ -72,8 +73,9 @@ static void enable_cayman_irq(unsigned i
local_irq_restore(flags);
}
-void disable_cayman_irq(unsigned int irq)
+void disable_cayman_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
unsigned long mask;
unsigned int reg;
@@ -89,9 +91,9 @@ void disable_cayman_irq(unsigned int irq
local_irq_restore(flags);
}
-static void ack_cayman_irq(unsigned int irq)
+static void ack_cayman_irq(struct irq_desc *desc)
{
- disable_cayman_irq(irq);
+ disable_cayman_irq(desc);
}
struct irq_chip cayman_irq_type = {
diff -u -p a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -60,8 +60,9 @@
*/
/* Disable the hardware event by masking its bit in its EMR */
-static inline void disable_systemasic_irq(unsigned int irq)
+static inline void disable_systemasic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
@@ -71,8 +72,9 @@ static inline void disable_systemasic_ir
}
/* Enable the hardware event by setting its bit in its EMR */
-static inline void enable_systemasic_irq(unsigned int irq)
+static inline void enable_systemasic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
__u32 mask;
@@ -82,10 +84,11 @@ static inline void enable_systemasic_irq
}
/* Acknowledge a hardware event by writing its bit back to its ESR */
-static void mask_ack_systemasic_irq(unsigned int irq)
+static void mask_ack_systemasic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
__u32 esr = ESR_BASE + (LEVEL(irq) << 2);
- disable_systemasic_irq(irq);
+ disable_systemasic_irq(desc);
outl((1 << EVENT_BIT(irq)), esr);
}
diff -u -p a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -18,15 +18,17 @@
#include <linux/io.h>
#include <mach-landisk/mach/iodata_landisk.h>
-static void disable_landisk_irq(unsigned int irq)
+static void disable_landisk_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned char mask = 0xff ^ (0x01 << (irq - 5));
__raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
}
-static void enable_landisk_irq(unsigned int irq)
+static void enable_landisk_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned char value = (0x01 << (irq - 5));
__raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
@@ -50,7 +52,7 @@ void __init init_landisk_IRQ(void)
disable_irq_nosync(i);
set_irq_chip_and_handler_name(i, &landisk_irq_chip,
handle_level_irq, "level");
- enable_landisk_irq(i);
+ enable_landisk_irq(irq_to_desc(i));
}
__raw_writeb(0x00, PA_PWRINT_CLR);
}
diff -u -p a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -65,9 +65,9 @@ static const struct {
# error Inconsistancy in defining the IRQ# for primary IDE!
#endif
-static void enable_microdev_irq(unsigned int irq);
-static void disable_microdev_irq(unsigned int irq);
-static void mask_and_ack_microdev(unsigned int);
+static void enable_microdev_irq(struct irq_desc *desc);
+static void disable_microdev_irq(struct irq_desc *desc);
+static void mask_and_ack_microdev(struct irq_desc *);
static struct irq_chip microdev_irq_type = {
.name = "MicroDev-IRQ",
@@ -76,8 +76,9 @@ static struct irq_chip microdev_irq_type
.ack = mask_and_ack_microdev,
};
-static void disable_microdev_irq(unsigned int irq)
+static void disable_microdev_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int fpgaIrq;
if (irq >= NUM_EXTERNAL_IRQS)
@@ -91,8 +92,9 @@ static void disable_microdev_irq(unsigne
__raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
}
-static void enable_microdev_irq(unsigned int irq)
+static void enable_microdev_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long priorityReg, priorities, pri;
unsigned int fpgaIrq;
@@ -121,12 +123,12 @@ static void __init make_microdev_irq(uns
{
disable_irq_nosync(irq);
set_irq_chip_and_handler(irq, µdev_irq_type, handle_level_irq);
- disable_microdev_irq(irq);
+ disable_microdev_irq(irq_to_desc(irq));
}
-static void mask_and_ack_microdev(unsigned int irq)
+static void mask_and_ack_microdev(struct irq_desc *desc)
{
- disable_microdev_irq(irq);
+ disable_microdev_irq(desc);
}
extern void __init init_microdev_irq(void)
diff -u -p a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -25,8 +25,9 @@
#define INTC_IPR01 0xfffe0818
#define INTC_ICR1 0xfffe0802
-static void disable_se7206_irq(unsigned int irq)
+static void disable_se7206_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned short val;
unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq)));
unsigned short msk0,msk1;
@@ -55,8 +56,9 @@ static void disable_se7206_irq(unsigned
__raw_writew(msk1, INTMSK1);
}
-static void enable_se7206_irq(unsigned int irq)
+static void enable_se7206_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned short val;
unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq)));
unsigned short msk0,msk1;
@@ -86,13 +88,13 @@ static void enable_se7206_irq(unsigned i
__raw_writew(msk1, INTMSK1);
}
-static void eoi_se7206_irq(unsigned int irq)
+static void eoi_se7206_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned short sts0,sts1;
- struct irq_desc *desc = irq_to_desc(irq);
if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_se7206_irq(irq);
+ enable_se7206_irq(desc);
/* FPGA isr clear */
sts0 = __raw_readw(INTSTS0);
sts1 = __raw_readw(INTSTS1);
@@ -126,7 +128,7 @@ static void make_se7206_irq(unsigned int
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
handle_level_irq, "level");
- disable_se7206_irq(irq);
+ disable_se7206_irq(irq_to_desc(irq));
}
/*
diff -u -p a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -18,14 +18,16 @@
unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
-static void disable_se7343_irq(unsigned int irq)
+static void disable_se7343_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = (unsigned int)get_irq_chip_data(irq);
__raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
}
-static void enable_se7343_irq(unsigned int irq)
+static void enable_se7343_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = (unsigned int)get_irq_chip_data(irq);
__raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
}
diff -u -p a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -18,14 +18,16 @@
unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
-static void disable_se7722_irq(unsigned int irq)
+static void disable_se7722_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = (unsigned int)get_irq_chip_data(irq);
__raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
}
-static void enable_se7722_irq(unsigned int irq)
+static void enable_se7722_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int bit = (unsigned int)get_irq_chip_data(irq);
__raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
}
diff -u -p a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -68,15 +68,17 @@ static struct fpga_irq get_fpga_irq(unsi
return set;
}
-static void disable_se7724_irq(unsigned int irq)
+static void disable_se7724_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
unsigned int bit = irq - set.base;
__raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
}
-static void enable_se7724_irq(unsigned int irq)
+static void enable_se7724_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
unsigned int bit = irq - set.base;
__raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
diff -u -p a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -24,9 +24,9 @@ static unsigned long *systemh_irq_mask_r
static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
/* forward declaration */
-static void enable_systemh_irq(unsigned int irq);
-static void disable_systemh_irq(unsigned int irq);
-static void mask_and_ack_systemh(unsigned int);
+static void enable_systemh_irq(struct irq_desc *unused);
+static void disable_systemh_irq(struct irq_desc *unused);
+static void mask_and_ack_systemh(struct irq_desc *);
static struct irq_chip systemh_irq_type = {
.name = " SystemH Register",
@@ -35,7 +35,7 @@ static struct irq_chip systemh_irq_type
.ack = mask_and_ack_systemh,
};
-static void disable_systemh_irq(unsigned int irq)
+static void disable_systemh_irq(struct irq_desc *unused)
{
if (systemh_irq_mask_register) {
unsigned long val, mask = 0x01 << 1;
@@ -51,7 +51,7 @@ static void disable_systemh_irq(unsigned
}
}
-static void enable_systemh_irq(unsigned int irq)
+static void enable_systemh_irq(struct irq_desc *unused)
{
if (systemh_irq_mask_register) {
unsigned long val, mask = 0x01 << 1;
@@ -63,14 +63,14 @@ static void enable_systemh_irq(unsigned
}
}
-static void mask_and_ack_systemh(unsigned int irq)
+static void mask_and_ack_systemh(struct irq_desc *desc)
{
- disable_systemh_irq(irq);
+ disable_systemh_irq(desc);
}
void make_systemh_irq(unsigned int irq)
{
disable_irq_nosync(irq);
set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
- disable_systemh_irq(irq);
+ disable_systemh_irq(irq_to_desc(irq));
}
diff -u -p a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -17,8 +17,9 @@
/* This belongs in cpu specific */
#define INTC_ICR1 0xA4140010UL
-static void hd64461_mask_irq(unsigned int irq)
+static void hd64461_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned short nimr;
unsigned short mask = 1 << (irq - HD64461_IRQBASE);
@@ -27,8 +28,9 @@ static void hd64461_mask_irq(unsigned in
__raw_writew(nimr, HD64461_NIMR);
}
-static void hd64461_unmask_irq(unsigned int irq)
+static void hd64461_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned short nimr;
unsigned short mask = 1 << (irq - HD64461_IRQBASE);
@@ -37,9 +39,10 @@ static void hd64461_unmask_irq(unsigned
__raw_writew(nimr, HD64461_NIMR);
}
-static void hd64461_mask_and_ack_irq(unsigned int irq)
+static void hd64461_mask_and_ack_irq(struct irq_desc *desc)
{
- hd64461_mask_irq(irq);
+ unsigned int irq = desc->irq;
+ hd64461_mask_irq(desc);
#ifdef CONFIG_HD64461_ENABLER
if (irq == HD64461_IRQBASE + 13)
__raw_writeb(0x00, HD64461_PCC1CSCR);
diff -u -p a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c
--- a/arch/sh/kernel/cpu/irq/imask.c
+++ b/arch/sh/kernel/cpu/irq/imask.c
@@ -51,16 +51,18 @@ static inline void set_interrupt_registe
: "t");
}
-static void mask_imask_irq(unsigned int irq)
+static void mask_imask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
clear_bit(irq, imask_mask);
if (interrupt_priority < IMASK_PRIORITY - irq)
interrupt_priority = IMASK_PRIORITY - irq;
set_interrupt_registers(interrupt_priority);
}
-static void unmask_imask_irq(unsigned int irq)
+static void unmask_imask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_bit(irq, imask_mask);
interrupt_priority = IMASK_PRIORITY -
find_first_zero_bit(imask_mask, IMASK_PRIORITY);
diff -u -p a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -77,12 +77,12 @@ int intc_evt_to_irq[(0xE20/0x20)+1] = {
static unsigned long intc_virt;
-static unsigned int startup_intc_irq(unsigned int irq);
-static void shutdown_intc_irq(unsigned int irq);
-static void enable_intc_irq(unsigned int irq);
-static void disable_intc_irq(unsigned int irq);
-static void mask_and_ack_intc(unsigned int);
-static void end_intc_irq(unsigned int irq);
+static unsigned int startup_intc_irq(struct irq_desc *desc);
+static void shutdown_intc_irq(struct irq_desc *desc);
+static void enable_intc_irq(struct irq_desc *desc);
+static void disable_intc_irq(struct irq_desc *desc);
+static void mask_and_ack_intc(struct irq_desc *);
+static void end_intc_irq(struct irq_desc *desc);
static struct irq_chip intc_irq_type = {
.name = "INTC",
@@ -96,19 +96,20 @@ static struct irq_chip intc_irq_type = {
static int irlm; /* IRL mode */
-static unsigned int startup_intc_irq(unsigned int irq)
+static unsigned int startup_intc_irq(struct irq_desc *desc)
{
- enable_intc_irq(irq);
+ enable_intc_irq(desc);
return 0; /* never anything pending */
}
-static void shutdown_intc_irq(unsigned int irq)
+static void shutdown_intc_irq(struct irq_desc *desc)
{
- disable_intc_irq(irq);
+ disable_intc_irq(desc);
}
-static void enable_intc_irq(unsigned int irq)
+static void enable_intc_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long reg;
unsigned long bitmask;
@@ -126,8 +127,9 @@ static void enable_intc_irq(unsigned int
__raw_writel(bitmask, reg);
}
-static void disable_intc_irq(unsigned int irq)
+static void disable_intc_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long reg;
unsigned long bitmask;
@@ -142,14 +144,14 @@ static void disable_intc_irq(unsigned in
__raw_writel(bitmask, reg);
}
-static void mask_and_ack_intc(unsigned int irq)
+static void mask_and_ack_intc(struct irq_desc *desc)
{
- disable_intc_irq(irq);
+ disable_intc_irq(desc);
}
-static void end_intc_irq(unsigned int irq)
+static void end_intc_irq(struct irq_desc *desc)
{
- enable_intc_irq(irq);
+ enable_intc_irq(desc);
}
void __init plat_irq_setup(void)
diff -u -p a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -272,8 +272,9 @@ static int irq_choose_cpu(unsigned int v
real_hard_smp_processor_id()
#endif
-static void sun4u_irq_enable(unsigned int virt_irq)
+static void sun4u_irq_enable(struct irq_desc *desc)
{
+ unsigned int virt_irq = desc->irq;
struct irq_handler_data *data = get_irq_chip_data(virt_irq);
if (likely(data)) {
@@ -281,7 +282,7 @@ static void sun4u_irq_enable(unsigned in
unsigned int tid;
cpuid = irq_choose_cpu(virt_irq,
- irq_desc[virt_irq].affinity);
+ desc->affinity);
imap = data->imap;
tid = sun4u_compute_tid(imap, cpuid);
@@ -295,9 +296,10 @@ static void sun4u_irq_enable(unsigned in
}
}
-static int sun4u_set_affinity(unsigned int virt_irq,
+static int sun4u_set_affinity(struct irq_desc *desc,
const struct cpumask *mask)
{
+ unsigned int virt_irq = desc->irq;
struct irq_handler_data *data = get_irq_chip_data(virt_irq);
if (likely(data)) {
@@ -337,14 +339,14 @@ static int sun4u_set_affinity(unsigned i
* sees that, it also hooks up a default ->shutdown method which
* invokes ->mask() which we do not want. See irq_chip_set_defaults().
*/
-static void sun4u_irq_disable(unsigned int virt_irq)
+static void sun4u_irq_disable(struct irq_desc *unused)
{
}
-static void sun4u_irq_eoi(unsigned int virt_irq)
+static void sun4u_irq_eoi(struct irq_desc *desc)
{
+ unsigned int virt_irq = desc->irq;
struct irq_handler_data *data = get_irq_chip_data(virt_irq);
- struct irq_desc *desc = irq_desc + virt_irq;
if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
return;
@@ -353,11 +355,12 @@ static void sun4u_irq_eoi(unsigned int v
upa_writeq(ICLR_IDLE, data->iclr);
}
-static void sun4v_irq_enable(unsigned int virt_irq)
+static void sun4v_irq_enable(struct irq_desc *desc)
{
+ unsigned int virt_irq = desc->irq;
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
unsigned long cpuid = irq_choose_cpu(virt_irq,
- irq_desc[virt_irq].affinity);
+ desc->affinity);
int err;
err = sun4v_intr_settarget(ino, cpuid);
@@ -374,9 +377,10 @@ static void sun4v_irq_enable(unsigned in
ino, err);
}
-static int sun4v_set_affinity(unsigned int virt_irq,
+static int sun4v_set_affinity(struct irq_desc *desc,
const struct cpumask *mask)
{
+ unsigned int virt_irq = desc->irq;
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
unsigned long cpuid = irq_choose_cpu(virt_irq, mask);
int err;
@@ -389,8 +393,9 @@ static int sun4v_set_affinity(unsigned i
return 0;
}
-static void sun4v_irq_disable(unsigned int virt_irq)
+static void sun4v_irq_disable(struct irq_desc *desc)
{
+ unsigned int virt_irq = desc->irq;
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
int err;
@@ -400,10 +405,10 @@ static void sun4v_irq_disable(unsigned i
"err(%d)\n", ino, err);
}
-static void sun4v_irq_eoi(unsigned int virt_irq)
+static void sun4v_irq_eoi(struct irq_desc *desc)
{
+ unsigned int virt_irq = desc->irq;
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
- struct irq_desc *desc = irq_desc + virt_irq;
int err;
if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
@@ -415,12 +420,13 @@ static void sun4v_irq_eoi(unsigned int v
"err(%d)\n", ino, err);
}
-static void sun4v_virq_enable(unsigned int virt_irq)
+static void sun4v_virq_enable(struct irq_desc *desc)
{
+ unsigned int virt_irq = desc->irq;
unsigned long cpuid, dev_handle, dev_ino;
int err;
- cpuid = irq_choose_cpu(virt_irq, irq_desc[virt_irq].affinity);
+ cpuid = irq_choose_cpu(virt_irq, desc->affinity);
dev_handle = virt_irq_table[virt_irq].dev_handle;
dev_ino = virt_irq_table[virt_irq].dev_ino;
@@ -444,9 +450,10 @@ static void sun4v_virq_enable(unsigned i
dev_handle, dev_ino, err);
}
-static int sun4v_virt_set_affinity(unsigned int virt_irq,
+static int sun4v_virt_set_affinity(struct irq_desc *desc,
const struct cpumask *mask)
{
+ unsigned int virt_irq = desc->irq;
unsigned long cpuid, dev_handle, dev_ino;
int err;
@@ -464,8 +471,9 @@ static int sun4v_virt_set_affinity(unsig
return 0;
}
-static void sun4v_virq_disable(unsigned int virt_irq)
+static void sun4v_virq_disable(struct irq_desc *desc)
{
+ unsigned int virt_irq = desc->irq;
unsigned long dev_handle, dev_ino;
int err;
@@ -480,9 +488,9 @@ static void sun4v_virq_disable(unsigned
dev_handle, dev_ino, err);
}
-static void sun4v_virq_eoi(unsigned int virt_irq)
+static void sun4v_virq_eoi(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_desc + virt_irq;
+ unsigned int virt_irq = desc->irq;
unsigned long dev_handle, dev_ino;
int err;
@@ -540,7 +548,7 @@ void irq_install_pre_handler(int virt_ir
void *arg1, void *arg2)
{
struct irq_handler_data *data = get_irq_chip_data(virt_irq);
- struct irq_desc *desc = irq_desc + virt_irq;
+ struct irq_desc *desc = irq_to_desc(virt_irq);
data->pre_handler = func;
data->arg1 = arg1;
@@ -666,7 +674,7 @@ unsigned int sun4v_build_virq(u32 devhan
* especially wrt. locking, we do not let request_irq() enable
* the interrupt.
*/
- desc = irq_desc + virt_irq;
+ desc = irq_to_desc(virt_irq);
desc->status |= IRQ_NOAUTOEN;
set_irq_chip_data(virt_irq, data);
@@ -754,7 +762,7 @@ void handler_irq(int irq, struct pt_regs
virt_irq = bucket_get_virt_irq(bucket_pa);
bucket_clear_chain_pa(bucket_pa);
- desc = irq_desc + virt_irq;
+ desc = irq_to_desc(virt_irq);
if (!(desc->status & IRQ_DISABLED))
desc->handle_irq(virt_irq, desc);
@@ -806,7 +814,7 @@ void fixup_irqs(void)
if (irq_desc[irq].action &&
!(irq_desc[irq].status & IRQ_PER_CPU)) {
if (irq_desc[irq].chip->set_affinity)
- irq_desc[irq].chip->set_affinity(irq,
+ irq_desc[irq].chip->set_affinity(irq_to_desc(irq),
irq_desc[irq].affinity);
}
raw_spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
diff -u -p a/arch/sparc/kernel/pci_msi.c b/arch/sparc/kernel/pci_msi.c
--- a/arch/sparc/kernel/pci_msi.c
+++ b/arch/sparc/kernel/pci_msi.c
@@ -33,7 +33,7 @@ static irqreturn_t sparc64_msiq_interrup
unsigned int virt_irq;
virt_irq = pbm->msi_irq_table[msi - pbm->msi_first];
- desc = irq_desc + virt_irq;
+ desc = irq_to_desc(virt_irq);
desc->handle_irq(virt_irq, desc);
}
diff -u -p a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -217,8 +217,9 @@ static int same_irq_and_dev(struct irq_f
return ((irq->irq == data->irq) && (irq->id == data->dev));
}
-static void free_irq_by_irq_and_dev(unsigned int irq, void *dev)
+static void free_irq_by_irq_and_dev(struct irq_desc *desc, void *dev)
{
+ unsigned int irq = desc->irq;
struct irq_and_dev data = ((struct irq_and_dev) { .irq = irq,
.dev = dev });
@@ -362,7 +363,7 @@ EXPORT_SYMBOL(reactivate_fd);
* irq_chip must define (startup || enable) &&
* (shutdown || disable) && end
*/
-static void dummy(unsigned int irq)
+static void dummy(struct irq_desc *unused)
{
}
diff -u -p a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -605,16 +605,12 @@ static void unmask_IO_APIC_irq_desc(stru
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
}
-static void mask_IO_APIC_irq(unsigned int irq)
+static void mask_IO_APIC_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
-
mask_IO_APIC_irq_desc(desc);
}
-static void unmask_IO_APIC_irq(unsigned int irq)
+static void unmask_IO_APIC_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
-
unmask_IO_APIC_irq_desc(desc);
}
@@ -2239,8 +2235,9 @@ static int __init timer_irq_works(void)
* an edge even if it isn't on the 8259A...
*/
-static unsigned int startup_ioapic_irq(unsigned int irq)
+static unsigned int startup_ioapic_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int was_pending = 0;
unsigned long flags;
struct irq_cfg *cfg;
@@ -2258,8 +2255,9 @@ static unsigned int startup_ioapic_irq(u
return was_pending;
}
-static int ioapic_retrigger_irq(unsigned int irq)
+static int ioapic_retrigger_irq(struct irq_desc *desc)
{
+unsigned int irq = desc->irq;
struct irq_cfg *cfg = irq_cfg(irq);
unsigned long flags;
@@ -2372,12 +2370,8 @@ set_ioapic_affinity_irq_desc(struct irq_
}
static int
-set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask)
+set_ioapic_affinity_irq(struct irq_desc *desc, const struct cpumask *mask)
{
- struct irq_desc *desc;
-
- desc = irq_to_desc(irq);
-
return set_ioapic_affinity_irq_desc(desc, mask);
}
@@ -2440,11 +2434,9 @@ static int set_ir_ioapic_affinity_irq_de
{
return migrate_ioapic_irq_desc(desc, mask);
}
-static int set_ir_ioapic_affinity_irq(unsigned int irq,
+static int set_ir_ioapic_affinity_irq(struct irq_desc *desc,
const struct cpumask *mask)
{
- struct irq_desc *desc = irq_to_desc(irq);
-
return set_ir_ioapic_affinity_irq_desc(desc, mask);
}
#else
@@ -2542,9 +2534,9 @@ void irq_force_complete_move(int irq)
static inline void irq_complete_move(struct irq_desc **descp) {}
#endif
-static void ack_apic_edge(unsigned int irq)
+static void ack_apic_edge(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
irq_complete_move(&desc);
move_native_irq(irq);
@@ -2606,9 +2598,9 @@ static void eoi_ioapic_irq(struct irq_de
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
}
-static void ack_apic_level(unsigned int irq)
+static void ack_apic_level(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
unsigned long v;
int i;
struct irq_cfg *cfg;
@@ -2714,15 +2706,13 @@ static void ack_apic_level(unsigned int
}
#ifdef CONFIG_INTR_REMAP
-static void ir_ack_apic_edge(unsigned int irq)
+static void ir_ack_apic_edge(struct irq_desc *unused)
{
ack_APIC_irq();
}
-static void ir_ack_apic_level(unsigned int irq)
+static void ir_ack_apic_level(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
-
ack_APIC_irq();
eoi_ioapic_irq(desc);
}
@@ -2794,7 +2784,7 @@ static inline void init_IO_APIC_traps(vo
* The local APIC irq-chip implementation:
*/
-static void mask_lapic_irq(unsigned int irq)
+static void mask_lapic_irq(struct irq_desc *unused)
{
unsigned long v;
@@ -2802,7 +2792,7 @@ static void mask_lapic_irq(unsigned int
apic_write(APIC_LVT0, v | APIC_LVT_MASKED);
}
-static void unmask_lapic_irq(unsigned int irq)
+static void unmask_lapic_irq(struct irq_desc *unused)
{
unsigned long v;
@@ -2810,7 +2800,7 @@ static void unmask_lapic_irq(unsigned in
apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED);
}
-static void ack_lapic_irq(unsigned int irq)
+static void ack_lapic_irq(struct irq_desc *unused)
{
ack_APIC_irq();
}
@@ -3389,9 +3379,8 @@ static int msi_compose_msg(struct pci_de
}
#ifdef CONFIG_SMP
-static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
+static int set_msi_irq_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
- struct irq_desc *desc = irq_to_desc(irq);
struct irq_cfg *cfg;
struct msi_msg msg;
unsigned int dest;
@@ -3418,9 +3407,9 @@ static int set_msi_irq_affinity(unsigned
* done in the process context using interrupt-remapping hardware.
*/
static int
-ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
+ir_set_msi_irq_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct irq_cfg *cfg = desc->chip_data;
unsigned int dest;
struct irte irte;
@@ -3603,9 +3592,9 @@ void arch_teardown_msi_irq(unsigned int
#if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP)
#ifdef CONFIG_SMP
-static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
+static int dmar_msi_set_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct irq_cfg *cfg;
struct msi_msg msg;
unsigned int dest;
@@ -3658,9 +3647,9 @@ int arch_setup_dmar_msi(unsigned int irq
#ifdef CONFIG_HPET_TIMER
#ifdef CONFIG_SMP
-static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
+static int hpet_msi_set_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct irq_cfg *cfg;
struct msi_msg msg;
unsigned int dest;
@@ -3765,9 +3754,9 @@ static void target_ht_irq(unsigned int i
write_ht_irq_msg(irq, &msg);
}
-static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
+static int set_ht_irq_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct irq_cfg *cfg;
unsigned int dest;
diff -u -p a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -33,11 +33,11 @@
static int i8259A_auto_eoi;
DEFINE_RAW_SPINLOCK(i8259A_lock);
-static void mask_and_ack_8259A(unsigned int);
+static void mask_and_ack_8259A(struct irq_desc *);
static void mask_8259A(void);
static void unmask_8259A(void);
-static void disable_8259A_irq(unsigned int irq);
-static void enable_8259A_irq(unsigned int irq);
+static void disable_8259A_irq(struct irq_desc *desc);
+static void enable_8259A_irq(struct irq_desc *desc);
static void init_8259A(int auto_eoi);
static int i8259A_irq_pending(unsigned int irq);
@@ -69,8 +69,9 @@ unsigned int cached_irq_mask = 0xffff;
*/
unsigned long io_apic_irqs;
-static void disable_8259A_irq(unsigned int irq)
+static void disable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = 1 << irq;
unsigned long flags;
@@ -83,8 +84,9 @@ static void disable_8259A_irq(unsigned i
raw_spin_unlock_irqrestore(&i8259A_lock, flags);
}
-static void enable_8259A_irq(unsigned int irq)
+static void enable_8259A_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int mask = ~(1 << irq);
unsigned long flags;
@@ -151,8 +153,9 @@ static inline int i8259A_irq_real(unsign
* first, _then_ send the EOI, and the order of EOI
* to the two 8259s is important!
*/
-static void mask_and_ack_8259A(unsigned int irq)
+static void mask_and_ack_8259A(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int irqmask = 1 << irq;
unsigned long flags;
@@ -372,7 +375,7 @@ static void init_8259A(int auto_eoi)
*/
static void legacy_pic_noop(void) { };
-static void legacy_pic_uint_noop(unsigned int unused) { };
+static void legacy_pic_uint_noop(struct irq_desc *unused) { };
static void legacy_pic_int_noop(int unused) { };
static struct irq_chip dummy_pic_chip = {
diff -u -p a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -316,15 +316,15 @@ void fixup_irqs(void)
}
if (!(desc->status & IRQ_MOVE_PCNTXT) && desc->chip->mask)
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
if (desc->chip->set_affinity)
- desc->chip->set_affinity(irq, affinity);
+ desc->chip->set_affinity(irq_to_desc(irq), affinity);
else if (!(warned++))
set_affinity = 0;
if (!(desc->status & IRQ_MOVE_PCNTXT) && desc->chip->unmask)
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
raw_spin_unlock(&desc->lock);
@@ -358,7 +358,7 @@ void fixup_irqs(void)
desc = irq_to_desc(irq);
raw_spin_lock(&desc->lock);
if (desc->chip->retrigger)
- desc->chip->retrigger(irq);
+ desc->chip->retrigger(desc);
raw_spin_unlock(&desc->lock);
}
}
diff -u -p a/arch/x86/kernel/uv_irq.c b/arch/x86/kernel/uv_irq.c
--- a/arch/x86/kernel/uv_irq.c
+++ b/arch/x86/kernel/uv_irq.c
@@ -27,18 +27,18 @@ struct uv_irq_2_mmr_pnode{
static spinlock_t uv_irq_lock;
static struct rb_root uv_irq_root;
-static int uv_set_irq_affinity(unsigned int, const struct cpumask *);
+static int uv_set_irq_affinity(struct irq_desc *, const struct cpumask *);
-static void uv_noop(unsigned int irq)
+static void uv_noop(struct irq_desc *unused)
{
}
-static unsigned int uv_noop_ret(unsigned int irq)
+static unsigned int uv_noop_ret(struct irq_desc *unused)
{
return 0;
}
-static void uv_ack_apic(unsigned int irq)
+static void uv_ack_apic(struct irq_desc *unused)
{
ack_APIC_irq();
}
@@ -205,9 +205,9 @@ static void arch_disable_uv_irq(int mmr_
uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
}
-static int uv_set_irq_affinity(unsigned int irq, const struct cpumask *mask)
+static int uv_set_irq_affinity(struct irq_desc *desc, const struct cpumask *mask)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct irq_cfg *cfg = desc->chip_data;
unsigned int dest;
unsigned long mmr_value;
diff -u -p a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -430,13 +430,15 @@ static int is_co_apic(unsigned int irq)
* This is the SGI Cobalt (IO-)APIC:
*/
-static void enable_cobalt_irq(unsigned int irq)
+static void enable_cobalt_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
co_apic_set(is_co_apic(irq), irq);
}
-static void disable_cobalt_irq(unsigned int irq)
+static void disable_cobalt_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int entry = is_co_apic(irq);
co_apic_write(CO_APIC_LO(entry), CO_APIC_MASK);
@@ -448,37 +450,35 @@ static void disable_cobalt_irq(unsigned
* map this to the Cobalt APIC entry where it's physically wired.
* This is called via request_irq -> setup_irq -> irq_desc->startup()
*/
-static unsigned int startup_cobalt_irq(unsigned int irq)
+static unsigned int startup_cobalt_irq(struct irq_desc *desc)
{
unsigned long flags;
- struct irq_desc *desc = irq_to_desc(irq);
spin_lock_irqsave(&cobalt_lock, flags);
if ((desc->status & (IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING)))
desc->status &= ~(IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING);
- enable_cobalt_irq(irq);
+ enable_cobalt_irq(desc);
spin_unlock_irqrestore(&cobalt_lock, flags);
return 0;
}
-static void ack_cobalt_irq(unsigned int irq)
+static void ack_cobalt_irq(struct irq_desc *desc)
{
unsigned long flags;
spin_lock_irqsave(&cobalt_lock, flags);
- disable_cobalt_irq(irq);
+ disable_cobalt_irq(desc);
apic_write(APIC_EOI, APIC_EIO_ACK);
spin_unlock_irqrestore(&cobalt_lock, flags);
}
-static void end_cobalt_irq(unsigned int irq)
+static void end_cobalt_irq(struct irq_desc *desc)
{
unsigned long flags;
- struct irq_desc *desc = irq_to_desc(irq);
spin_lock_irqsave(&cobalt_lock, flags);
if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- enable_cobalt_irq(irq);
+ enable_cobalt_irq(desc);
spin_unlock_irqrestore(&cobalt_lock, flags);
}
@@ -503,19 +503,19 @@ static struct irq_chip cobalt_irq_type =
* interrupt controller type, and through a special virtual interrupt-
* controller. Device drivers only see the virtual interrupt sources.
*/
-static unsigned int startup_piix4_master_irq(unsigned int irq)
+static unsigned int startup_piix4_master_irq(struct irq_desc *desc)
{
legacy_pic->init(0);
- return startup_cobalt_irq(irq);
+ return startup_cobalt_irq(desc);
}
-static void end_piix4_master_irq(unsigned int irq)
+static void end_piix4_master_irq(struct irq_desc *desc)
{
unsigned long flags;
spin_lock_irqsave(&cobalt_lock, flags);
- enable_cobalt_irq(irq);
+ enable_cobalt_irq(desc);
spin_unlock_irqrestore(&cobalt_lock, flags);
}
diff -u -p a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -84,7 +84,7 @@ static inline unsigned int vmi_get_timer
/** vmi clockchip */
#ifdef CONFIG_X86_LOCAL_APIC
-static unsigned int startup_timer_irq(unsigned int irq)
+static unsigned int startup_timer_irq(struct irq_desc *unused)
{
unsigned long val = apic_read(APIC_LVTT);
apic_write(APIC_LVTT, vmi_get_timer_vector());
@@ -92,19 +92,19 @@ static unsigned int startup_timer_irq(un
return (val & APIC_SEND_PENDING);
}
-static void mask_timer_irq(unsigned int irq)
+static void mask_timer_irq(struct irq_desc *unused)
{
unsigned long val = apic_read(APIC_LVTT);
apic_write(APIC_LVTT, val | APIC_LVT_MASKED);
}
-static void unmask_timer_irq(unsigned int irq)
+static void unmask_timer_irq(struct irq_desc *unused)
{
unsigned long val = apic_read(APIC_LVTT);
apic_write(APIC_LVTT, val & ~APIC_LVT_MASKED);
}
-static void ack_timer_irq(unsigned int irq)
+static void ack_timer_irq(struct irq_desc *unused)
{
ack_APIC_irq();
}
diff -u -p a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -789,13 +789,15 @@ static void lguest_flush_tlb_kernel(void
* simple as setting a bit. We don't actually "ack" interrupts as such, we
* just mask and unmask them. I wonder if we should be cleverer?
*/
-static void disable_lguest_irq(unsigned int irq)
+static void disable_lguest_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_bit(irq, lguest_data.blocked_interrupts);
}
-static void enable_lguest_irq(unsigned int irq)
+static void enable_lguest_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
clear_bit(irq, lguest_data.blocked_interrupts);
}
@@ -1000,7 +1002,7 @@ static void lguest_time_init(void)
clockevents_register_device(&lguest_clockevent);
/* Finally, we unblock the timer interrupt. */
- enable_lguest_irq(0);
+ enable_lguest_irq(irq_to_desc(0));
}
/*
diff -u -p a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -44,7 +44,7 @@ void ack_bad_irq(unsigned int irq)
asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
{
struct pt_regs *old_regs = set_irq_regs(regs);
- struct irq_desc *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_to_desc(irq);
if (irq >= NR_IRQS) {
printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
@@ -120,37 +120,43 @@ skip:
return 0;
}
-static void xtensa_irq_mask(unsigned int irq)
+static void xtensa_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cached_irq_mask &= ~(1 << irq);
set_sr (cached_irq_mask, INTENABLE);
}
-static void xtensa_irq_unmask(unsigned int irq)
+static void xtensa_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
cached_irq_mask |= 1 << irq;
set_sr (cached_irq_mask, INTENABLE);
}
-static void xtensa_irq_enable(unsigned int irq)
+static void xtensa_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
variant_irq_enable(irq);
- xtensa_irq_unmask(irq);
+ xtensa_irq_unmask(desc);
}
-static void xtensa_irq_disable(unsigned int irq)
+static void xtensa_irq_disable(struct irq_desc *desc)
{
- xtensa_irq_mask(irq);
+ unsigned int irq = desc->irq;
+ xtensa_irq_mask(desc);
variant_irq_disable(irq);
}
-static void xtensa_irq_ack(unsigned int irq)
+static void xtensa_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_sr(1 << irq, INTCLEAR);
}
-static int xtensa_irq_retrigger(unsigned int irq)
+static int xtensa_irq_retrigger(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
set_sr (1 << irq, INTSET);
return 1;
}
diff -u -p a/arch/xtensa/variants/s6000/gpio.c b/arch/xtensa/variants/s6000/gpio.c
--- a/arch/xtensa/variants/s6000/gpio.c
+++ b/arch/xtensa/variants/s6000/gpio.c
@@ -85,30 +85,33 @@ int s6_gpio_init(u32 afsel)
return gpiochip_add(&gpiochip);
}
-static void ack(unsigned int irq)
+static void ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
writeb(1 << (irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC);
}
-static void mask(unsigned int irq)
+static void mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u8 r = readb(S6_REG_GPIO + S6_GPIO_IE);
r &= ~(1 << (irq - IRQ_BASE));
writeb(r, S6_REG_GPIO + S6_GPIO_IE);
}
-static void unmask(unsigned int irq)
+static void unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u8 m = readb(S6_REG_GPIO + S6_GPIO_IE);
m |= 1 << (irq - IRQ_BASE);
writeb(m, S6_REG_GPIO + S6_GPIO_IE);
}
-static int set_type(unsigned int irq, unsigned int type)
+static int set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
const u8 m = 1 << (irq - IRQ_BASE);
irq_flow_handler_t handler;
- struct irq_desc *desc;
u8 reg;
if (type == IRQ_TYPE_PROBE) {
@@ -129,7 +132,6 @@ static int set_type(unsigned int irq, un
handler = handle_edge_irq;
}
writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS);
- desc = irq_to_desc(irq);
desc->handle_irq = handler;
reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV);
@@ -164,8 +166,8 @@ static void demux_irqs(unsigned int irq,
u8 pending;
int cirq;
- desc->chip->mask(irq);
- desc->chip->ack(irq);
+ desc->chip->mask(irq_to_desc(irq));
+ desc->chip->ack(irq_to_desc(irq));
pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask;
cirq = IRQ_BASE - 1;
while (pending) {
@@ -174,7 +176,7 @@ static void demux_irqs(unsigned int irq,
pending >>= n;
generic_handle_irq(cirq);
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS];
diff -u -p a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c
--- a/drivers/dma/ipu/ipu_irq.c
+++ b/drivers/dma/ipu/ipu_irq.c
@@ -94,8 +94,9 @@ static struct ipu_irq_map *src2map(unsig
return NULL;
}
-static void ipu_irq_unmask(unsigned int irq)
+static void ipu_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct ipu_irq_map *map = get_irq_chip_data(irq);
struct ipu_irq_bank *bank;
uint32_t reg;
@@ -117,8 +118,9 @@ static void ipu_irq_unmask(unsigned int
spin_unlock_irqrestore(&bank_lock, lock_flags);
}
-static void ipu_irq_mask(unsigned int irq)
+static void ipu_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct ipu_irq_map *map = get_irq_chip_data(irq);
struct ipu_irq_bank *bank;
uint32_t reg;
@@ -140,8 +142,9 @@ static void ipu_irq_mask(unsigned int ir
spin_unlock_irqrestore(&bank_lock, lock_flags);
}
-static void ipu_irq_ack(unsigned int irq)
+static void ipu_irq_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct ipu_irq_map *map = get_irq_chip_data(irq);
struct ipu_irq_bank *bank;
unsigned long lock_flags;
diff -u -p a/drivers/gpio/langwell_gpio.c b/drivers/gpio/langwell_gpio.c
--- a/drivers/gpio/langwell_gpio.c
+++ b/drivers/gpio/langwell_gpio.c
@@ -113,8 +113,9 @@ static int lnw_gpio_to_irq(struct gpio_c
return lnw->irq_base + offset;
}
-static int lnw_irq_type(unsigned irq, unsigned type)
+static int lnw_irq_type(struct irq_desc *desc, unsigned type)
{
+ unsigned int irq = desc->irq;
struct lnw_gpio *lnw = get_irq_chip_data(irq);
u32 gpio = irq - lnw->irq_base;
u8 reg = gpio / 32;
@@ -142,11 +143,11 @@ static int lnw_irq_type(unsigned irq, un
return 0;
};
-static void lnw_irq_unmask(unsigned irq)
+static void lnw_irq_unmask(struct irq_desc *unused)
{
};
-static void lnw_irq_mask(unsigned irq)
+static void lnw_irq_mask(struct irq_desc *unused)
{
};
@@ -184,7 +185,7 @@ static void lnw_irq_handler(unsigned irq
/* clear the edge detect status bit */
writel(gedr_v, gedr);
}
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
diff -u -p a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -227,36 +227,41 @@ static int pca953x_gpio_to_irq(struct gp
return chip->irq_base + off;
}
-static void pca953x_irq_mask(unsigned int irq)
+static void pca953x_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pca953x_chip *chip = get_irq_chip_data(irq);
chip->irq_mask &= ~(1 << (irq - chip->irq_base));
}
-static void pca953x_irq_unmask(unsigned int irq)
+static void pca953x_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pca953x_chip *chip = get_irq_chip_data(irq);
chip->irq_mask |= 1 << (irq - chip->irq_base);
}
-static void pca953x_irq_bus_lock(unsigned int irq)
+static void pca953x_irq_bus_lock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pca953x_chip *chip = get_irq_chip_data(irq);
mutex_lock(&chip->irq_lock);
}
-static void pca953x_irq_bus_sync_unlock(unsigned int irq)
+static void pca953x_irq_bus_sync_unlock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pca953x_chip *chip = get_irq_chip_data(irq);
mutex_unlock(&chip->irq_lock);
}
-static int pca953x_irq_set_type(unsigned int irq, unsigned int type)
+static int pca953x_irq_set_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
struct pca953x_chip *chip = get_irq_chip_data(irq);
uint16_t level = irq - chip->irq_base;
uint16_t mask = 1 << level;
diff -u -p a/drivers/gpio/pl061.c b/drivers/gpio/pl061.c
--- a/drivers/gpio/pl061.c
+++ b/drivers/gpio/pl061.c
@@ -122,8 +122,9 @@ static int pl061_to_irq(struct gpio_chip
/*
* PL061 GPIO IRQ
*/
-static void pl061_irq_disable(unsigned irq)
+static void pl061_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pl061_gpio *chip = get_irq_chip_data(irq);
int offset = irq - chip->irq_base;
unsigned long flags;
@@ -136,8 +137,9 @@ static void pl061_irq_disable(unsigned i
spin_unlock_irqrestore(&chip->irq_lock, flags);
}
-static void pl061_irq_enable(unsigned irq)
+static void pl061_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pl061_gpio *chip = get_irq_chip_data(irq);
int offset = irq - chip->irq_base;
unsigned long flags;
@@ -150,8 +152,9 @@ static void pl061_irq_enable(unsigned ir
spin_unlock_irqrestore(&chip->irq_lock, flags);
}
-static int pl061_irq_type(unsigned irq, unsigned trigger)
+static int pl061_irq_type(struct irq_desc *desc, unsigned trigger)
{
+ unsigned int irq = desc->irq;
struct pl061_gpio *chip = get_irq_chip_data(irq);
int offset = irq - chip->irq_base;
unsigned long flags;
@@ -207,7 +210,7 @@ static void pl061_irq_handler(unsigned i
struct list_head *ptr;
struct pl061_gpio *chip;
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
list_for_each(ptr, chip_list) {
unsigned long pending;
int offset;
@@ -222,7 +225,7 @@ static void pl061_irq_handler(unsigned i
for_each_set_bit(offset, &pending, PL061_GPIO_NR)
generic_handle_irq(pl061_to_irq(&chip->gc, offset));
}
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
static int __init pl061_probe(struct amba_device *dev, struct amba_id *id)
diff -u -p a/drivers/gpio/timbgpio.c b/drivers/gpio/timbgpio.c
--- a/drivers/gpio/timbgpio.c
+++ b/drivers/gpio/timbgpio.c
@@ -107,24 +107,27 @@ static int timbgpio_to_irq(struct gpio_c
/*
* GPIO IRQ
*/
-static void timbgpio_irq_disable(unsigned irq)
+static void timbgpio_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct timbgpio *tgpio = get_irq_chip_data(irq);
int offset = irq - tgpio->irq_base;
timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 0);
}
-static void timbgpio_irq_enable(unsigned irq)
+static void timbgpio_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct timbgpio *tgpio = get_irq_chip_data(irq);
int offset = irq - tgpio->irq_base;
timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 1);
}
-static int timbgpio_irq_type(unsigned irq, unsigned trigger)
+static int timbgpio_irq_type(struct irq_desc *desc, unsigned trigger)
{
+ unsigned int irq = desc->irq;
struct timbgpio *tgpio = get_irq_chip_data(irq);
int offset = irq - tgpio->irq_base;
unsigned long flags;
@@ -185,7 +188,7 @@ static void timbgpio_irq(unsigned int ir
unsigned long ipr;
int offset;
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
ipr = ioread32(tgpio->membase + TGPIO_IPR);
iowrite32(ipr, tgpio->membase + TGPIO_ICR);
diff -u -p a/drivers/gpio/vr41xx_giu.c b/drivers/gpio/vr41xx_giu.c
--- a/drivers/gpio/vr41xx_giu.c
+++ b/drivers/gpio/vr41xx_giu.c
@@ -111,18 +111,21 @@ static inline u16 giu_clear(u16 offset,
return data;
}
-static void ack_giuint_low(unsigned int irq)
+static void ack_giuint_low(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
giu_write(GIUINTSTATL, 1 << GPIO_PIN_OF_IRQ(irq));
}
-static void mask_giuint_low(unsigned int irq)
+static void mask_giuint_low(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
giu_clear(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(irq));
}
-static void mask_ack_giuint_low(unsigned int irq)
+static void mask_ack_giuint_low(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int pin;
pin = GPIO_PIN_OF_IRQ(irq);
@@ -130,8 +133,9 @@ static void mask_ack_giuint_low(unsigned
giu_write(GIUINTSTATL, 1 << pin);
}
-static void unmask_giuint_low(unsigned int irq)
+static void unmask_giuint_low(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
giu_set(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(irq));
}
@@ -143,19 +147,22 @@ static struct irq_chip giuint_low_irq_ch
.unmask = unmask_giuint_low,
};
-static void ack_giuint_high(unsigned int irq)
+static void ack_giuint_high(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
giu_write(GIUINTSTATH,
1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET));
}
-static void mask_giuint_high(unsigned int irq)
+static void mask_giuint_high(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
giu_clear(GIUINTENH, 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET));
}
-static void mask_ack_giuint_high(unsigned int irq)
+static void mask_ack_giuint_high(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned int pin;
pin = GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET;
@@ -163,8 +170,9 @@ static void mask_ack_giuint_high(unsigne
giu_write(GIUINTSTATH, 1 << pin);
}
-static void unmask_giuint_high(unsigned int irq)
+static void unmask_giuint_high(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
giu_set(GIUINTENH, 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET));
}
diff -u -p a/drivers/mfd/88pm860x-core.c b/drivers/mfd/88pm860x-core.c
--- a/drivers/mfd/88pm860x-core.c
+++ b/drivers/mfd/88pm860x-core.c
@@ -349,15 +349,17 @@ static irqreturn_t pm860x_irq(int irq, v
return IRQ_HANDLED;
}
-static void pm860x_irq_lock(unsigned int irq)
+static void pm860x_irq_lock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pm860x_chip *chip = get_irq_chip_data(irq);
mutex_lock(&chip->irq_lock);
}
-static void pm860x_irq_sync_unlock(unsigned int irq)
+static void pm860x_irq_sync_unlock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pm860x_chip *chip = get_irq_chip_data(irq);
struct pm860x_irq_data *irq_data;
struct i2c_client *i2c;
@@ -400,15 +402,17 @@ static void pm860x_irq_sync_unlock(unsig
mutex_unlock(&chip->irq_lock);
}
-static void pm860x_irq_enable(unsigned int irq)
+static void pm860x_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pm860x_chip *chip = get_irq_chip_data(irq);
pm860x_irqs[irq - chip->irq_base].enable
= pm860x_irqs[irq - chip->irq_base].offs;
}
-static void pm860x_irq_disable(unsigned int irq)
+static void pm860x_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pm860x_chip *chip = get_irq_chip_data(irq);
pm860x_irqs[irq - chip->irq_base].enable = 0;
}
diff -u -p a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -142,7 +142,7 @@ static void asic3_irq_demux(unsigned int
unsigned long flags;
struct asic3 *asic;
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
asic = desc->handler_data;
@@ -225,8 +225,9 @@ static inline int asic3_irq_to_index(str
return (irq - asic->irq_base) & 0xf;
}
-static void asic3_mask_gpio_irq(unsigned int irq)
+static void asic3_mask_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct asic3 *asic = get_irq_chip_data(irq);
u32 val, bank, index;
unsigned long flags;
@@ -241,8 +242,9 @@ static void asic3_mask_gpio_irq(unsigned
spin_unlock_irqrestore(&asic->lock, flags);
}
-static void asic3_mask_irq(unsigned int irq)
+static void asic3_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct asic3 *asic = get_irq_chip_data(irq);
int regval;
unsigned long flags;
@@ -262,8 +264,9 @@ static void asic3_mask_irq(unsigned int
spin_unlock_irqrestore(&asic->lock, flags);
}
-static void asic3_unmask_gpio_irq(unsigned int irq)
+static void asic3_unmask_gpio_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct asic3 *asic = get_irq_chip_data(irq);
u32 val, bank, index;
unsigned long flags;
@@ -278,8 +281,9 @@ static void asic3_unmask_gpio_irq(unsign
spin_unlock_irqrestore(&asic->lock, flags);
}
-static void asic3_unmask_irq(unsigned int irq)
+static void asic3_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct asic3 *asic = get_irq_chip_data(irq);
int regval;
unsigned long flags;
@@ -299,8 +303,9 @@ static void asic3_unmask_irq(unsigned in
spin_unlock_irqrestore(&asic->lock, flags);
}
-static int asic3_gpio_irq_type(unsigned int irq, unsigned int type)
+static int asic3_gpio_irq_type(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
struct asic3 *asic = get_irq_chip_data(irq);
u32 bank, index;
u16 trigger, level, edge, bit;
diff -u -p a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c
--- a/drivers/mfd/ezx-pcap.c
+++ b/drivers/mfd/ezx-pcap.c
@@ -143,16 +143,18 @@ int pcap_to_irq(struct pcap_chip *pcap,
}
EXPORT_SYMBOL_GPL(pcap_to_irq);
-static void pcap_mask_irq(unsigned int irq)
+static void pcap_mask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pcap_chip *pcap = get_irq_chip_data(irq);
pcap->msr |= 1 << irq_to_pcap(pcap, irq);
queue_work(pcap->workqueue, &pcap->msr_work);
}
-static void pcap_unmask_irq(unsigned int irq)
+static void pcap_unmask_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct pcap_chip *pcap = get_irq_chip_data(irq);
pcap->msr &= ~(1 << irq_to_pcap(pcap, irq));
@@ -217,7 +219,7 @@ static void pcap_irq_handler(unsigned in
{
struct pcap_chip *pcap = get_irq_data(irq);
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
queue_work(pcap->workqueue, &pcap->isr_work);
return;
}
diff -u -p a/drivers/mfd/htc-egpio.c b/drivers/mfd/htc-egpio.c
--- a/drivers/mfd/htc-egpio.c
+++ b/drivers/mfd/htc-egpio.c
@@ -69,21 +69,23 @@ static inline void ack_irqs(struct egpio
ei->ack_write, ei->ack_register << ei->bus_shift);
}
-static void egpio_ack(unsigned int irq)
+static void egpio_ack(struct irq_desc *unused)
{
}
/* There does not appear to be a way to proactively mask interrupts
* on the egpio chip itself. So, we simply ignore interrupts that
* aren't desired. */
-static void egpio_mask(unsigned int irq)
+static void egpio_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct egpio_info *ei = get_irq_chip_data(irq);
ei->irqs_enabled &= ~(1 << (irq - ei->irq_start));
pr_debug("EGPIO mask %d %04x\n", irq, ei->irqs_enabled);
}
-static void egpio_unmask(unsigned int irq)
+static void egpio_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct egpio_info *ei = get_irq_chip_data(irq);
ei->irqs_enabled |= 1 << (irq - ei->irq_start);
pr_debug("EGPIO unmask %d %04x\n", irq, ei->irqs_enabled);
diff -u -p a/drivers/mfd/htc-i2cpld.c b/drivers/mfd/htc-i2cpld.c
--- a/drivers/mfd/htc-i2cpld.c
+++ b/drivers/mfd/htc-i2cpld.c
@@ -81,22 +81,24 @@ struct htcpld_data {
/* There does not appear to be a way to proactively mask interrupts
* on the htcpld chip itself. So, we simply ignore interrupts that
* aren't desired. */
-static void htcpld_mask(unsigned int irq)
+static void htcpld_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct htcpld_chip *chip = get_irq_chip_data(irq);
chip->irqs_enabled &= ~(1 << (irq - chip->irq_start));
pr_debug("HTCPLD mask %d %04x\n", irq, chip->irqs_enabled);
}
-static void htcpld_unmask(unsigned int irq)
+static void htcpld_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct htcpld_chip *chip = get_irq_chip_data(irq);
chip->irqs_enabled |= 1 << (irq - chip->irq_start);
pr_debug("HTCPLD unmask %d %04x\n", irq, chip->irqs_enabled);
}
-static int htcpld_set_type(unsigned int irq, unsigned int flags)
+static int htcpld_set_type(struct irq_desc *d, unsigned int flags)
{
- struct irq_desc *d = irq_to_desc(irq);
+ unsigned int irq = d->irq;
if (!d) {
pr_err("HTCPLD invalid IRQ: %d\n", irq);
diff -u -p a/drivers/mfd/max8925-core.c b/drivers/mfd/max8925-core.c
--- a/drivers/mfd/max8925-core.c
+++ b/drivers/mfd/max8925-core.c
@@ -384,15 +384,17 @@ static irqreturn_t max8925_tsc_irq(int i
return IRQ_HANDLED;
}
-static void max8925_irq_lock(unsigned int irq)
+static void max8925_irq_lock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct max8925_chip *chip = get_irq_chip_data(irq);
mutex_lock(&chip->irq_lock);
}
-static void max8925_irq_sync_unlock(unsigned int irq)
+static void max8925_irq_sync_unlock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct max8925_chip *chip = get_irq_chip_data(irq);
struct max8925_irq_data *irq_data;
static unsigned char cache_chg[2] = {0xff, 0xff};
@@ -468,15 +470,17 @@ static void max8925_irq_sync_unlock(unsi
mutex_unlock(&chip->irq_lock);
}
-static void max8925_irq_enable(unsigned int irq)
+static void max8925_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct max8925_chip *chip = get_irq_chip_data(irq);
max8925_irqs[irq - chip->irq_base].enable
= max8925_irqs[irq - chip->irq_base].offs;
}
-static void max8925_irq_disable(unsigned int irq)
+static void max8925_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct max8925_chip *chip = get_irq_chip_data(irq);
max8925_irqs[irq - chip->irq_base].enable = 0;
}
diff -u -p a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c
--- a/drivers/mfd/t7l66xb.c
+++ b/drivers/mfd/t7l66xb.c
@@ -198,8 +198,9 @@ static void t7l66xb_irq(unsigned int irq
generic_handle_irq(irq_base + i);
}
-static void t7l66xb_irq_mask(unsigned int irq)
+static void t7l66xb_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct t7l66xb *t7l66xb = get_irq_chip_data(irq);
unsigned long flags;
u8 imr;
@@ -211,8 +212,9 @@ static void t7l66xb_irq_mask(unsigned in
spin_unlock_irqrestore(&t7l66xb->lock, flags);
}
-static void t7l66xb_irq_unmask(unsigned int irq)
+static void t7l66xb_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct t7l66xb *t7l66xb = get_irq_chip_data(irq);
unsigned long flags;
u8 imr;
diff -u -p a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
--- a/drivers/mfd/tc6393xb.c
+++ b/drivers/mfd/tc6393xb.c
@@ -526,12 +526,13 @@ tc6393xb_irq(unsigned int irq, struct ir
}
}
-static void tc6393xb_irq_ack(unsigned int irq)
+static void tc6393xb_irq_ack(struct irq_desc *unused)
{
}
-static void tc6393xb_irq_mask(unsigned int irq)
+static void tc6393xb_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
unsigned long flags;
u8 imr;
@@ -543,8 +544,9 @@ static void tc6393xb_irq_mask(unsigned i
spin_unlock_irqrestore(&tc6393xb->lock, flags);
}
-static void tc6393xb_irq_unmask(unsigned int irq)
+static void tc6393xb_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
unsigned long flags;
u8 imr;
diff -u -p a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -595,8 +595,9 @@ static void twl4030_sih_do_edge(struct w
* completion, potentially including some re-ordering, of these requests.
*/
-static void twl4030_sih_mask(unsigned irq)
+static void twl4030_sih_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sih_agent *sih = get_irq_chip_data(irq);
unsigned long flags;
@@ -607,8 +608,9 @@ static void twl4030_sih_mask(unsigned ir
spin_unlock_irqrestore(&sih_agent_lock, flags);
}
-static void twl4030_sih_unmask(unsigned irq)
+static void twl4030_sih_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct sih_agent *sih = get_irq_chip_data(irq);
unsigned long flags;
@@ -619,10 +621,10 @@ static void twl4030_sih_unmask(unsigned
spin_unlock_irqrestore(&sih_agent_lock, flags);
}
-static int twl4030_sih_set_type(unsigned irq, unsigned trigger)
+static int twl4030_sih_set_type(struct irq_desc *desc, unsigned trigger)
{
+ unsigned int irq = desc->irq;
struct sih_agent *sih = get_irq_chip_data(irq);
- struct irq_desc *desc = irq_to_desc(irq);
unsigned long flags;
if (!desc) {
diff -u -p a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c
--- a/drivers/mfd/wm831x-irq.c
+++ b/drivers/mfd/wm831x-irq.c
@@ -346,15 +346,17 @@ static inline struct wm831x_irq_data *ir
return &wm831x_irqs[irq - wm831x->irq_base];
}
-static void wm831x_irq_lock(unsigned int irq)
+static void wm831x_irq_lock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm831x *wm831x = get_irq_chip_data(irq);
mutex_lock(&wm831x->irq_lock);
}
-static void wm831x_irq_sync_unlock(unsigned int irq)
+static void wm831x_irq_sync_unlock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm831x *wm831x = get_irq_chip_data(irq);
int i;
@@ -372,16 +374,18 @@ static void wm831x_irq_sync_unlock(unsig
mutex_unlock(&wm831x->irq_lock);
}
-static void wm831x_irq_unmask(unsigned int irq)
+static void wm831x_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm831x *wm831x = get_irq_chip_data(irq);
struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x, irq);
wm831x->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
}
-static void wm831x_irq_mask(unsigned int irq)
+static void wm831x_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm831x *wm831x = get_irq_chip_data(irq);
struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x, irq);
diff -u -p a/drivers/mfd/wm8350-irq.c b/drivers/mfd/wm8350-irq.c
--- a/drivers/mfd/wm8350-irq.c
+++ b/drivers/mfd/wm8350-irq.c
@@ -417,15 +417,17 @@ static irqreturn_t wm8350_irq(int irq, v
return IRQ_HANDLED;
}
-static void wm8350_irq_lock(unsigned int irq)
+static void wm8350_irq_lock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm8350 *wm8350 = get_irq_chip_data(irq);
mutex_lock(&wm8350->irq_lock);
}
-static void wm8350_irq_sync_unlock(unsigned int irq)
+static void wm8350_irq_sync_unlock(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm8350 *wm8350 = get_irq_chip_data(irq);
int i;
@@ -442,16 +444,18 @@ static void wm8350_irq_sync_unlock(unsig
mutex_unlock(&wm8350->irq_lock);
}
-static void wm8350_irq_enable(unsigned int irq)
+static void wm8350_irq_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm8350 *wm8350 = get_irq_chip_data(irq);
struct wm8350_irq_data *irq_data = irq_to_wm8350_irq(wm8350, irq);
wm8350->irq_masks[irq_data->reg] &= ~irq_data->mask;
}
-static void wm8350_irq_disable(unsigned int irq)
+static void wm8350_irq_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct wm8350 *wm8350 = get_irq_chip_data(irq);
struct wm8350_irq_data *irq_data = irq_to_wm8350_irq(wm8350, irq);
diff -u -p a/drivers/parisc/dino.c b/drivers/parisc/dino.c
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -296,9 +296,9 @@ static struct pci_port_ops dino_port_ops
.outl = dino_out32
};
-static void dino_disable_irq(unsigned int irq)
+static void dino_disable_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct dino_device *dino_dev = desc->chip_data;
int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
@@ -309,9 +309,9 @@ static void dino_disable_irq(unsigned in
__raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
}
-static void dino_enable_irq(unsigned int irq)
+static void dino_enable_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct dino_device *dino_dev = desc->chip_data;
int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
u32 tmp;
@@ -347,9 +347,9 @@ static void dino_enable_irq(unsigned int
}
}
-static unsigned int dino_startup_irq(unsigned int irq)
+static unsigned int dino_startup_irq(struct irq_desc *desc)
{
- dino_enable_irq(irq);
+ dino_enable_irq(desc);
return 0;
}
diff -u -p a/drivers/parisc/eisa.c b/drivers/parisc/eisa.c
--- a/drivers/parisc/eisa.c
+++ b/drivers/parisc/eisa.c
@@ -144,8 +144,9 @@ static unsigned int eisa_irq_level __rea
/* called by free irq */
-static void eisa_disable_irq(unsigned int irq)
+static void eisa_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
EISA_DBG("disable irq %d\n", irq);
@@ -164,8 +165,9 @@ static void eisa_disable_irq(unsigned in
}
/* called by request irq */
-static void eisa_enable_irq(unsigned int irq)
+static void eisa_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
EISA_DBG("enable irq %d\n", irq);
@@ -182,9 +184,9 @@ static void eisa_enable_irq(unsigned int
EISA_DBG("pic1 mask %02x\n", eisa_in8(0xa1));
}
-static unsigned int eisa_startup_irq(unsigned int irq)
+static unsigned int eisa_startup_irq(struct irq_desc *desc)
{
- eisa_enable_irq(irq);
+ eisa_enable_irq(desc);
return 0;
}
diff -u -p a/drivers/parisc/gsc.c b/drivers/parisc/gsc.c
--- a/drivers/parisc/gsc.c
+++ b/drivers/parisc/gsc.c
@@ -106,9 +106,9 @@ int gsc_find_local_irq(unsigned int irq,
return NO_IRQ;
}
-static void gsc_asic_disable_irq(unsigned int irq)
+static void gsc_asic_disable_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct gsc_asic *irq_dev = desc->chip_data;
int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
u32 imr;
@@ -122,9 +122,9 @@ static void gsc_asic_disable_irq(unsigne
gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
}
-static void gsc_asic_enable_irq(unsigned int irq)
+static void gsc_asic_enable_irq(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
struct gsc_asic *irq_dev = desc->chip_data;
int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
u32 imr;
@@ -142,9 +142,9 @@ static void gsc_asic_enable_irq(unsigned
*/
}
-static unsigned int gsc_asic_startup_irq(unsigned int irq)
+static unsigned int gsc_asic_startup_irq(struct irq_desc *desc)
{
- gsc_asic_enable_irq(irq);
+ gsc_asic_enable_irq(desc);
return 0;
}
diff -u -p a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -622,8 +622,9 @@ static struct vector_info *iosapic_get_v
return desc->chip_data;
}
-static void iosapic_disable_irq(unsigned int irq)
+static void iosapic_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
unsigned long flags;
struct vector_info *vi = iosapic_get_vector(irq);
u32 d0, d1;
@@ -635,8 +636,9 @@ static void iosapic_disable_irq(unsigned
spin_unlock_irqrestore(&iosapic_lock, flags);
}
-static void iosapic_enable_irq(unsigned int irq)
+static void iosapic_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct vector_info *vi = iosapic_get_vector(irq);
u32 d0, d1;
@@ -686,8 +688,9 @@ printk("\n");
* i386/ia64 support ISA devices and have to deal with
* edge-triggered interrupts too.
*/
-static void iosapic_end_irq(unsigned int irq)
+static void iosapic_end_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct vector_info *vi = iosapic_get_vector(irq);
DBG(KERN_DEBUG "end_irq(%d): eoi(%p, 0x%x)\n", irq,
vi->eoi_addr, vi->eoi_data);
@@ -695,16 +698,17 @@ static void iosapic_end_irq(unsigned int
cpu_end_irq(irq);
}
-static unsigned int iosapic_startup_irq(unsigned int irq)
+static unsigned int iosapic_startup_irq(struct irq_desc *desc)
{
- iosapic_enable_irq(irq);
+ iosapic_enable_irq(desc);
return 0;
}
#ifdef CONFIG_SMP
-static int iosapic_set_affinity_irq(unsigned int irq,
+static int iosapic_set_affinity_irq(struct irq_desc *desc,
const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
struct vector_info *vi = iosapic_get_vector(irq);
u32 d0, d1, dummy_d0;
unsigned long flags;
@@ -714,7 +718,7 @@ static int iosapic_set_affinity_irq(unsi
if (dest_cpu < 0)
return -1;
- cpumask_copy(irq_desc[irq].affinity, cpumask_of(dest_cpu));
+ cpumask_copy(desc->affinity, cpumask_of(dest_cpu));
vi->txn_addr = txn_affinity_addr(irq, dest_cpu);
spin_lock_irqsave(&iosapic_lock, flags);
diff -u -p a/drivers/parisc/superio.c b/drivers/parisc/superio.c
--- a/drivers/parisc/superio.c
+++ b/drivers/parisc/superio.c
@@ -286,8 +286,9 @@ superio_init(struct pci_dev *pcidev)
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
-static void superio_disable_irq(unsigned int irq)
+static void superio_disable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u8 r8;
if ((irq < 1) || (irq == 2) || (irq > 7)) {
@@ -303,8 +304,9 @@ static void superio_disable_irq(unsigned
outb (r8,IC_PIC1+1);
}
-static void superio_enable_irq(unsigned int irq)
+static void superio_enable_irq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u8 r8;
if ((irq < 1) || (irq == 2) || (irq > 7)) {
@@ -319,9 +321,9 @@ static void superio_enable_irq(unsigned
outb (r8,IC_PIC1+1);
}
-static unsigned int superio_startup_irq(unsigned int irq)
+static unsigned int superio_startup_irq(struct irq_desc *desc)
{
- superio_enable_irq(irq);
+ superio_enable_irq(desc);
return 0;
}
diff -u -p a/drivers/sh/intc.c b/drivers/sh/intc.c
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -245,13 +245,15 @@ static inline void _intc_enable(unsigned
}
}
-static void intc_enable(unsigned int irq)
+static void intc_enable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
_intc_enable(irq, (unsigned long)get_irq_chip_data(irq));
}
-static void intc_disable(unsigned int irq)
+static void intc_disable(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct intc_desc_int *d = get_intc_desc(irq);
unsigned long handle = (unsigned long) get_irq_chip_data(irq);
unsigned long addr;
@@ -259,7 +261,7 @@ static void intc_disable(unsigned int ir
for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
#ifdef CONFIG_SMP
- if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity))
+ if (!cpumask_test_cpu(cpu, desc->affinity))
continue;
#endif
addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
@@ -305,7 +307,7 @@ static void intc_enable_disable(struct i
}
}
-static int intc_set_wake(unsigned int irq, unsigned int on)
+static int intc_set_wake(struct irq_desc *unused, unsigned int on)
{
return 0; /* allow wakeup, but setup hardware in intc_suspend() */
}
@@ -316,24 +318,25 @@ static int intc_set_wake(unsigned int ir
* additional locking here at the intc desc level. The affinity mask is
* later tested in the enable/disable paths.
*/
-static int intc_set_affinity(unsigned int irq, const struct cpumask *cpumask)
+static int intc_set_affinity(struct irq_desc *desc, const struct cpumask *cpumask)
{
if (!cpumask_intersects(cpumask, cpu_online_mask))
return -1;
- cpumask_copy(irq_to_desc(irq)->affinity, cpumask);
+ cpumask_copy(desc->affinity, cpumask);
return 0;
}
#endif
-static void intc_mask_ack(unsigned int irq)
+static void intc_mask_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct intc_desc_int *d = get_intc_desc(irq);
unsigned long handle = ack_handle[irq];
unsigned long addr;
- intc_disable(irq);
+ intc_disable(desc);
/* read register and write zero only to the assocaited bit */
@@ -428,8 +431,9 @@ static unsigned char intc_irq_sense_tabl
#endif
};
-static int intc_set_sense(unsigned int irq, unsigned int type)
+static int intc_set_sense(struct irq_desc *desc, unsigned int type)
{
+ unsigned int irq = desc->irq;
struct intc_desc_int *d = get_intc_desc(irq);
unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
struct intc_handle_int *ihp;
@@ -962,9 +966,9 @@ static int intc_suspend(struct sys_devic
if (desc->chip != &d->chip)
continue;
if (desc->status & IRQ_DISABLED)
- intc_disable(irq);
+ intc_disable(irq_to_desc(irq));
else
- intc_enable(irq);
+ intc_enable(irq_to_desc(irq));
}
break;
case PM_EVENT_FREEZE:
@@ -974,7 +978,7 @@ static int intc_suspend(struct sys_devic
/* enable wakeup irqs belonging to this intc controller */
for_each_irq_desc(irq, desc) {
if ((desc->status & IRQ_WAKEUP) && (desc->chip == &d->chip))
- intc_enable(irq);
+ intc_enable(irq_to_desc(irq));
}
break;
}
diff -u -p a/drivers/vlynq/vlynq.c b/drivers/vlynq/vlynq.c
--- a/drivers/vlynq/vlynq.c
+++ b/drivers/vlynq/vlynq.c
@@ -133,8 +133,9 @@ static void vlynq_reset(struct vlynq_dev
msleep(5);
}
-static void vlynq_irq_unmask(unsigned int irq)
+static void vlynq_irq_unmask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 val;
struct vlynq_device *dev = get_irq_chip_data(irq);
int virq;
@@ -146,8 +147,9 @@ static void vlynq_irq_unmask(unsigned in
writel(val, &dev->remote->int_device[virq >> 2]);
}
-static void vlynq_irq_mask(unsigned int irq)
+static void vlynq_irq_mask(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
u32 val;
struct vlynq_device *dev = get_irq_chip_data(irq);
int virq;
@@ -159,8 +161,9 @@ static void vlynq_irq_mask(unsigned int
writel(val, &dev->remote->int_device[virq >> 2]);
}
-static int vlynq_irq_type(unsigned int irq, unsigned int flow_type)
+static int vlynq_irq_type(struct irq_desc *desc, unsigned int flow_type)
{
+ unsigned int irq = desc->irq;
u32 val;
struct vlynq_device *dev = get_irq_chip_data(irq);
int virq;
@@ -190,8 +193,9 @@ static int vlynq_irq_type(unsigned int i
return 0;
}
-static void vlynq_local_ack(unsigned int irq)
+static void vlynq_local_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct vlynq_device *dev = get_irq_chip_data(irq);
u32 status = readl(&dev->local->status);
@@ -201,8 +205,9 @@ static void vlynq_local_ack(unsigned int
writel(status, &dev->local->status);
}
-static void vlynq_remote_ack(unsigned int irq)
+static void vlynq_remote_ack(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
struct vlynq_device *dev = get_irq_chip_data(irq);
u32 status = readl(&dev->remote->status);
diff -u -p a/drivers/xen/events.c b/drivers/xen/events.c
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -725,8 +725,9 @@ static int rebind_irq_to_cpu(unsigned ir
return 0;
}
-static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
+static int set_affinity_irq(struct irq_desc *desc, const struct cpumask *dest)
{
+ unsigned int irq = desc->irq;
unsigned tcpu = cpumask_first(dest);
return rebind_irq_to_cpu(irq, tcpu);
@@ -748,24 +749,27 @@ int resend_irq_on_evtchn(unsigned int ir
return 1;
}
-static void enable_dynirq(unsigned int irq)
+static void enable_dynirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int evtchn = evtchn_from_irq(irq);
if (VALID_EVTCHN(evtchn))
unmask_evtchn(evtchn);
}
-static void disable_dynirq(unsigned int irq)
+static void disable_dynirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int evtchn = evtchn_from_irq(irq);
if (VALID_EVTCHN(evtchn))
mask_evtchn(evtchn);
}
-static void ack_dynirq(unsigned int irq)
+static void ack_dynirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int evtchn = evtchn_from_irq(irq);
move_native_irq(irq);
@@ -774,8 +778,9 @@ static void ack_dynirq(unsigned int irq)
clear_evtchn(evtchn);
}
-static int retrigger_dynirq(unsigned int irq)
+static int retrigger_dynirq(struct irq_desc *desc)
{
+ unsigned int irq = desc->irq;
int evtchn = evtchn_from_irq(irq);
struct shared_info *sh = HYPERVISOR_shared_info;
int ret = 0;
diff -u -p a/kernel/irq/autoprobe.c b/kernel/irq/autoprobe.c
--- a/kernel/irq/autoprobe.c
+++ b/kernel/irq/autoprobe.c
@@ -58,8 +58,8 @@ unsigned long probe_irq_on(void)
* progress:
*/
if (desc->chip->set_type)
- desc->chip->set_type(i, IRQ_TYPE_PROBE);
- desc->chip->startup(i);
+ desc->chip->set_type(irq_to_desc(i), IRQ_TYPE_PROBE);
+ desc->chip->startup(irq_to_desc(i));
}
raw_spin_unlock_irq(&desc->lock);
}
@@ -76,7 +76,7 @@ unsigned long probe_irq_on(void)
raw_spin_lock_irq(&desc->lock);
if (!desc->action && !(desc->status & IRQ_NOPROBE)) {
desc->status |= IRQ_AUTODETECT | IRQ_WAITING;
- if (desc->chip->startup(i))
+ if (desc->chip->startup(irq_to_desc(i)))
desc->status |= IRQ_PENDING;
}
raw_spin_unlock_irq(&desc->lock);
@@ -98,7 +98,7 @@ unsigned long probe_irq_on(void)
/* It triggered already - consider it spurious. */
if (!(status & IRQ_WAITING)) {
desc->status = status & ~IRQ_AUTODETECT;
- desc->chip->shutdown(i);
+ desc->chip->shutdown(irq_to_desc(i));
} else
if (i < 32)
mask |= 1 << i;
@@ -137,7 +137,7 @@ unsigned int probe_irq_mask(unsigned lon
mask |= 1 << i;
desc->status = status & ~IRQ_AUTODETECT;
- desc->chip->shutdown(i);
+ desc->chip->shutdown(irq_to_desc(i));
}
raw_spin_unlock_irq(&desc->lock);
}
@@ -181,7 +181,7 @@ int probe_irq_off(unsigned long val)
nr_of_irqs++;
}
desc->status = status & ~IRQ_AUTODETECT;
- desc->chip->shutdown(i);
+ desc->chip->shutdown(irq_to_desc(i));
}
raw_spin_unlock_irq(&desc->lock);
}
diff -u -p a/kernel/irq/chip.c b/kernel/irq/chip.c
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -287,29 +287,25 @@ EXPORT_SYMBOL_GPL(set_irq_nested_thread)
/*
* default enable function
*/
-static void default_enable(unsigned int irq)
+static void default_enable(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
-
- desc->chip->unmask(irq);
+ desc->chip->unmask(desc);
desc->status &= ~IRQ_MASKED;
}
/*
* default disable function
*/
-static void default_disable(unsigned int irq)
+static void default_disable(struct irq_desc *unused)
{
}
/*
* default startup function
*/
-static unsigned int default_startup(unsigned int irq)
+static unsigned int default_startup(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
-
- desc->chip->enable(irq);
+ desc->chip->enable(desc);
return 0;
}
@@ -320,7 +316,7 @@ static void default_shutdown(unsigned in
{
struct irq_desc *desc = irq_to_desc(irq);
- desc->chip->mask(irq);
+ desc->chip->mask(desc);
desc->status |= IRQ_MASKED;
}
@@ -353,11 +349,11 @@ void irq_chip_set_defaults(struct irq_ch
static inline void mask_ack_irq(struct irq_desc *desc, int irq)
{
if (desc->chip->mask_ack)
- desc->chip->mask_ack(irq);
+ desc->chip->mask_ack(irq_to_desc(irq));
else {
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
if (desc->chip->ack)
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
}
}
@@ -487,7 +483,7 @@ handle_level_irq(unsigned int irq, struc
if (unlikely(desc->status & IRQ_ONESHOT))
desc->status |= IRQ_MASKED;
else if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
out_unlock:
raw_spin_unlock(&desc->lock);
}
@@ -525,7 +521,7 @@ handle_fasteoi_irq(unsigned int irq, str
if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
desc->status |= IRQ_PENDING;
if (desc->chip->mask)
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
goto out;
}
@@ -540,7 +536,7 @@ handle_fasteoi_irq(unsigned int irq, str
raw_spin_lock(&desc->lock);
desc->status &= ~IRQ_INPROGRESS;
out:
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
raw_spin_unlock(&desc->lock);
}
@@ -583,7 +579,7 @@ handle_edge_irq(unsigned int irq, struct
/* Start handling the irq */
if (desc->chip->ack)
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
/* Mark the IRQ currently in progress.*/
desc->status |= IRQ_INPROGRESS;
@@ -593,7 +589,7 @@ handle_edge_irq(unsigned int irq, struct
irqreturn_t action_ret;
if (unlikely(!action)) {
- desc->chip->mask(irq);
+ desc->chip->mask(irq_to_desc(irq));
goto out_unlock;
}
@@ -605,7 +601,7 @@ handle_edge_irq(unsigned int irq, struct
if (unlikely((desc->status &
(IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
(IRQ_PENDING | IRQ_MASKED))) {
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
desc->status &= ~IRQ_MASKED;
}
@@ -638,14 +634,14 @@ handle_percpu_irq(unsigned int irq, stru
kstat_incr_irqs_this_cpu(irq, desc);
if (desc->chip->ack)
- desc->chip->ack(irq);
+ desc->chip->ack(irq_to_desc(irq));
action_ret = handle_IRQ_event(irq, desc->action);
if (!noirqdebug)
note_interrupt(irq, desc, action_ret);
if (desc->chip->eoi)
- desc->chip->eoi(irq);
+ desc->chip->eoi(irq_to_desc(irq));
}
void
@@ -693,7 +689,7 @@ __set_irq_handler(unsigned int irq, irq_
desc->status &= ~IRQ_DISABLED;
desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
desc->depth = 0;
- desc->chip->startup(irq);
+ desc->chip->startup(desc);
}
raw_spin_unlock_irqrestore(&desc->lock, flags);
chip_bus_sync_unlock(irq, desc);
diff -u -p a/kernel/irq/handle.c b/kernel/irq/handle.c
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -274,7 +274,7 @@ int __init early_irq_init(void)
struct irq_desc *irq_to_desc(unsigned int irq)
{
- return (irq < NR_IRQS) ? irq_desc + irq : NULL;
+ return (irq < NR_IRQS) ? irq_to_desc(irq) : NULL;
}
struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node)
@@ -292,9 +292,9 @@ void clear_kstat_irqs(struct irq_desc *d
* What should we do if we get a hw irq event on an illegal vector?
* Each architecture has to answer this themself.
*/
-static void ack_bad(unsigned int irq)
+static void ack_bad(struct irq_desc *desc)
{
- struct irq_desc *desc = irq_to_desc(irq);
+ unsigned int irq = desc->irq;
print_irq_desc(irq, desc);
ack_bad_irq(irq);
@@ -303,11 +303,11 @@ static void ack_bad(unsigned int irq)
/*
* NOP functions
*/
-static void noop(unsigned int irq)
+static void noop(struct irq_desc *unused)
{
}
-static unsigned int noop_ret(unsigned int irq)
+static unsigned int noop_ret(struct irq_desc *unused)
{
return 0;
}
@@ -461,19 +461,19 @@ unsigned int __do_IRQ(unsigned int irq)
* No locking required for CPU-local interrupts:
*/
if (desc->chip->ack)
- desc->chip->ack(irq);
+ desc->chip->ack(desc);
if (likely(!(desc->status & IRQ_DISABLED))) {
action_ret = handle_IRQ_event(irq, desc->action);
if (!noirqdebug)
note_interrupt(irq, desc, action_ret);
}
- desc->chip->end(irq);
+ desc->chip->end(desc);
return 1;
}
raw_spin_lock(&desc->lock);
if (desc->chip->ack)
- desc->chip->ack(irq);
+ desc->chip->ack(desc);
/*
* REPLAY is when Linux resends an IRQ that was dropped earlier
* WAITING is used by probe to mark irqs that are being tested
@@ -533,7 +533,7 @@ out:
* The ->end() handler has to deal with interrupts which got
* disabled while the handler was running.
*/
- desc->chip->end(irq);
+ desc->chip->end(desc);
raw_spin_unlock(&desc->lock);
return 1;
diff -u -p a/kernel/irq/internals.h b/kernel/irq/internals.h
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -44,13 +44,13 @@ extern void irq_set_thread_affinity(stru
static inline void chip_bus_lock(unsigned int irq, struct irq_desc *desc)
{
if (unlikely(desc->chip->bus_lock))
- desc->chip->bus_lock(irq);
+ desc->chip->bus_lock(irq_to_desc(irq));
}
static inline void chip_bus_sync_unlock(unsigned int irq, struct irq_desc *desc)
{
if (unlikely(desc->chip->bus_sync_unlock))
- desc->chip->bus_sync_unlock(irq);
+ desc->chip->bus_sync_unlock(irq_to_desc(irq));
}
/*
diff -u -p a/kernel/irq/manage.c b/kernel/irq/manage.c
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -118,7 +118,7 @@ int irq_set_affinity(unsigned int irq, c
#ifdef CONFIG_GENERIC_PENDING_IRQ
if (desc->status & IRQ_MOVE_PCNTXT) {
- if (!desc->chip->set_affinity(irq, cpumask)) {
+ if (!desc->chip->set_affinity(desc, cpumask)) {
cpumask_copy(desc->affinity, cpumask);
irq_set_thread_affinity(desc);
}
@@ -128,7 +128,7 @@ int irq_set_affinity(unsigned int irq, c
cpumask_copy(desc->pending_mask, cpumask);
}
#else
- if (!desc->chip->set_affinity(irq, cpumask)) {
+ if (!desc->chip->set_affinity(desc, cpumask)) {
cpumask_copy(desc->affinity, cpumask);
irq_set_thread_affinity(desc);
}
@@ -161,7 +161,7 @@ static int setup_affinity(unsigned int i
cpumask_and(desc->affinity, cpu_online_mask, irq_default_affinity);
set_affinity:
- desc->chip->set_affinity(irq, desc->affinity);
+ desc->chip->set_affinity(irq_to_desc(irq), desc->affinity);
return 0;
}
@@ -207,7 +207,7 @@ void __disable_irq(struct irq_desc *desc
if (!desc->depth++) {
desc->status |= IRQ_DISABLED;
- desc->chip->disable(irq);
+ desc->chip->disable(irq_to_desc(irq));
}
}
@@ -321,7 +321,7 @@ static int set_irq_wake_real(unsigned in
int ret = -ENXIO;
if (desc->chip->set_wake)
- ret = desc->chip->set_wake(irq, on);
+ ret = desc->chip->set_wake(desc, on);
return ret;
}
@@ -425,7 +425,7 @@ int __irq_set_trigger(struct irq_desc *d
}
/* caller masked out all except trigger mode flags */
- ret = chip->set_type(irq, flags);
+ ret = chip->set_type(irq_to_desc(irq), flags);
if (ret)
pr_err("setting trigger mode %d for irq %u failed (%pF)\n",
@@ -487,7 +487,7 @@ static void irq_finalize_oneshot(unsigne
raw_spin_lock_irq(&desc->lock);
if (!(desc->status & IRQ_DISABLED) && (desc->status & IRQ_MASKED)) {
desc->status &= ~IRQ_MASKED;
- desc->chip->unmask(irq);
+ desc->chip->unmask(irq_to_desc(irq));
}
raw_spin_unlock_irq(&desc->lock);
chip_bus_sync_unlock(irq, desc);
@@ -738,7 +738,7 @@ __setup_irq(unsigned int irq, struct irq
if (!(desc->status & IRQ_NOAUTOEN)) {
desc->depth = 0;
desc->status &= ~IRQ_DISABLED;
- desc->chip->startup(irq);
+ desc->chip->startup(irq_to_desc(irq));
} else
/* Undo nested disables: */
desc->depth = 1;
@@ -872,16 +872,16 @@ static struct irqaction *__free_irq(unsi
/* Currently used only by UML, might disappear one day: */
#ifdef CONFIG_IRQ_RELEASE_METHOD
if (desc->chip->release)
- desc->chip->release(irq, dev_id);
+ desc->chip->release(desc, dev_id);
#endif
/* If this was the last handler, shut down the IRQ line: */
if (!desc->action) {
desc->status |= IRQ_DISABLED;
if (desc->chip->shutdown)
- desc->chip->shutdown(irq);
+ desc->chip->shutdown(desc);
else
- desc->chip->disable(irq);
+ desc->chip->disable(desc);
}
raw_spin_unlock_irqrestore(&desc->lock, flags);
diff -u -p a/kernel/irq/migration.c b/kernel/irq/migration.c
--- a/kernel/irq/migration.c
+++ b/kernel/irq/migration.c
@@ -43,7 +43,7 @@ void move_masked_irq(int irq)
*/
if (likely(cpumask_any_and(desc->pending_mask, cpu_online_mask)
< nr_cpu_ids))
- if (!desc->chip->set_affinity(irq, desc->pending_mask)) {
+ if (!desc->chip->set_affinity(desc, desc->pending_mask)) {
cpumask_copy(desc->affinity, desc->pending_mask);
irq_set_thread_affinity(desc);
}
@@ -61,8 +61,8 @@ void move_native_irq(int irq)
if (unlikely(desc->status & IRQ_DISABLED))
return;
- desc->chip->mask(irq);
+ desc->chip->mask(desc);
move_masked_irq(irq);
- desc->chip->unmask(irq);
+ desc->chip->unmask(desc);
}
diff -u -p a/kernel/irq/resend.c b/kernel/irq/resend.c
--- a/kernel/irq/resend.c
+++ b/kernel/irq/resend.c
@@ -60,7 +60,7 @@ void check_irq_resend(struct irq_desc *d
/*
* Make sure the interrupt is enabled, before resending it:
*/
- desc->chip->enable(irq);
+ desc->chip->enable(irq_to_desc(irq));
/*
* We do not resend level type interrupts. Level type
@@ -70,7 +70,7 @@ void check_irq_resend(struct irq_desc *d
if ((status & (IRQ_LEVEL | IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
desc->status = (status & ~IRQ_PENDING) | IRQ_REPLAY;
- if (!desc->chip->retrigger || !desc->chip->retrigger(irq)) {
+ if (!desc->chip->retrigger || !desc->chip->retrigger(irq_to_desc(irq))) {
#ifdef CONFIG_HARDIRQS_SW_RESEND
/* Set it pending and activate the softirq: */
set_bit(irq, irqs_resend);
diff -u -p a/kernel/irq/spurious.c b/kernel/irq/spurious.c
--- a/kernel/irq/spurious.c
+++ b/kernel/irq/spurious.c
@@ -79,7 +79,7 @@ static int try_one_irq(int irq, struct i
* IRQ controller clean up too
*/
if (work && desc->chip && desc->chip->end)
- desc->chip->end(irq);
+ desc->chip->end(irq_to_desc(irq));
raw_spin_unlock(&desc->lock);
return ok;
@@ -254,7 +254,7 @@ void note_interrupt(unsigned int irq, st
printk(KERN_EMERG "Disabling IRQ #%d\n", irq);
desc->status |= IRQ_DISABLED | IRQ_SPURIOUS_DISABLED;
desc->depth++;
- desc->chip->disable(irq);
+ desc->chip->disable(irq_to_desc(irq));
mod_timer(&poll_spurious_irq_timer,
jiffies + POLL_SPURIOUS_IRQ_INTERVAL);
--
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