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Message-ID: <c384c5ea1003220432i78883b0fof64f3ffa666a0776@mail.gmail.com>
Date: Mon, 22 Mar 2010 12:32:25 +0100
From: Leon Woestenberg <leon.woestenberg@...il.com>
To: "Scott D. Davilla" <davilla@....com>
Cc: jarod@...sonet.com,
"Naren (Narendra) Sankar" <nsankar@...adcom.com>,
"hancockrwd@...il.com" <hancockrwd@...il.com>,
"jarod@...hat.com" <jarod@...hat.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"abraham.manu@...il.com" <abraham.manu@...il.com>
Subject: Re: CrystalHD driver safe on big endian systems?
Hello Scott and others,
On Mon, Mar 22, 2010 at 4:53 AM, Scott D. Davilla <davilla@....com> wrote:
>
> <..> From what I've seen in code, it looks definite little endian based and would need
> a look over regarding byte swap.
>
What parts of the code assumes little endian from what you've seen?
Now, byte swap endianess is one thing, C bitfields in combination with
it, another. I have given it a first shot here (mailer unsuitable for
sending patches), still failed on PowerPC:
http://www.sidebranch.com/crystalhd/
May I suggest we instrument all register access functions with a
printk() of the register being written? Then I can compare little
endian access patterns with big endian, to be sure we get the
bitfields, code assumptions and byte swap correctly.
Regards,
--
Leon
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