lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Mon, 22 Mar 2010 23:12:40 +0100
From:	Leon Woestenberg <leon.woestenberg@...il.com>
To:	Leon Woestenberg <leon.woestenberg@...il.com>,
	linux-kernel@...r.kernel.org
Subject: Re: Memory-mapped I/O barriers, state of affairs?

Hello Andreas, all,

On Mon, Mar 22, 2010 at 9:16 PM, Andreas Bombe <aeb@...ian.org> wrote:
> On Mon, Mar 22, 2010 at 08:18:49PM +0100, Leon Woestenberg wrote:
>> What is the current solution for that particular problem, i.e. how
>> should I make sure host memory writes are committed before I have an
>> external DMA device act on it?
>
> The dma_sync_* functions, if you reuse DMA buffers without unmapping,
> take care of that.  Otherwise the process of mapping them handles it.
>
The mapping makes the memory cache-coherent. I already use that.

But does that mean that this coherency is guaranteed to occur before I
start MMIO access to a device, i.e. is there a guaranteed ordering
between the writes?

Regards,
-- 
Leon
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ