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Date:	Thu, 25 Mar 2010 05:44:30 +0000
From:	Marc Zyngier <>
To:	Joonyoung Shim <>
Subject: Re: [PATCH v2] PL330: Add PL330 DMA controller driver

On Thu, 25 Mar 2010 12:17:15 +0900
Joonyoung Shim <> wrote:

> +/* instruction set functions */
> +static inline int pl330_dmaaddh(u8 *desc_pool_virt, u16 imm, bool ra)
> +{
> +	u8 opcode = DMAADDH | (ra << 1);
> +
> +	writeb(opcode, desc_pool_virt++);

desc_pool_virt is a virtual address (from dma_alloc_coherent). In such
case, write[bwl] seems to be the wrong interface. I suggest the
following code:

	*desc_pool_virt++ = opcode;

> +	writew(imm, desc_pool_virt);

Does anything ensure that this won't generate an unaligned access?

> +	return 3;
> +}

I'm the slime oozin' out from your TV set...
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