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Date:	Mon, 29 Mar 2010 11:01:56 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
Cc:	Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
	mingo@...e.hu, hpa@...or.com, tglx@...utronix.de
Subject: Re: [PATCH] x86: mce: Xeon75xx specific interface to get corrected memory error information v2

> >> Xeon 75xx doesn't log physical addresses on corrected machine check
> >> events in the standard architectural MSRs. Instead the address has to
> >> be retrieved in a model specific way. This makes it impossible
> >> to do predictive failure analysis.
> 
> Could you point proper specification or datasheet to know/check what
> you are going to do here?

You mean how the model specific interface works?

There's currently no public specification for the interface,
but it should be reasonably clear from reading the driver how
it works.

-Andi
-- 
ak@...ux.intel.com -- Speaking for myself only.
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