linux-kernel - Re: [PATCH] x86: mce: Xeon75xx specific interface to get corrected memory error information v2

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Mon, 29 Mar 2010 11:01:56 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
Cc:	Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
	mingo@...e.hu, hpa@...or.com, tglx@...utronix.de
Subject: Re: [PATCH] x86: mce: Xeon75xx specific interface to get corrected memory error information v2

> >> Xeon 75xx doesn't log physical addresses on corrected machine check
> >> events in the standard architectural MSRs. Instead the address has to
> >> be retrieved in a model specific way. This makes it impossible
> >> to do predictive failure analysis.
> 
> Could you point proper specification or datasheet to know/check what
> you are going to do here?

You mean how the model specific interface works?

There's currently no public specification for the interface,
but it should be reasonably clear from reading the driver how
it works.

-Andi
-- 
ak@...ux.intel.com -- Speaking for myself only.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/